TI TPS79718DCKRG4

TPS797xx
www.ti.com
SLVS332H – MARCH 2001 – REVISED APRIL 2012
Ultra-Low IQ, 50mA LDO Linear Regulators with Power Good Output
in SC70 Package
Check for Samples: TPS797xx
FEATURES
DESCRIPTION
•
•
•
•
•
•
The TPS797xx family of low-dropout (LDO) voltage
regulators offers the benefits of low-dropout voltage
and ultralow-power operation. The device is stable
with
any
capacitor
(> 0.47μF).
Therefore,
implementations of this device require very little board
space due to the miniaturized packaging and
potentially small output capacitor. In addition, the
family includes an integrated open drain active-high
power good (PG) output. Intended for use in
microcontroller-based, battery-powered applications,
the TPS797xx family low dropout and ultralowpowered operation results in a significant increase in
system battery operating life. The small packaging
minimizes consumption of board space.
1
2
•
•
50mA Low-Dropout Regulator
Ultralow 1.2μA Quiescent Current at 10mA
5-Pin SC70 (DCK) Package
Integrated Power Good Output
Stable With Any Capacitor (> 0.47μF)
Dropout Voltage Typically 105mV at 10mA
(TPS79733)
Over-Current Limitation
–40°C to +85°C Operating Junction
Temperature Range
APPLICATIONS
•
The device is enabled when the applied voltage
exceeds the minimum input voltage. The usual PNP
pass transistor has been replaced by a PMOS pass
element. Because the PMOS pass element behaves
as a low-value resistor, the dropout voltage is very
low, typically 105mV at 10mA of load current, and is
directly proportional to the load current. The
quiescent current is ultralow (1.2μA typically) and is
stable over the entire range of output load current
(0mA to 50mA). When properly configured with a pullup resistor, the PG output can be used to implement
a power-on reset or low battery indicator.
Battery-Powered Microcontrollers and
Microprocessors
2.00
PG 1
GND
NC
5 OUT
2
3
4 IN
Ground Current (mA)
DCK PACKAGE
(Top View)
VI = 4.3V
VO = 3.3V
CO = 1mF
IO = 10mA
1.75
1.50
1.25
1.00
0.75
0.50
-40
-15
10
35
60
85
Free-Air Temperature (°C)
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2012, Texas Instruments Incorporated
TPS797xx
SLVS332H – MARCH 2001 – REVISED APRIL 2012
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
PRODUCT
VOUT
TPS797xx yy yz
(1)
(2)
(2)
XX is nominal output voltage (for example, 25 = 2.5V).
YYY is package designator.
Z is package quantity.
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
Output voltages from 1.25V to 4.9V in 50mV increments are available through the use of probe level programming; minimum order
quantities may apply. Contact factory for details and availability.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating junction temperature range, unless otherwise noted.
Input voltage range (2)
–0.3V to 6V
Maximum dc output voltage
4.9V
Peak output current
Internally limited
ESD rating, HBM
2kV
ESD rating, CDM
500V
Continuous total power dissipation
See Dissipation Ratings Table
Operating virtual junction temperature range, TJ
–40°C to +85°C
Storage temperature range, TSTG
–65°C to +150°C
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
PACKAGE DISSIPATION RATINGS
BOARD
PACKAGE
RθJC
°C/W
RθJA
°C/W
DERATING FACTOR
ABOVE TA = +25°C
TA ≤ +25°C
POWER RATING
TA = +70°C
POWER RATING
TA = +85°C
POWER RATING
Low K (1)
DCK
165.39
396.24
2.52mW/°C
252mW
139mW
101mW
High K (2)
DCK
165.39
314.74
3.18mW/°C
318mW
175mW
127mW
(1)
(2)
2
The JEDEC low K (1s) board design used to derive this data was a 3-inch × 3-inch, two layer board with 2 ounce copper traces on top
of the board.
The JEDEC high K (2s2p) board design used to derive this data was a 3-inch × 3-inch, multilayer board with 1 ounce internal power and
ground planes and 2 ounce copper traces on top and bottom of the board.
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TPS797xx
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SLVS332H – MARCH 2001 – REVISED APRIL 2012
ELECTRICAL CHARACTERISTICS
Over operating temperature range TJ = –40°C to +85°C, VIN = VOUT (typ) +0.5V or 2.0V, whichever is greater; IOUT = 0.5mA,
VSET, VEN = VIN, and COUT = 1.0μF, unless otherwise noted. Typical values are at TA = +25°C.
TPS797xx
PARAMETER
VIN
Input voltage (1)
IOUT
Continuous output current (2)
TEST CONDITIONS
IOUT = 3mA
IOUT = 10mA
MIN
TYP
MAX
UNIT
1.8
5.5
2
5.5
0
50
mA
–4
4
%
V
VOUT
Output voltage accuracy (3)
VOUT + 1V ≤ VIN ≤ 5.5V
1mA < IOUT < 10mA
ΔVOUT% /
ΔVIN
Line regulation (3)
VOUT + 1V ≤ VIN ≤ 5.5V
ΔVOUT% /
ΔIOUT
Load regulation
1μA < IOUT < 10mA
VDO
Dropout voltage (4), IOUT = 10mA
VIN = VOUT (NOM) – 0.1V
TPS79730
110
200
TPS79733
105
200
ISC
Output current limit
VOUT = 0V
190
300
mA
IGND
Ground pin current (3)
IOUT = 10mA
1.2
2
μA
PSRR
Power-supply rejection ratio
(ripple rejection)
f = 100Hz, COUT = 10μF,
IOUT = 10mA
50
dB
VN
Output noise voltage (TPS79718)
BW = 200kHz to 100kHz,
COUT = 10μF, IOUT = 10mA
600
μVRMS
VPG(MIN)
Minimum input voltage for valid PG
V(PG) ≥ 0.8V, IPG = 100μA
1.2
V
VIT
PG trip threshold voltage
VOUT increasing
90
%/VOUT
VPG,LO
PG output low voltage
VIN = 1.4V, IPG = 30μA, IOUT =
1mA
IPG,LKG
PG leakage current
V(PG) = 5V, VIN = VOUT + 1.0V,
IOUT = 1mA
TJ
Operating junction temperature, TJ
(1)
(2)
(3)
(4)
0.15
%/V
5
mV
0.14
mV
0.225
0.1
–40
V
nA
+85
°C
Minimum VIN = VOUT + VDO or the minimum value specified here, whichever is greater.
Continuous output current is limited by internal protection circuitry, but it is not recommended that the device operate above this
maximum for extended periods of time.
Minimum VIN is specified in note (1).
VDO is not measured for the TPS79718 because minimum VIN > 1.7V.
Copyright © 2001–2012, Texas Instruments Incorporated
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FUNCTIONAL BLOCK DIAGRAM
VIN
VOUT
Current
Sense
R1
ILIM
GND
R2
VREF = 1.235V
VIN
Bandgap
Reference
PG
Table 1. TERMINAL FUNCTIONS
TERMINAL
NAME
DESCRIPTION
NO.
GND
2
Ground
NC
3
No connection
OUT
5
The OUT terminal provides the regulated output voltage of the device.
PG
1
The PG terminal for the fixed voltage option devices is an open drain, active-high output that indicates
the status of VO (output of the LDO). When VO exceeds approximately 90% of the regulated voltage,
PG goes to a high-impedance state. It goes to a low-impedance state when VO falls below
approximately 90% (that is, overload condition) of the regulated voltage. The open drain output of the
PG terminal requires a pull-up resistor.
IN
4
The IN terminal is the power supply input to the device.
4
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TPS797xx
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SLVS332H – MARCH 2001 – REVISED APRIL 2012
TPS797xx PG Timing Diagram
VIN
VMIN
(1)
t
VOUT
Threshold
Voltage
(2)
VIT+
(2)
VIT-
t
PG
Output
t
NOTES: (1) VMIN = VOUT + VDO.
(2) The PG trip voltage is typically 10% lower than the output voltage (90% VO). VIT+ to VIT- is the hysteresis voltage.
Copyright © 2001–2012, Texas Instruments Incorporated
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SLVS332H – MARCH 2001 – REVISED APRIL 2012
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TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.465
1.890
VIN = 4.3V
COUT = 1mF
TA = +25°C
VOUT = 3.3V
Output Voltage (V)
3.399
3.366
VIN = 2.8V
COUT = 1mF
TJ = +25°C
VOUT = 1.8V
1.872
1.854
Output Voltage (V)
3.432
3.333
3.300
3.267
3.234
1.836
1.818
1.800
1.782
1.764
3.201
1.746
3.168
1.728
3.135
1.710
0
10
20
30
40
50
0
10
20
Output Current (mA)
Figure 2.
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
OUTPUT VOLTAGE
vs
JUNCTION TEMPERATURE
IO = 1mA
1.805
IO = 10mA
3.295
Output Voltage (V)
Output Voltage (V)
50
1.810
VIN = 4.3V
COUT = 1mF
VOUT = 3.3V
3.290
3.285
VIN = 2.8V
COUT = 1mF
VOUT = 3.3V
IO = 10mA
1.800
IO = 1mA
1.795
IO = 25mA
1.790
1.785
IO = 25mA
3.280
1.780
IO = 50mA
IO = 50mA
1.775
3.275
-40
-15
10
35
Junction Temperature (°C)
Figure 3.
6
40
Figure 1.
3.305
3.300
30
Output Current (mA)
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60
85
-40
-15
10
35
60
85
Junction Temperature (°C)
Figure 4.
Copyright © 2001–2012, Texas Instruments Incorporated
TPS797xx
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SLVS332H – MARCH 2001 – REVISED APRIL 2012
TYPICAL CHARACTERISTICS (continued)
1.60
VIN = 4.3V
VOUT = 3.3V
COUT = 1mF
Ground Current (mA)
1.50
1.40
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
Output Spectral Noise Density (nV/ÖHz)
GROUND CURRENT
vs
JUNCTION TEMPERATURE
IOUT = 50mA
1.30
1.20
IOUT = 25mA
1.10
1.00
IOUT = 10mA
0.90
0.80
10
-15
-40
35
60
10
VIN = 2.8V
VOUT = 1.8V
COUT = 1mF
8
IOUT = 10mA
6
IOUT = 1mA
4
2
0
1k
100
85
Figure 6.
OUTPUT IMPEDANCE
vs
FREQUENCY
DROPOUT VOLTAGE
vs
JUNCTION TEMPERATURE
700
VIN = 4.3V
VOUT = 3.3V
COUT = 1mF
TJ = +25°C
30
VIN = 3.2V
COUT = 1mF
600
Dropout Voltage (V)
35
Output Impednace (W)
100k
Figure 5.
40
25
IOUT = 1mA
20
15
IOUT = 10mA
10
500
IOUT = 50mA
400
IOUT = 25mA
300
IOUT = 10mA
200
100
5
0
0
10
100
1k
10k
100k
1M
10M
-40
Frequency (Hz)
20
35
50
POWER-UP/POWER-DOWN
TPS79718
LINE TRANSIENT RESPONSE
Output Voltage (mV) Input Voltage (V)
VIN
4
3
VOUT
2
1
0
10
5
Figure 8.
5
0
-10
Figure 7.
VOUT = 3.3V
RLOAD = 330W
6
-25
20
30
40
50
60
65
80
Junction Temperature (°C)
7
Output Voltage (V)
Input Voltage (V)
10k
Frequency (Hz)
Free-Air Temperature (°C)
70
80
90
100
IOUT = 10mA
COUT = 4.7mF
VOUT = 3.3V
5.3
4.3
dv
0.14V
=
dt
ms
200
100
0
-100
-200
0
100 200 300 400 500
600 700 800 900
Time (ms)
Time (ms)
Figure 9.
Figure 10.
Copyright © 2001–2012, Texas Instruments Incorporated
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7
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TYPICAL CHARACTERISTICS (continued)
TPS79733
LINE TRANSIENT RESPONSE
100
Output Voltage (mV) Input Voltage (V)
Change in
Current Load (mA) Output Voltage (mV)
TPS79718
LOAD TRANSIENT RESPONSE
50
0
-100
VIN = 2.8V
VOUT = 1.8V
COUT = 4.7mF
-100
10
5
1mA
0
0
200 400 600 800
1k
12
14
16
18
IOUT = 10mA
COUT = 4.7mF
VOUT = 3.3V
5.3
4.3
dv
0.14V
=
dt
ms
200
100
0
-100
-200
0
2k
100 200 300 400 500
600 700 800 900
1k
Time (ms)
Time (ms)
Figure 11.
Figure 12.
VIN = 4.3V
COUT = 4.7mF
VOUT = 3.3V
100
50
Output Current (mA)
0
-50
-100
10
Change In
Output Voltage (mV)
TPS79733
LOAD TRANSIENT RESPONSE
5
1mA
0
0
200 400 600 800
1k
12
14
16
18
2k
Time (ms)
Figure 13.
8
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TPS797xx
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SLVS332H – MARCH 2001 – REVISED APRIL 2012
APPLICATION INFORMATION
The TPS797xx family of low-dropout (LDO) regulators
have been optimized for use in micropower
applications. They feature extremely low dropout
voltages and ultralow quiescent current (1.2μA
typically).
The maximum-power-dissipation limit is determined
using the following equation:
T max - TA
PD(max) = J
RqJA
(1)
A typical application circuit is shown in Figure 14.
Where:
TJmax is the
temperature.
TPS797xx
4
IN
PG
100kW
5
-
3
C1
0.1mF
allowable
junction
RθJA is the thermal resistance junction-to-ambient for
the package (see Package Dissipation Ratings).
1
VOUT
OUT
+
maximum
NC
GND
0.47mF
2
TA is the ambient temperature.
The regulator dissipation is calculated using:
PD = (VI - VO) x IO
(2)
Power dissipation resulting from quiescent current is
negligible.
Regulator Protection
Figure 14. Typical Application Circuit
External Capacitor Requirements
Although not required, a 0.1μF or larger input bypass
capacitor, connected between IN and GND and
located close to the TPS797xx, is recommended,
especially when a highly resistive power supply is
powering the LDO in addition to other devices. Like
all low-dropout regulators, the TPS797xx requires an
output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum
recommended capacitance is 0.47μF. Any 0.47μF
capacitor is suitable. Capacitor values larger than
0.47μF are acceptable.
Power Dissipation and Junction Temperature
Specified regulator operation is assured to a junction
temperature of +85°C; restrict the maximum junction
temperature to +85°C under normal operating
conditions. This restriction limits the power dissipation
the regulator can handle in any given application. To
ensure the junction temperature is within acceptable
limits, calculate the maximum allowable dissipation,
PD(MAX), and the actual dissipation, PD, which must be
less than or equal to PD(MAX).
Copyright © 2001–2012, Texas Instruments Incorporated
The TPS797xx PMOS-pass transistor has a built-in
back diode that conducts reverse current when the
input voltage drops below the output voltage (for
example, during power down). Current is conducted
from the output to the input and is not internally
limited. If extended reverse voltage operation is
anticipated, external limiting might be appropriate.
The TPS797xx features internal current limiting.
During normal operation, the TPS797xx limits output
current to approximately 190mA. When current
limiting engages, the output voltage scales back
linearly until the overcurrent condition ends. Take
care not to exceed the power dissipation ratings of
the package.
Microcontroller Application
One application for which this device is particularly
suited is providing a regulated input voltage and
power good (PG) supervisory signal to low-power
devices such as mixed-signal microcontrollers. The
quiescent or ground current of the TPS797xx family is
typically 1.2μA even at full load; therefore, the
reduction in battery life by including the TPS797xx in
the system is negligible.
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TPS797xx
SLVS332H – MARCH 2001 – REVISED APRIL 2012
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The primary benefits of using the TPS797xx to power
low-power digital devices include:
• Regulated output voltage that protects the device
from battery droop and noise on the line (for
example, switch bounce)
• Smooth, monotonic power up
• PG signal for controlled device RESET
• Potential to use an existing 5V power rail to power
a 3.3V or lower device
• Potential to provide separate digital and analog
power and ground supplies for a system with only
VIN
VOUT
one power source
Figure 15 shows an application in which the
TPS79718 is used to power TI’s MSP430 mixed
signal microcontroller.
Minimal board space is needed to accommodate the
DCK (SC70) packaged TPS79718, the 0.1μF output
capacitor, the 0.47μF input capacitor, and the pull-up
resistor on the PG pin.
1.8V
VCC
0.47mF
TPS79718
+
MSP430
or Equivalent
0.1mF
PG
GND
RESET
VSS
Figure 15. MSP430 Microcontroller Powered by the TPS79718 Regulator
space
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (November 2009) to Revision H
•
Page
Deleted sentence regarding thermal protection .................................................................................................................... 9
Changes from Revision F (May 2009) to Revision G
Page
•
Changed document title ........................................................................................................................................................ 1
•
Deleted references to SOT323 package throughout document ........................................................................................... 1
•
Changed test conditions for Electrical Characteristics table ................................................................................................. 3
•
Changed output voltage accuracy test conditions from 10μA < IOUT < 10mA to 1mA < IOUT < 10mA .................................. 3
•
Deleted line regulation maximum specification ..................................................................................................................... 3
•
Changed PG trip threshold voltage test conditions from VOUT decreasing to VOUT increasing; deleted minimum and
maximum specifications ........................................................................................................................................................ 3
•
Revised PG low output low voltage test conditions .............................................................................................................. 3
•
Updated PG leakage current test conditions ........................................................................................................................ 3
10
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PACKAGE OPTION ADDENDUM
www.ti.com
27-Apr-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
TPS79718DCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79718DCKRG4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79718DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79718DCKTG4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS797285DCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS797285DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79730DCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79730DCKRG4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79730DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79730DCKTG4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79733DCKR
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79733DCKRG4
ACTIVE
SC70
DCK
5
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79733DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TPS79733DCKTG4
ACTIVE
SC70
DCK
5
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
(3)
Samples
(Requires Login)
PACKAGE OPTION ADDENDUM
www.ti.com
27-Apr-2012
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS79718, TPS79730, TPS79733 :
• Automotive: TPS79718-Q1, TPS79730-Q1, TPS79733-Q1
• Enhanced Product: TPS79718-EP, TPS79730-EP, TPS79733-EP
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
• Enhanced Product - Supports Defense, Aerospace and Medical Applications
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
2.25
2.4
1.22
4.0
8.0
Q3
TPS79718DCKR
SC70
DCK
5
3000
180.0
8.4
TPS79718DCKR
SC70
DCK
5
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
TPS79718DCKT
SC70
DCK
5
250
180.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
TPS79718DCKT
SC70
DCK
5
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
TPS797285DCKR
SC70
DCK
5
3000
180.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
TPS797285DCKT
SC70
DCK
5
250
180.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
TPS79730DCKR
SC70
DCK
5
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
TPS79730DCKR
SC70
DCK
5
3000
180.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
TPS79730DCKT
SC70
DCK
5
250
180.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
TPS79730DCKT
SC70
DCK
5
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
TPS79733DCKR
SC70
DCK
5
3000
180.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
TPS79733DCKR
SC70
DCK
5
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
TPS79733DCKT
SC70
DCK
5
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
TPS79733DCKT
SC70
DCK
5
250
180.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Apr-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS79718DCKR
SC70
DCK
5
3000
202.0
201.0
28.0
TPS79718DCKR
SC70
DCK
5
3000
180.0
180.0
18.0
TPS79718DCKT
SC70
DCK
5
250
202.0
201.0
28.0
TPS79718DCKT
SC70
DCK
5
250
180.0
180.0
18.0
TPS797285DCKR
SC70
DCK
5
3000
202.0
201.0
28.0
TPS797285DCKT
SC70
DCK
5
250
202.0
201.0
28.0
TPS79730DCKR
SC70
DCK
5
3000
180.0
180.0
18.0
TPS79730DCKR
SC70
DCK
5
3000
202.0
201.0
28.0
TPS79730DCKT
SC70
DCK
5
250
202.0
201.0
28.0
TPS79730DCKT
SC70
DCK
5
250
180.0
180.0
18.0
TPS79733DCKR
SC70
DCK
5
3000
202.0
201.0
28.0
TPS79733DCKR
SC70
DCK
5
3000
180.0
180.0
18.0
TPS79733DCKT
SC70
DCK
5
250
180.0
180.0
18.0
TPS79733DCKT
SC70
DCK
5
250
202.0
201.0
28.0
Pack Materials-Page 2
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