TB62710P/F/FN TOAHIBA Bi-CMOS Integrated Circuit Silicon Monolithic TB62710P, TB62710F, TB62710FN 8-Bit Constant-Current LED Driver for Cathode Common LED The TB62710P, TB62710F and TB62710FN are specifically designed for use as LED and LED display (cathode-common) Constant-current drivers. The constant-current output circuits can be set up using an external resistor (IOUT = −90 mA max). These ICs are monolithic integrated circuits have been designed using the Bi-CMOS process. The devices consist of an 8-bit shift register, a latch, an ANDgate and constant-current drivers. FEATURES TB62710F • Constant-current output: A single resistor can be used to set any output current in the range −5~−90 mA. • Maximum clock frequency: fCLK = 15 MHz (operating while connected in cascade, Topr = 25°C) • 5-V CMOS compatible input • Packages: P-type: DIP20-P-300-2.54A F-type: SSOP24-P-300-1.00 FN-type: SSOP20-P-225-0.65A • TB62710P TB62710FN Constant-output-current accuracy: Output − GND Voltage > = 2.0 V (min) > = 1.5 V (min) Current accuracy between bits between ICs ±6% ±15% Output Current (max) −5~−90 mA −5~−40 mA Weight: DIP20-P-300-2.54A: 2.25 g (Typ.) SSOP24-P-300-1.00: 0.33 g (Typ.) SSOP20-P-225-0.65A: 0.10 g (Typ.) Company Headquarters 3 Northway Lane North Latham, New York 12110 Toll Free: 800.984.5337 Fax: 518.785.4725 Web: www.marktechopto.com | Email: [email protected] California Sales Office: 950 South Coast Drive, Suite 265 Costa Mesa, California 92626 Toll Free: 800.984.5337 Fax: 714.850.9314 TB62710P/F/FN Pin Assignment (top view) P- & FN-types F-type VDD R-EXT SERIAL-OUT1 ENABLE SERIAL-OUT2 VCC OUT7 OUT6 OUT5 OUT4 GND SERIAL-IN CLOCK LATCH NC VCC OUT0 OUT1 OUT2 OUT3 VDD R-EXT SERIAL-OUT1 ENABLE SERIAL-OUT2 NC VCC NC OUT7 OUT6 OUT5 OUT4 GND SERIAL-IN CLOCK NC LATCH NC VCC NC OUT0 OUT1 OUT2 OUT3 Block Diagram OUT0 R-EXT OUT1 OUT7 I-REG VCC VCC VCC ENABLE Q ST Q D ST Q D ST D LATCH D Q SERIAL-OUT2 CK SERIAL-OUT1 D SERIAL-IN Q D CK Q D CK Q CK CLOCK Truth Table CLOCK LATCH ENABLE SERIAL-IN OUT0… OUT5 … OUT7 SERIAL-OUT H L Dn Dn … Dn − 5 … Dn − 7 Dn − 7 L L Dn + 1 No Change Dn − 6 H L Dn + 2 Dn + 2 … Dn − 3 … Dn − 5 Dn − 5 X L Dn + 3 Dn + 2 … Dn − 3 … Dn − 5 Dn − 5 X H Dn + 3 OFF Dn − 5 Note 1: OUT0~OUT7 = ON when Dn = “H”; OUT0~OUT7 = OFF when Dn = “L”. In order to ensure that the level of the power supply voltate is correct, an external resistor must be connected between R-EXT and GND. 2 2001-04-16 TB62710P/F/FN Timing Diagram n=1 2 3 4 5 6 7 8 5V CLOCK 0V 5V SERIAL-IN 0V 5V LATCH 0V 5V ENABLE 0V OUT0 OFF OUT1 OFF OUT6 OFF OUT7 OFF ON OFF ON OFF 5V SERIAL-OUT1 0V 5V SERIAL-OUT2 0V Note 2: The latches circuit holds data by pulling the LATCH terminal Low. And, when LATCH terminal is a “H” level, latch circuit doesn’t hold data, and it passes from the input to the output. When ENABLE terminal is a “L” level, output terminal OUT0~ OUT7 respond to the data, and on & off does. And, when ENABLE terminal is a “H” level, it offs with the output terminal regardless of the data. 3 2001-04-16 TB62710P/F/FN Terminal Description Pin No. Pin Name P/FN-Type F-Type 1 1 GND 2 2 SERIAL-IN 3 3 CLOCK 4 5 LATCH 6, 15 7, 18 VCC 7~14 9~16 OUT0~OUT7 Function GND terminal for control logic Input terminal for serial data for data shift register Input terminal for clock for data shift on rising edge Input terminal for data strobe When the LATCH input is driven High, data is latched. When it is pulled Low, data is hold. 0 V~17 V supply voltage terminal for LED Output terminals Input terminal for output enable. 17 21 ENABLE All outputs (OUT0~OUT7) are turned off, when the ENABLE terminal is driven High. And are turned on, when the terminal is driven Low. 16 20 SERIAL-OUT2 Output terminal for serial data input on SERIAL-IN terminal 18 22 SERIAL-OUT1 Output terminal for serial data input on SERIAL-IN terminal 19 23 R-EXT 20 24 VDD 5-V supply voltage terminal 5 4, 6, 8, 17, 19 NC Not connected Input terminal used to connect an external resistor. This regulated the output current. Equivalent Circuits For Inputs and Outputs ENABLE terminal LATCH terminal R (UP) VDD 300 k VDD LATCH 200 k ENABLE GND GND R (DOWN) CLOCK, SERIAL-IN terminal SERIAL-OUT1 and SERIAL-OUT2 terminals VDD VDD CLOCK, SERIAL-IN SERIAL-OUT1, 2 GND GND 4 2001-04-16 TB62710P/F/FN Maximum Ratings (Topr = 25°C) Characteristic Symbol Rating Unit Supply voltage VDD 0~7.0 V Supply voltage for LED VLED 0~17.0 V VIN −0.4~VDD + 0.4 V Input voltage Output current IOUT −90 mA Output voltage VOUT −0.4~17 V Clock frequency fCLK 15 MHz VCC terminal current IVCC 1440 mA Pd1 1.47 P-type (when not mounted) Power Dissipation F-type (when not mounted) 0.59 Pd2 (Note 3) F-type (on PCB) FN-type (when not mounted) 0.83 0.71 Pd3 0.96 FN-type (on PCB) P-type (when not mounted) Thermal Resistance (Note 3) F-type (when not mounted) Rth (j-a) 1 85 210 Rth (j-a) 2 F-type (on PCB) FN-type (when not mounted) W 150 °C/W 175 Rth (j-a) 3 130 FN-type (on PCB) Operating Temperature Topr −40~85 °C Storage Temperature Tstg −55~150 °C Note 3: P-Type: Powes dissipation is derated by 12.5 mW/°C if device is mounted on PCB and ambient temperature is above 25°C. F-Type: Powes dissipation is derated by 6.7 mW/°C if device is mounted on PCB and ambient temperature is above 25°C. With device mounted on PCB of 60% Cu and of dimensions 50 mm × 50 mm × 1.6 mm FN-Type: Powes dissipation is derated by 7.7 mW/°C if device is mounted on PCB and ambient temperature is above 25°C. With device mounted on PCB of 40% Cu and of dimensions 50 mm × 50 mm × 1.6 mm 5 2001-04-16 TB62710P/F/FN Recommended Operating Conditions (Topr = −40°C ~85°C unless otherwise specified) Characteristic Supply voltage Symbol Conditions Min Typ. Max Unit VDD 4.5 5.0 5.5 V VCC1 VCC − VOUT > = 2.0 V, IOUT < = −90 mA 4 17 VCC2 VCC − VOUT > = 1.5 V, IOUT < = −40 mA 3.5 17 VOUT VCC common 0 −17 IOUT DC1 circuit −5 −78 IOH SERIAL-OUT1, 2 −1.0 IOL SERIAL-OUT1, 2 1.0 0.7 VDD VDD + 0.3 −0.3 0.3 VDD Supply voltage for LED Output voltage Output current VIH VDD = 4.5~5.5 V Input voltage VIL V V mA V LATCH pulse width twLAT VDD = 4.5~5.5 V 100 ns CLOCK pulse width twCLK VDD = 4.5~5.5 V 50 ns ENABLE pulse width twENA VDD = 4.5~5.5 V 1000 ns Set-up time for DATA tsetup VDD = 4.5~5.5 V 100 ns Hold time for DATA thold VDD = 4.5~5.5 V 100 ns Clock frequency tCLK VDD = 4.5~5.5 V, Cascade operation 10.0 ns P-type Pd1 When not mounted 0.76 F-type Pd2 0.43 FN-type Pd3 0.50 Power Dissipation Topr = 85°C 6 On PCB W 2001-04-16 TB62710P/F/FN Electrical Characteristics (Topr = 25°C, VDD = 5 V, VCC = 17 V unless otherwise specified) Characteristic Symbol Test circuit ILEAK VOH Min Typ. Max Unit VCC = 17.0 V −10 µA IOH = −1.0 mA 0.4 VOL IOL = 1.0 mA 4.6 IOUT1 VCC = 4 V, R = 360 Ω VOUT = VCC − 2.0 V EXT −62.1 −73.0 −83.9 IOUT2 VCC = 4 V, R = 620 Ω VOUT = VCC − 2.0 V EXT −34.0 −40.0 −46.0 IOUT3 VCC = 3.5 V, R = 620 Ω VOUT = VCC − 1.5 V EXT −32.3 −38.0 −43.7 ∆IOUT Same as IOUT1, IOUT2 and IOUT3 ±1.5 ±6.0 % Supply voltage regulation %/VDD Ta = −40~85°C 1.5 5.0 %/V Pull-up resistor Rin (Up) 150 300 600 kΩ Rin (Down) 100 200 400 kΩ IDD (OFF) All outputs = OFF REXT = OPEN 0.6 1.2 IDD (ON) 1 DATA = ALL “H”, All outputs = ON (no load) REXT = 360 Ω 7.5 10.0 IDD (ON) 2 DATA = ALL “H”, All outputs = ON (no load) REXT = 620 Ω 4.0 7.0 ICC (OFF) DATA = ALL “L”, All outputs = OFF (no load) REXT = 620 Ω 0.5 1.0 ICC (ON) DATA = ALL “H”, All outputs = ON (no load) REXT = 360 Ω 42.0 52.0 Output leakage current Output voltage SERIAL-OUT 1, 2 Output current (including current skewing) Current skew Pull-down resistor VDD Supply current VCC Conditions 7 REXT = 360 Ω V mA mA 2001-04-16 TB62710P/F/FN Switching Characteristics (Topr = 25°C unless otherwise specifed) Characteristic Symbol Propagation delay time (“H” to “L”) Conditions Min Typ. Max 200 450 20 70 60 180 Unit CLK-OUTn Propagation delay time (“L” to “H”) Test circuit LATCH -OUTn ENABLE -OUTn tpLH ns CLK-SOUTn CLK-OUTn VOUT = VCC − 2.0 V LATCH -OUTn VIH = VDD, VIL = GND REXT = 620 Ω CL = 10.5 pF 20 70 ENABLE -OUTn tpHL CLK-SOUTn VDD = 5.0 V, VCC = 17.0 V ns CLK twCLK tor: 10~90% 20 30 LATCH twLAT tof: 90~10% 10 25 Set-up time LATCH /SIN/ CLOCK tpLH: 50~10% DATA = “L” → “H” tsetup tpHL: 50~90% 25 50 ns Hold time LATCH /SIN/ CLOCK DATA = “H” → “L” thold 0 30 ns 10 µs Pulse width Rise time Set the switching characteristics according to the result of measuring the voltage waveform. ns (Note 4) tr (Note 4) tf 10 µs Output rise time tor 25 55 110 ns Output fall time tof 250 450 600 ns Slow clock Fall time Note 4: If the device is connected in a cascade and tr/tf for the waveform is large, it may not be possible to achieve the timing required for data transfer. Please consider the timings carefully. 8 2001-04-16 TB62710P/F/FN Test Circuit DC Characteristic IDD ILED VDD VCC OUT0 ENABLE IOUT CLOCK IIL, IIH OUT7 LATCH SERIAL-IN SERIAL-OUT1, SERIAL-OUT2 GND VIL, VIH AC Characteristic VCC Function Generator VDD VIH, VIL RL OUT0 CL ENABLE CLOCK RL OUT7 LATCH CL SERIAL-IN SERIAL-OUT1, 2 GND Logic input waveform CL VDD = VIH = 5.0 V VIL = 0 V tr = tf = 10 ns (10% to 90%) 9 2001-04-16 TB62710P/F/FN Timing Waveforms 1. CLOCK, SERIAL OUTn tr tr 90% 50% CLOCK 50% 10% 50% 10% twCLK SERIAL-IN 50% tsetup tof tor tpLH 90% 50% OUTn 10% tpHL 90% 50% 10% tpLH tpHL SERIAL-OUT1 50% 50% tpLH SERIAL-OUT2 tpHL 50% 50% 2. CLOCK, LATCH CLOCK 50% twCLK 50% SERIAL-IN tsetup LATCH 50% 50% twLAT 3. ENABLE – OUTn ENABLE 50% 50% tpHL tpLH ON OUTn 50% 50% OFF 10 2001-04-16 TB62710P/F/FN Reference Data (duty curves + package power dissipation) IOUT – Duty on PCB 80 IOUT – Duty on PCB 80 Topr = 85°C, VCC − VOUT = 2.0 V Tj = 120°C 70 70 60 (mA) (mA) 60 50 40 IOUT IOUT 40 50 30 20 30 20 TB62710FN 10 10 TB62710F TB62710P 0 0 TB62710FN Topr = 60°C, TB62710F VCC − VOUT = 2.0 V Tj = 120°C TB62710P 20 40 60 Duty 80 0 0 100 20 40 60 Duty (%) IOUT – Duty on PCB 80 100 (%) Pd – Topr 80 2.0 70 P-type FREE AIR 40 (W/IC) 1.5 30 Pd IOUT (mA) 60 50 20 1.0 F-type ON PCB FN-type ON PCB 0.5 10 TB62710FN Topr = 25°C, TB62710F VCC − VOUT = 2.0 V Tj = 120°C TB62710P 0 0 20 40 60 Duty 80 0 0 100 25 50 Topr (%) 75 100 (°C) IOUT – REXT 90 IOUT (mA) = 25°C 80 (1.26 ÷ REXT (Ω)) × 18 IOUT (mA) 70 60 50 85°C Topr = −40°C 40 30 20 VDD = 5.0 V, VCE = 2.0 V, 10 V CC = 17.0 V 0 100 500 1000 REXT 5000 10000 (Ω) 11 2001-04-16 TB62710P/F/FN The bottom figure shows an application circuit. For best results, this IC should be operated with VO = 2.0 V. VO (V) = VCC − VOUT = VCC − Vf (LED) − VCE1 When VCC is high and the Vf of the LED is low. VO is also high , the increase in power dissipation may in turn adversely affect the IC’s output current. In this case, reduce the voltage by connecting an external resistor. In this way the IC’s output current can be stabilized. R= VCC − Vf − VO (min) IOUT (max) × BIT number (max) It is looked for. it is also possible that the IC will operate in an unstable manner due to the inductance of the wiring. To counter this, it is recommended that the IC be situated as close as possible on the PCB to the LED module, and as far as possible from other ICs. Otherwise, there is the risk that the IC will malfunction. Application VLED = 5~17 (V) R VDD n SCAN VCC VCC OUT0 ENABLE CLOCK LATCH OUT7 SERIAL-IN R-EXT GND SERIAL-OUT1, SERIAL-OUT2 CPU VCC VCC OUT0 ENABLE VCE1 CLOCK LATCH OUT7 SERIAL-IN R-EXT GND SERIAL-OUT1, SERIAL-OUT2 VO = VCC − Vf (LED) − VCE1 For best results, operate at VO = 2.0 V 12 2001-04-16 TB62710P/F/FN Notes • Operation may become unstable due to the electromagnetic interference caused by the wiring and other phenomena. To counter this, it is recommended that the IC be situated as close as possible to the LED module. If overvoltage is caused by inductance between the LED and the output terminals, both the LED and the terminals may suffer damage as a result. • There is only one GND terminal on this device when the inductance in the GND line and the resistor are large, the device may malfunction due to the GND noise when output switchings by the circuit board pattern and wiring. To achieve stable operation, it is necessary to connect a resistor between the REXT terminal and the GND line. Fluctuation in the output waveform is likely to occur when the GND line is unstable or when a capacitor (of more than 50 pF) is used. Therefore, take care when designing the circuit board pattern layout and the wiring from the controller. • This application circuit is a reference example and is not guaranteed to work in all conditions. Be sure to check the operation of your circuits. • This device does not include protection circuits for overvoltage, overcurrent or overtemperature. If protection is necessary, it must be incorporated into the control circuitry. • The device is likely to be destroyed if a short-circuit occurs between either of the power supply pins and any of the output terminals when designing circuits, pay special attention to the positions of the output terminals and the power supply terminals (VDD and VLED), and to the design of the GND line. 13 2001-04-16 TB62710P/F/FN Package Dimensions 質量: 2.25 g (標準) 14 2001-04-16 TB62710P/F/FN Package Dimensions 質量: 0.33 g (標準) 15 2001-04-16 TB62710P/F/FN Package Dimensions 質量: .0.10 g (標準) 16 2001-04-16 TB62710P/F/FN RESTRICTIONS ON PRODUCT USE 000707EBA • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.. • The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer’s own risk. • The products described in this document are subject to the foreign exchange and foreign trade laws. • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. • The information contained herein is subject to change without notice. 17 2001-04-16