REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 www.ti.com SBOS410E – JUNE 2007 – REVISED JUNE 2010 Low-Noise, Very Low Drift, Precision VOLTAGE REFERENCE Check for Samples: REF5010, REF5020, REF5025, REF5030, REF5040, REF5045, REF5050 FEATURES DESCRIPTION • The REF50xx is a family of low-noise, low-drift, very high precision voltage references. These references are capable of both sinking and sourcing, and are very robust with regard to line and load changes. 1 2 • • • • • LOW TEMPERATURE DRIFT: – High-Grade: 3ppm/°C (max) – Standard-Grade: 8ppm/°C (max) HIGH ACCURACY: – High-Grade: 0.05% (max) – Standard-Grade: 0.1% (max) LOW NOISE: 3mVPP/V EXCELLENT LONG-TERM STABILITY: – 5ppm/1000hr (typ) after 1000 hours HIGH OUTPUT CURRENT: ±10mA TEMPERATURE RANGE: –40°C to +125°C Excellent temperature drift (3ppm/°C) and high accuracy (0.05%) are achieved using proprietary design techniques. These features, combined with very low noise, make the REF50xx family ideal for use in high-precision data acquisition systems. Each reference voltage is available in both standardand high-grade versions. They are offered in MSOP-8 and SO-8 packages, and are specified from –40°C to +125°C. APPLICATIONS • • • • • • REF50xx Family 16-BIT DATA ACQUISITION SYSTEMS ATE EQUIPMENT INDUSTRIAL PROCESS CONTROL MEDICAL INSTRUMENTATION OPTICAL CONTROL SYSTEMS PRECISION INSTRUMENTATION +5V Input Signal 0V to 4V MODEL OUTPUT VOLTAGE REF5020 2.048V REF5025 2.5V REF5030 3.0V REF5040 4.096V REF5045 4.5V REF5050 5.0V REF5010 10.0V +5V R1 50W VDD +IN OPA365 ADS8326 C1 1.2nF -IN REF CBYPASS 1mF GND DNC(1) 7 NC(2) 1 VIN 2 TEMP 3 6 GND 4 5 REF50xx GND REF5040 VIN +5V 8 DNC(1) VOUT TRIM/NR SO-8, MSOP-8 VOUT C2 22mF NOTES: (1) DNC = Do not connect. (2) NC = No internal connection. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2010, Texas Instruments Incorporated REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 SBOS410E – JUNE 2007 – REVISED JUNE 2010 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION (1) PRODUCT OUTPUT VOLTAGE PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING REF5020 STANDARD GRADE (8ppm, 0.1%) REF5020A SO-8 D MSOP-8 DGK R50A SO-8 D REF5025 MSOP-8 DGK R50B SO-8 D REF5030 MSOP-8 DGK R50C SO-8 D REF5040 MSOP-8 DGK R50D SO-8 D REF5045 MSOP-8 DGK R50E SO-8 D REF5050 MSOP-8 DGK R50F SO-8 D REF5010 MSOP-8 DGK R50G REF5020 2.048V REF5025A 2.5V REF5030A 3.0V REF5040A 4.096V REF5045A 4.5V REF5050A 5.0V REF5010A 10.0V HIGH GRADE (3ppm, 0.05%) REF5020I REF5025I D DGK R50A SO-8 D REF5025 MSOP-8 DGK R50B SO-8 D REF5030 MSOP-8 DGK R50C SO-8 D REF5040 MSOP-8 DGK R50D SO-8 D REF5045 MSOP-8 DGK R50E SO-8 D REF5050 MSOP-8 DGK R50F SO-8 D REF5010 MSOP-8 DGK R50G 2.5V REF5030I 3.0V REF5040I 4.096V REF5045I 4.5V REF5050I 5.0V REF5010I (1) SO-8 MSOP-8 2.048V 10.0V For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the device product folder at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) PARAMETER REF50xx Input Voltage +18 V Output Short-Circuit 30 mA Operating Temperature Range –55 to +125 °C Storage Temperature Range –65 to +150 °C +150 °C Human Body Model (HBM) 3000 V Charged Device Model (CDM) 1000 V Junction Temperature (TJ max) ESD Rating (1) 2 UNIT Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. Submit Documentation Feedback Copyright © 2007–2010, Texas Instruments Incorporated Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 www.ti.com SBOS410E – JUNE 2007 – REVISED JUNE 2010 ELECTRICAL CHARACTERISTICS: PER DEVICE Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, ILOAD = 0, CL = 1mF, and VIN = (VOUT + 0.2V) to 18V, unless otherwise noted. PER DEVICE PARAMETER CONDITIONS MIN TYP MAX UNIT REF5020 (VOUT = 2.048V) (1) OUTPUT VOLTAGE Output Voltage Initial Accuracy: VOUT 2.7V < VIN < 18V 2.048 V High-Grade –0.05 0.05 % Standard-Grade –0.1 0.1 % NOISE Output Voltage Noise f = 0.1Hz to 10Hz 6 mVPP REF5025 (VOUT = 2.5V) OUTPUT VOLTAGE Output Voltage Initial Accuracy: VOUT 2.5 V High-Grade –0.05 0.05 % Standard-Grade –0.1 0.1 % NOISE Output Voltage Noise f = 0.1Hz to 10Hz 7.5 mVPP REF5030 (VOUT = 3.0V) OUTPUT VOLTAGE Output Voltage Initial Accuracy: VOUT 3.0 V High-Grade –0.05 0.05 % Standard-Grade –0.1 0.1 % NOISE Output Voltage Noise f = 0.1Hz to 10Hz 9 mVPP REF5040 (VOUT = 4.096V) OUTPUT VOLTAGE Output Voltage Initial Accuracy: VOUT 4.096 V High-Grade –0.05 0.05 % Standard-Grade –0.1 0.1 % NOISE Output Voltage Noise f = 0.1Hz to 10Hz 12 mVPP REF5045 (VOUT = 4.5V) OUTPUT VOLTAGE Output Voltage Initial Accuracy: VOUT 4.5 V High-Grade –0.05 0.05 % Standard-Grade –0.1 0.1 % NOISE Output Voltage Noise f = 0.1Hz to 10Hz 13.5 mVPP REF5050 (VOUT = 5.0V) OUTPUT VOLTAGE Output Voltage Initial Accuracy: VOUT 5.0 V High-Grade –0.05 0.05 % Standard-Grade –0.1 0.1 % NOISE Output Voltage Noise f = 0.1Hz to 10Hz 15 mVPP REF5010 (VOUT = 10.0V) OUTPUT VOLTAGE Output Voltage Initial Accuracy: VOUT 10.0 V High-Grade –0.05 0.05 % Standard-Grade –0.1 0.1 % NOISE Output Voltage Noise (1) f = 0.1Hz to 10Hz 30 mVPP For VOUT ≤ 2.5V, the minimum supply voltage is 2.7V. Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 3 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 SBOS410E – JUNE 2007 – REVISED JUNE 2010 www.ti.com ELECTRICAL CHARACTERISTICS: ALL DEVICES Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, ILOAD = 0, CL = 1mF, and VIN = (VOUT + 0.2V) to 18V, unless otherwise noted. REF50xx PARAMETER CONDITIONS MIN TYP MAX UNIT 2.5 3 ppm/°C 3 8 ppm/°C OUTPUT VOLTAGE TEMPERATURE DRIFT Output Voltage Temperature Drift dVOUT/dT High-Grade Standard-Grade LINE REGULATION Line Regulation dVOUT/dVIN REF5020 (1) Only VIN = 2.7V to 18V 0.1 1 ppm/V All Other Devices VIN = VOUT + 0.2V 0.1 1 ppm/V 0.2 1 ppm/V VIN = 3V 20 30 ppm/mA VIN = VOUT + 0.75V 20 30 ppm/mA 50 ppm/mA Over Temperature LOAD REGULATION Load Regulation dVOUT/dILOAD REF5020 Only All Other Devices –10mA < ILOAD < +10mA Over Temperature SHORT-CIRCUIT CURRENT Short-Circuit Current ISC VOUT = 0 25 mA High-Grade MSOP-8 Cycle 1 10 ppm Standard-Grade MSOP-8 Cycle 1 30 ppm High-Grade SO-8 Cycle 1 5 ppm Standard-Grade SO-8 Cycle 1 10 ppm High-Grade MSOP-8 Cycle 2 5 ppm Standard-Grade MSOP-8 Cycle 2 10 ppm High-Grade SO-8 Cycle 2 3 ppm Standard-Grade SO-8 Cycle 2 5 ppm MSOP-8 0 to 1000 hours 50 ppm/1000 hr MSOP-8 1000 to 2000 hours 5 ppm/1000 hr SO-8 0 to 1000 hours 90 ppm/1000 hr SO-8 1000 to 2000 hours 10 ppm/1000 hr THERMAL HYSTERESIS (2) LONG-TERM STABILITY TEMP PIN Voltage Output At TA = +25°C Temperature Sensitivity 575 mV 2.64 mV/°C 200 ms TURN-ON SETTLING TIME Turn-On Settling Time To 0.1% with CL = 1mF POWER SUPPLY Supply Voltage VS See Note (1) VOUT + 0.2 (1) Quiescent Current 0.8 Over Temperature 18 V 1 mA 1.2 mA TEMPERATURE RANGE Specified Range –40 +125 °C Operating Range –55 +125 °C Thermal Resistance (1) (2) 4 qJA MSOP-8 150 °C/W SO-8 150 °C/W For VOUT ≤ 2.5V, the minimal supply voltage is 2.7V. The thermal hysteresis procedure is explained in more detail in the Application Information section. Submit Documentation Feedback Copyright © 2007–2010, Texas Instruments Incorporated Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 www.ti.com SBOS410E – JUNE 2007 – REVISED JUNE 2010 TYPICAL CHARACTERISTICS At TA = +25°C, ILOAD = 0, and VS = VOUT + 0.2V, unless otherwise noted. For VOUT ≤ 2.5V, the minimum supply voltage is 2.7V. TEMPERATURE DRIFT (–40°C to +125°C) Drift (ppm/°C) Drift (ppm/°C) Figure 1. Figure 2. OUTPUT VOLTAGE INITIAL ACCURACY OUTPUT VOLTAGE ACCURACY vs TEMPERATURE 7.50 8.00 6.50 7.00 5.50 6.00 4.50 5.00 3.50 4.00 2.50 3.00 1.50 2.00 0.50 1.00 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 2.75 3.00 3.25 3.50 3.75 4.00 4.25 4.50 4.75 5.00 0 Population (%) Population (%) TEMPERATURE DRIFT (0°C to +85°C) 0.05 Population (%) Output Voltage Accuracy (%) 0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.05 0.05 0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05 -0.04 -50 -25 25 50 Temperature (°C) 75 Figure 3. Figure 4. POWER-SUPPLY REJECTION RATIO vs FREQUENCY DROPOUT VOLTAGE vs LOAD CURRENT 160 0.8 140 0.7 120 0.6 Dropout Voltage (V) PSRR (dB) Output Initial Accuracy (%) 0 100 80 60 40 20 100 125 +125°C +25°C 0.5 -40°C 0.4 0.3 0.2 0.1 0 0 10 100 1k Frequency (Hz) 10k Figure 5. Copyright © 2007–2010, Texas Instruments Incorporated 100k -15 -10 -5 0 5 Load Current (mA) 10 15 Figure 6. Submit Documentation Feedback Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 5 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 SBOS410E – JUNE 2007 – REVISED JUNE 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, ILOAD = 0, and VS = VOUT + 0.2V, unless otherwise noted. For VOUT ≤ 2.5V, the minimum supply voltage is 2.7V. REF5025 OUTPUT VOLTAGE vs LOAD CURRENT TEMP PIN OUTPUT VOLTAGE vs TEMPERATURE 0.9 2.50125 TEMP Pin Output Voltage (V) 2.50100 Output Voltage (V) 2.50075 2.50050 2.50025 +25°C 2.50000 2.49975 2.49950 -40°C 2.49925 +125°C 2.49900 -5 0 Load Current (mA) 5 0.6 0.5 0.4 10 -50 0 -25 25 50 Temperature (°C) 75 Figure 7. Figure 8. QUIESCENT CURRENT vs TEMPERATURE QUIESCENT CURRENT vs INPUT VOLTAGE 1050 1000 1000 950 950 900 100 125 +125?C 900 850 IQ (mA) Quiescent Current (mA) -10 850 800 +25?C 800 750 750 -40?C 700 700 650 650 600 600 -50 -25 0 25 50 Temperature (°C) 75 100 2 125 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 VIN (V) Figure 9. Figure 10. LINE REGULATION vs TEMPERATURE SHORT-CIRCUIT CURRENT vs TEMPERATURE 0.5 35 0.4 Sourcing 30 Short-Circuit Current (mA) Line Regulation (ppm/V) 0.7 0.3 2.49875 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 25 20 Sinking 15 10 5 -0.4 0 -0.5 -50 -25 0 25 50 Temperature (°C) Figure 11. 6 0.8 Submit Documentation Feedback 75 100 125 -50 -25 0 25 50 Temperature (°C) 75 100 125 Figure 12. Copyright © 2007–2010, Texas Instruments Incorporated Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 www.ti.com SBOS410E – JUNE 2007 – REVISED JUNE 2010 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, ILOAD = 0, and VS = VOUT + 0.2V, unless otherwise noted. For VOUT ≤ 2.5V, the minimum supply voltage is 2.7V. STARTUP (REF5025, CL = 1mF) NOISE 1mV/div VIN 2V/div VOUT 1V/div 1s/div 40ms/div Figure 13. Figure 14. STARTUP (REF5025, CL = 10mF) LOAD TRANSIENT (CL = 1mF, IOUT = 1mA) +1mA VIN ILOAD 5V/div -1mA -1mA 1mA/div VOUT 5mV/div VOUT 1V/div 400ms/div 20ms/div Figure 15. Figure 16. LOAD TRANSIENT (CL = 1mF, IOUT = 10mA) LOAD TRANSIENT (CL = 10mF, IOUT = 1mA) ILOAD 10mA/div +1mA +10mA +10mA ILOAD -1mA -1mA 1mA/div -10mA VOUT VOUT 5mV/div 2mV/div 20ms/div 100ms/div Figure 17. Figure 18. Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 7 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 SBOS410E – JUNE 2007 – REVISED JUNE 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) At TA = +25°C, ILOAD = 0, and VS = VOUT + 0.2V, unless otherwise noted. For VOUT ≤ 2.5V, the minimum supply voltage is 2.7V. LOAD TRANSIENT (CL = 10mF, IOUT = 10mA) ILOAD 10mA/div LINE TRANSIENT (CL = 1mF) +10mA -10mA -10mA VIN 500mV/div VOUT 2mV/div VOUT 5mV/div 100ms/div 20ms/div Figure 19. Figure 20. LINE TRANSIENT (CL = 10mF) REF50xx LONG-TERM STABILITY (FIRST 1000 HOURS) 500mV/div 5mV/div Output Voltage Stability (ppm) 140 VIN VOUT 96 Units MSOP-8 Package 120 100 80 60 40 20 0 -20 -40 100ms/div 0 100 200 300 400 500 600 700 800 900 1000 Hours 40 Figure 22. REF50xx LONG-TERM STABILITY (SECOND 1000 HOURS) REF50xx LONG-TERM STABILITY (2000 HOURS) 140 96 Units MSOP-8 Package Output Voltage Stability (ppm) Output Voltage Stability (ppm) 50 Figure 21. 30 20 10 0 -10 100 80 60 40 20 0 -20 -20 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 8 96 Units MSOP-8 Package 120 -40 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Hours Hours Figure 23. Figure 24. Submit Documentation Feedback Copyright © 2007–2010, Texas Instruments Incorporated Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 www.ti.com SBOS410E – JUNE 2007 – REVISED JUNE 2010 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, ILOAD = 0, and VS = VOUT + 0.2V, unless otherwise noted. For VOUT ≤ 2.5V, the minimum supply voltage is 2.7V. REF50xx LONG-TERM STABILITY (FIRST 1000 HOURS) 80 96 Units SO-8 Package 200 Output Voltage Stability (ppm) Output Voltage Stability (ppm) 250 REF50xx LONG-TERM STABILITY (SECOND 1000 HOURS) 150 100 50 0 -50 0 60 96 Units SO-8 Package 40 20 0 -20 -40 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 100 200 300 400 500 600 700 800 900 1000 Hours Hours Figure 25. Figure 26. REF50xx LONG-TERM STABILITY (2000 HOURS) Output Voltage Stability (ppm) 250 96 Units SO-8 Package 200 150 100 50 0 -50 0 200 400 600 800 1000 1200 1400 1600 1800 2000 Hours Figure 27. Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 9 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 SBOS410E – JUNE 2007 – REVISED JUNE 2010 www.ti.com APPLICATION INFORMATION The REF50xx is family of low-noise, precision bandgap voltage references that are specifically designed for excellent initial voltage accuracy and drift. Figure 28 shows a simplified block diagram of the REF50xx. OUTPUT ADJUSTMENT USING THE TRIM/NR PIN VIN REF50xx R2 The REF50xx provides a very accurate, factory-trimmed voltage output. However, VOUT can be adjusted using the trim and noise reduction pin (TRIM/NR, pin 5). Figure 30 shows a typical circuit that allows an output adjustment of ±15mV R1 aT (10mA at +25°C) VOUT R4 TEMP aT requirement of 2.7V, these references can be operated with a supply of 200mV above the output voltage in an unloaded condition. For loaded conditions, a typical dropout voltage versus load plot is shown in Figure 6 of the Typical Characteristics. 10kW +VSUPPLY R3 REF50xx TRIM/NR 1.2V R5 60kW 1kW DNC DNC VIN NC VOUT TEMP GND TRIM/NR GND 10kW 470kW 1kW Figure 28. REF50xx Simplified Block Diagram BASIC CONNECTIONS Figure 29 shows the typical connections for the REF50xx. A supply bypass capacitor ranging between 1mF to 10mF is recommended. A 1mF to 50mF output capacitor (CL) must be connected from VOUT to GND. The ESR value of CL must be less than or equal to 1.5Ω to ensure output stability. To minimize noise, the recommended ESR of CL is between 1Ω and 1.5Ω. +VSUPPLY REF50xx DNC CBYPASS 1mF to 10mF VIN TEMP DNC Figure 30. VOUT Adjustment Using the TRIM/NR Pin The REF50xx allows access to the bandgap through the TRIM/NR pin. Placing a capacitor from the TRIM/NR pin to GND (see Figure 31) in combination with the internal R3 and R4 resistors creates a low-pass filter. A capacitance of 1mF creates a low-pass filter with the corner frequency between 10Hz and 20Hz. Such a filter decreases the overall noise measured on the VOUT pin by half. Higher capacitance results in a lower filter cutoff frequency, further reducing output noise. Note that use of this capacitor increases startup time. NC VOUT GND TRIM/NR VOUT +VSUPPLY CL 1mF to 50mF REF50xx DNC VIN Figure 29. Basic Connections TEMP DNC NC VOUT GND TRIM/NR SUPPLY VOLTAGE The REF50xx family of voltage references features extremely low dropout voltage. With the exception of the REF5020, which has a minimum supply 10 Submit Documentation Feedback C1 1mF Figure 31. Noise Reduction Using the TRIM/NR Pin Copyright © 2007–2010, Texas Instruments Incorporated Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 www.ti.com SBOS410E – JUNE 2007 – REVISED JUNE 2010 TEMPERATURE DRIFT The REF50xx is designed for minimal drift error, which is defined as the change in output voltage over temperature. The drift is calculated using the box method, as described by the following equation: ǒ Ǔ V OUTMAX * V OUTMIN Drift + V OUT Temp Range To avoid errors caused by low-impedance loading, buffer the TEMP pin output with a suitable low-temperature drift op amp, such as the OPA333, OPA335, or OPA376, as shown in Figure 32. +V 106(ppm) (1) The REF50xx features a maximum drift coefficient of 3ppm/°C for the high-grade version, and 8ppm/°C for the standard-grade. REF50xx DNC VTEMP 2.6mV/°C OPA (1) VIN TEMP DNC NC VOUT GND TRIM/NR space THERMAL HYSTERESIS NOTE: (1) Low drift op amp, such as the OPA333, OPA335, or OPA376. Thermal hysteresis for the REF50xx is defined as the change in output voltage after operating the device at +25°C, cycling the device through the specified temperature range, and returning to +25°C. It can be expressed as Equation 2: VHYST = ( ( |VPRE - VPOST| · 106(ppm) VNOM (2) Where: VHYST = thermal hysteresis (in units of ppm). VNOM = the specified output voltage. VPRE = output voltage measured at +25°C pretemperature cycling. VPOST = output voltage measured after the device has been cycled from +25°C through the specified temperature range of –40°C to +125°C and returned to +25°C. Figure 32. Buffering the TEMP Pin Output POWER DISSIPATION The REF50xx family is specified to deliver current loads of ±10mA over the specified input voltage range. The temperature of the device increases according to the equation: TJ = TA + PD × qJA (3) Where: TJ = Junction temperature (°C) TA = Ambient temperature (°C) PD = Power dissipated (W) qJA = Junction-to-ambient thermal resistance (°C/W) The REF50xx junction temperature must not exceed the absolute maximum rating of +150°C. TEMPERATURE MONITORING NOISE PERFORMANCE The temperature output terminal (TEMP, pin 3) provides a temperature-dependent voltage output with approximately 60kΩ source impedance. As seen in Figure 8, the output voltage follows the nominal relationship: Typical 0.1Hz to 10Hz voltage noise for each member of the REF50xx family is specified in the Electrical Characteristics: Per Device table. The noise voltage increases with output voltage and operating temperature. Additional filtering can be used to improve output noise levels, although care should be taken to ensure the output impedance does not degrade performance. VTEMP PIN = 509mV + 2.64 × T(°C) This pin indicates general chip temperature, accurate to approximately ±15°C. Although it is not generally suitable for accurate temperature measurements, it can be used to indicate temperature changes or for temperature compensation of analog circuitry. A temperature change of 30°C corresponds to an approximate 79mV change in voltage at the TEMP pin. The TEMP pin has high output impedance (see Figure 28). Loading this pin with a low-impedance circuit induces a measurement error; however, it does not have any effect on VOUT accuracy. Copyright © 2007–2010, Texas Instruments Incorporated For additional information about how to minimize noise and maximize performance in mixed-signal applications such as data converters, refer to the series of Analog Applications Journal articles entitled, How a Voltage Reference Affects ADC Performance. This three-part series is available for download from the TI website under three literature numbers: SLYT331, SLYT339, and SLYT355 for Part I, Part II, and Part III, respectively. Submit Documentation Feedback Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 11 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 SBOS410E – JUNE 2007 – REVISED JUNE 2010 www.ti.com APPLICATION CIRCUITS NEGATIVE REFERENCE VOLTAGE DATA ACQUISITION For applications requiring a negative and positive reference voltage, the REF50xx and OPA735 can be used to provide a dual-supply reference from a 5V supply. Figure 33 shows the REF5025 used to provide a 2.5V supply reference voltage. The low drift performance of the REF50xx complements the low offset voltage and zero drift of the OPA735 to provide an accurate solution for split-supply applications. Care must be taken to match the temperature coefficients of R1 and R2. Data acquisition systems often require stable voltage references to maintain accuracy. The REF50xx family features low noise, very low drift, and high initial accuracy for high-performance data converters. Figure 34 shows the REF5040 in a basic data acquisition system. +5V Input Signal 0V to 4V +5V R1 50W ADS8326 C1 1.2nF +5V VDD +IN OPA365 -IN REF GND REF5025 DNC VIN DNC REF5040 +5V NC TEMP VOUT GND TRIM/NR +2.5V 1mF R1 10kW VIN CBYPASS 1mF GND VOUT C2 22mF R2 10kW Figure 34. Basic Data Acquisition System +5V OPA735 -2.5V -5V NOTE: Bypass capacitors not shown. Figure 33. The REF5025 and OPA735 Create Positive and Negative Reference Voltages 12 Submit Documentation Feedback Copyright © 2007–2010, Texas Instruments Incorporated Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 REF5010, REF5020 REF5025, REF5030 REF5040, REF5045, REF5050 www.ti.com SBOS410E – JUNE 2007 – REVISED JUNE 2010 REVISION HISTORY Changes from Revision D (April, 2009) to Revision E Page • Updated Features list; added Excellent Long-Term Stability bullet ...................................................................................... 1 • Added Thermal Hysteresis parameters and specifications .................................................................................................. 4 • Added Long-Term Stability parameters and specifications .................................................................................................. 4 • Added Figure 22 through Figure 24 ...................................................................................................................................... 8 • Added Figure 25 through Figure 27 ...................................................................................................................................... 9 • Added Thermal Hysteresis section ..................................................................................................................................... 11 • Revised Noise Performance section; added paragraph with links to applications articles ................................................. 11 Changes from Revision C (December, 2008) to Revision D Page • Removed all notes regarding MSOP-8 package status. MSOP-8 package released at time of document revision ............ 1 • Changed Storage Temperature Range absolute minimum value from –55°C to –65°C ...................................................... 2 • Added test condition to Line Regulation, All other devices specification .............................................................................. 4 • Added Load Regulation test condition and Over Temperature specifications ...................................................................... 4 • Added typical characteristic graph, Quiescent Current vs Input Voltage (Figure 10) ........................................................... 6 Copyright © 2007–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): REF5010 REF5020 REF5025 REF5030 REF5040 REF5045 REF5050 13 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) REF5010AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5010 A REF5010AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50G REF5010AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50G REF5010AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5010 A REF5010ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5010 REF5010IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50G REF5010IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50G REF5010IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5010 REF5020AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5020 A REF5020AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5020 A REF5020AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50A REF5020AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50A REF5020AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5020 A REF5020AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5020 A Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) REF5020ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5020 REF5020IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5020 REF5020IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50A REF5020IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50A REF5020IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5020 REF5020IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5020 REF5025AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5025 A REF5025AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5025 A REF5025AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50B REF5025AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50B REF5025AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5025 A REF5025AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5025 A REF5025ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5025 REF5025IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5025 REF5025IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50B REF5025IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50B Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) REF5025IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5025 REF5025IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5025 REF5030AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5030 A REF5030AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5030 A REF5030AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50C REF5030AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50C REF5030AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5030 A REF5030AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5030 A REF5030ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5030 REF5030IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5030 REF5030IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50C REF5030IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50C REF5030IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5030 REF5030IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5030 REF5040AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5040 A REF5040AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5040 Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) A REF5040AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50D REF5040AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50D REF5040AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5040 A REF5040AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5040 A REF5040ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5040 REF5040IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5040 REF5040IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50D REF5040IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50D REF5040IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5040 REF5040IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5040 REF5045AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5045 A REF5045AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5045 A REF5045AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50E REF5045AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50E REF5045AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5045 A Addendum-Page 4 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) REF5045AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5045 A REF5045ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5045 REF5045IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5045 REF5045IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50E REF5045IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50E REF5045IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5045 REF5045IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5045 REF5050AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5050 A REF5050AIDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5050 A REF5050AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50F REF5050AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50F REF5050AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5050 A REF5050AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5050 A REF5050ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5050 REF5050IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5050 REF5050IDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50F Addendum-Page 5 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) REF5050IDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 R50F REF5050IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5050 REF5050IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 REF 5050 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF REF5020, REF5025, REF5040, REF5050 : Addendum-Page 6 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 • Enhanced Product: REF5020-EP, REF5025-EP, REF5040-EP, REF5050-EP NOTE: Qualified Version Definitions: • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 7 PACKAGE MATERIALS INFORMATION www.ti.com 5-Jun-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing REF5010AIDGKR VSSOP DGK 8 REF5010AIDGKT VSSOP DGK REF5010AIDR SOIC D REF5010IDGKR VSSOP REF5010IDGKT VSSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5010IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5020AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5020AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5020AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5020IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5020IDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5020IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5025AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5025AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5025AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5025IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5025IDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5025IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 5-Jun-2013 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant REF5030AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5030AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5030AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5030IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5030IDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5030IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5040AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5040AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5040AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5040IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5040IDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5040IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5045AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5045AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5045AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5045IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5045IDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5045IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5050AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5050AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5050AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 REF5050IDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5050IDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 REF5050IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Jun-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) REF5010AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5010AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5010AIDR SOIC D 8 2500 367.0 367.0 35.0 REF5010IDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5010IDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5010IDR SOIC D 8 2500 367.0 367.0 35.0 REF5020AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5020AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5020AIDR SOIC D 8 2500 367.0 367.0 35.0 REF5020IDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5020IDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5020IDR SOIC D 8 2500 367.0 367.0 35.0 REF5025AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5025AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5025AIDR SOIC D 8 2500 367.0 367.0 35.0 REF5025IDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5025IDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5025IDR SOIC D 8 2500 367.0 367.0 35.0 REF5030AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5030AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0 Pack Materials-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 5-Jun-2013 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) REF5030AIDR SOIC D 8 2500 367.0 367.0 35.0 REF5030IDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5030IDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5030IDR SOIC D 8 2500 367.0 367.0 35.0 REF5040AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5040AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5040AIDR SOIC D 8 2500 367.0 367.0 35.0 REF5040IDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5040IDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5040IDR SOIC D 8 2500 367.0 367.0 35.0 REF5045AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5045AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5045AIDR SOIC D 8 2500 367.0 367.0 35.0 REF5045IDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5045IDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5045IDR SOIC D 8 2500 367.0 367.0 35.0 REF5050AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5050AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5050AIDR SOIC D 8 2500 367.0 367.0 35.0 REF5050IDGKR VSSOP DGK 8 2500 367.0 367.0 35.0 REF5050IDGKT VSSOP DGK 8 250 210.0 185.0 35.0 REF5050IDR SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 4 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service 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