SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS061A – D2932, MARCH 1987 – REVISED OCTOBER 1993 • SN54F240 . . . J PACKAGE SN74F240 . . . DB, DW, OR N PACKAGE (TOP VIEW) 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND description These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ′F241 and ′F244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical OE (active-low output-enable) inputs, and complementary OE and OE inputs. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 2Y4 1A1 1OE VCC SN54F240 . . . FK PACKAGE (TOP VIEW) The ′F240 is organized as two 4-bit buffers/line drivers with separate output enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. 1A2 2Y3 1A3 2Y2 1A4 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 The SN74F240 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. 2OE • The SN54F240 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74F240 is characterized for operation from 0°C to 70°C. FUNCTION TABLE (each buffer) INPUTS OUTPUT Y OE A L H L L L H H X Z Copyright 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1 SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS061A – D2932, MARCH 1987 – REVISED OCTOBER 1993 logic symbol† 1OE 1A1 1A2 1A3 1A4 1 logic diagram (positive logic) 1 1OE EN 2 18 4 16 6 14 8 12 1Y1 2 18 4 16 1A1 1Y2 1Y3 1A2 14 1Y3 1A3 2OE EN 8 2A1 2A2 2A3 2A4 11 9 13 7 15 5 17 3 1Y2 1Y4 6 19 1Y1 12 1Y4 1A4 2Y1 2Y2 2Y3 19 2OE 2Y4 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 11 9 13 7 15 5 17 3 2Y1 2A1 2A2 2Y2 2Y3 2A3 2A4 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 1.2 V to 7 V Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA to 5 mA Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . – 0.5 V to 5.5 V Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC Current into any output in the low state: SN54F240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74F240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Operating free-air temperature range: SN54F240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74F240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed. 2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS061A – D2932, MARCH 1987 – REVISED OCTOBER 1993 recommended operating conditions SN54F240 SN74F240 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 0.8 V Input clamp current – 18 – 18 mA IOH IOL High-level output current – 12 – 15 mA 64 mA TA Operating free-air temperature 70 °C High-level input voltage 2 2 Low-level output current V 48 – 55 125 V 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V VCC = 4.75 V, VOL VCC = 4 4.5 5V IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, II IIH VCC = 5.5 V, VCC = 5.5 V, IIL IOS‡ VCC = 5.5 V, VCC = 5.5 V, ICC VCC = 5.5 V II = – 18 mA IOH = – 3 mA IOH = – 12 mA IOH = – 15 mA SN54F240 TYP† MAX MIN – 1.2 2.4 3.3 2 3.2 IOH = – 3 mA IOL = 48 mA – 1.2 2.4 3.3 2 3.1 UNIT V V 2.7 0.38 IOL = 64 mA VO = 2.7 V 0.55 0.42 VO = 0.5 V VI = 7 V VI = 2.7 V VI = 0.5 V VO = 0 Outputs high SN74F240 TYP† MAX MIN V µA 50 50 – 50 – 50 µA 0.1 0.1 mA 20 20 µA –1 mA – 225 mA –1 – 100 0.55 – 225 – 100 19 29 19 29 Outputs low 50 75 50 75 Outputs disabled 42 63 42 63 mA † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–3 SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS061A – D2932, MARCH 1987 – REVISED OCTOBER 1993 switching characteristics (see Note 2) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50 pF, RL = 500 Ω, TA = 25°C VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX† ′F240 tPLH tPHL Any A Y tPZH tPZL OE Y tPHZ tPLZ OE Y SN54F240 SN74F240 MIN TYP MAX MIN MAX MIN 2.2 4.7 7 2.2 9 2.2 8 1.2 3.1 4.7 1.2 6 1.2 5.7 1.2 3.1 5.3 1.2 6.7 1.2 6.1 3.2 6.5 9 3.2 10.5 3.2 10 1.2 3.6 5.3 1.2 6.5 1.2 6.3 1.2 5.6 8 1.2 12.5 1.2 9.5 † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 2: Load circuits and waveforms are shown in Section 1. 2–4 POST OFFICE BOX 655303 UNIT • DALLAS, TEXAS 75265 MAX ns ns ns PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 5962-9758501Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629758501Q2A SNJ54F 240FK 5962-9758501QRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9758501QR A SNJ54F240J 5962-9758501QSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9758501QS A SNJ54F240W JM38510/33201B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 33201B2A JM38510/33201BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 33201BRA JM38510/33201BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 33201BSA M38510/33201B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 33201B2A M38510/33201BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 33201BRA M38510/33201BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 33201BSA SN54F240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54F240J SN74F240DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI 0 to 70 SN74F240DBR NRND SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DBRE4 NRND SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DBRG4 NRND SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) SN74F240DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74F240N SN74F240NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74F240N SN74F240NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F240 SN74F240NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F240 SN74F240NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F240 SNJ54F240FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 59629758501Q2A SNJ54F 240FK SNJ54F240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9758501QR A SNJ54F240J SNJ54F240W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9758501QS A SNJ54F240W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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OTHER QUALIFIED VERSIONS OF SN54F240, SN74F240 : • Catalog: SN74F240 • Military: SN54F240 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Military - QML certified for Military and Defense Applications Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74F240DBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74F240DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74F240NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74F240DBR SSOP DB 20 2000 367.0 367.0 38.0 SN74F240DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74F240NSR SO NS 20 2000 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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