E2E1019-27-Y3 ¡ Semiconductor MSM65352/65352B ¡ Semiconductor ThisMSM65352/65352B version: Jan. 1998 Previous version: Nov. 1996 8-Bit Microcontroller with 4-Bit A/D Converter (with LCD Driver) GENERAL DESCRIPTION The MSM65352 is a high performance 8-bit microcontroller that employs OKI original CPU core, the nX-8/50. The MSM65352 includes 8K-byte program memory, 256-byte data memory, LCD driver, timer, serial I/O and 4-bit A/D converter. Also available is the MSM65352B, which has four LCD outputs in place of four output ports. Also available are the MSM65P352 and MSM65P352B, which replace the on-chip program memory with one-time PROM. FEATURES • Operating range Operating voltage Operating temperature Operating frequency: (dual clock) : : : : : : 2.7V to 5.5V –20°C to +70°C High speed side 0 to 10MHz (@VDD=5V±10%) 0 to 5MHz (@VDD=2.7V to 5.5V) Low speed side 32.768kHz (@VDD=2.7V to 5.5V) • Current consumption (Typ.): High speed side 5mA (@5MHz, VDD=3V) 20mA (@10MHz, VDD=5V) 1.5mA (@5MHz, VDD=3V, halt mode) Low speed side : 45mA (@32.768kHz, VDD=3V) 4mA (@VDD=3V, stop mode) • Minimum instruction execution time : 400ns (@10MHz), 800ns (@5MHz) • CPU core : 8-bit CPU core nX-8/50 • General memory space : 8K-byte program memory • Local memory space : 256-byte data memory + SFR • LCD driver : 16 ¥ 4 (MSM65352), 20 ¥ 4 (MSM65352B) • I/O port : 5 ports, 31 bits (MSM65352) 4 ports, 27 bits (MSM65352B) Input-output port : 2 ports ¥ 8 bits, 1 port ¥ 1 bit Input port : 1 port ¥ 1 bit 1 port ¥ 4 bits (Only for MSM65352) Output port : 1 port ¥ 8 bits, 1 port ¥ 1 bit • Timer : 8-bit auto-reload timer ¥ 2 Watchdog timer ¥ 1 Watch timer (counter clock is fixed at XT=32.768kHz) • Counter : Time base counter ¥ 1 (14 bits) • Serial I/O : 1ch, clock sync ¥ 1 • A/D converter : 4-bit ¥ 8-ch, with reference current cutoff function • Remote control input circuit : Receives signal in 32kHz/5MHz/10MHz operations • Interrupt source : 9 sources • Package: 64-pin plastic QFP (QFP64-P-1414-0.80-BK)(Product name: MSM65352-¥¥¥GS-BK, MSM65352B-¥¥¥GS-BK) ¥¥¥ indicates the code number. 1/15 ¡ Semiconductor • Others MSM65352/65352B : CPU clock can be an OSC, half-OSC, or XT clock. Time base counter can be selected with 1/4n of a CPU clock (n=1 to 8). 2/15 ROM (8K bytes) WATCH TIMER CPU CORE INST. DEC. RAM (256 bytes) GMAR ALU T/C PC IR VDD BUS CONT. GND AR BR 4-bit A/D C ¥ 8ch ¡ Semiconductor OSC. CONT. BLOCK DIAGRAM XT XT OCS0 OSC1 RESET HSTOP* CLKOUT* PSW SP LMAR LCD DRIVER I/O PORT WDT 8-bit TIMER ¥ 2 T1OUT* T0CK* GATE* SIO (SYNC MODE) SFTO1* SFTI1* SFTCK1* INTERRUPT CONT. INT0* INT1* REMOTE CONT. RMCIN* MSM65352/65352B VDDL VDD3 VDD2 VDD1 COM1 COM4 SEG0 SEG15 SEG16** SEG19** P4** P3 P2 P1 P0 AGND AI0-7* AVDD 3/15 *Secondary function of each port. **P4: for the MSM65352 SEG16-19: for the MSM65352B TBC ¡ Semiconductor MSM65352/65352B AGND 15 P3.7/AI7 16 49 P4.0* 50 P4.1** 54 P4.2*** 52 P4.3**** 53 P2.2 54 P2.1(TEST) 55 P2.0(IN) 57 P1.6/SFTI1 58 P1.5/SFTCK1 60 P1.3 61 P1.2 62 P1.1 56 P1.7/SFTO1 41 SEG8 40 SEG7 39 SEG6 38 SEG5 37 SEG4 36 SEG3 35 SEG2 34 SEG1 33 SEG0 COM4 32 XT 13 RESET 14 42 SEG9 COM3 31 XT 12 43 SEG10 COM2 30 GND 11 44 SEG11 COM1 29 9 OSC1 10 45 SEG12 VDD1 27 OSC0 46 SEG13 VDDL 28 8 47 SEG14 VDD2 26 7 P0.0/INT0 48 SEG15 VDD3 25 P0.1/HSTOP AVDD 24 6 P3.0/AI0 23 5 P3.1/AI1 22 P0.3/T0CK P0.2/T1OUT P3.2/AI2 21 4 P3.3/AI3 20 3 P3.4/AI4 19 P0.5/CLKOUT P0.4/INT1/GATE 63 P1.0 64 VDD 2 P3.5/AI5 18 1 P0.6 P3.6/AI6 17 P0.7 59 P1.4/RMCIN PIN CONFIGURATION (TOP VIEW) * SEG16 for MSM65352B ** SEG17 for MSM65352B *** SEG18 for MSM65352B **** SEG19 for MSM65352B 64-Pin Plastic QFP 4/15 ¡ Semiconductor MSM65352/65352B PIN DESCRIPTION Basic Function Function Power Supply Pin Symbol Type 64 VDD — Digital supply voltage (5V) Description 11 GND — Digital ground 24 AVDD — Analog supply voltage (5V) 15 AGND — Analog ground 27 VDD1 — Bias input for LCD driver 26 VDD2 — Bias input for LCD driver 25 VDD3 — Bias input for LCD driver 28 VDDL — Ground for LCD driver bias 9 OSC0 I Oscillation input pin on the OSC side: Connect to a quartz oscillator (ceramic resonator), or input external clock. Oscillation output pin on the OSC side: Oscillation 10 OSC1 O Connect to a quartz oscillator (ceramic resonator). When external clock is input to the OSC0 pin, the OSC1 pin should be kept open. 13 XT I 12 XT O 14 RESET I Oscillation input pin on the XT side: Connect to a quartz oscillator of 32.768kHz. Oscillation output pin on the XT side: Connect to a quartz oscillator of 32.768kHz. System reset input: When this pin is set to the "L" level, the internal Control status is initialized to start execution of instructions from address 0040H. The input is pulled up to VDD with an internal pull-up resistor. 5/15 ¡ Semiconductor MSM65352/65352B Basic Function (Continued) Function Pin Symbol Type Description 8-bit Input-output port (port 0): Each of bits 0 to 7 is configured to be an input or 8 P0.0 to to 1 P0.7 an output by the direction register of port 0 I/O (P0DIR). In addition to the basic function as the Input-output port, a secondary function is allocated to each of P0.0 through P0.7. Refer to the next table. 8-bit Input-output port (port 1): 63 P1.0 to to 56 P1.7 Each of bits 0 to 7 is configured to be input or I/O output by the direction register of port 1 (P1DIR). In addition to the basic function as the Input-output port, a secondary function is allocated to each of P1.0 through P1.7. Refer to the next table. Port 55 P2.0 (IN) I Input port (port 2.0) Output port (port 2.1) 54 P2.1 (TEST) O Pulled high at the time of reset. If this pin is set to the "0" level during reset, this IC goes into a test mode, disabling execution of the user program. LCD Driver 53 P2.2 23 P3.0 to to 16 P3.7 49 P4.0 to to 52 P4.3 29 COM1 to to 32 COM4 33 SEG0 to to 48 SEG15 I/O Input-output port (port 2.2) 8-bit input port (port 3): I Each of P3.0 to P3.7 functions as analog input channel of A/D converter. 4-bit output port: O O These pins are valid only for the MSM65352. LCD common signal output pins LCD segment signal output pins O In the case of MSM65352B, SEG0 to SEG19 and Pin 33 to Pin 52 are used. 6/15 ¡ Semiconductor MSM65352/65352B Secondary Function Function Pin Symbol Type Description Secondary function of P0.0: 8 INT0 I Input pin for external interrupt 0. This pin can receive an input at the rising edge, falling edge, or both the rising/falling edges. External Interrupt Secondary function of P0.4: Input pin for external interrupt 1. This pin can 4 INT1 I receive input at the rising edge, falling edge or both the rising/falling edges. Also used as a gate signal input pin to enable or disable the count of timer 0. Secondary function of P0.1: Hardware stop mode input pin. When this pin is Control 7 HSTOP I set to the "L" level while the HSTP bit in SBYCON is set to "1", the hardware stop mode is entered. In the hardware stop mode, oscillation on the OSC side is stopped for low power consumption. Timer 0 5 T0CK I Secondary function of P0.3: External clock input pin for timer 0. Secondary function of P0.2: Timer 1 6 T1OUT O Output pin that provides waveform with twice the cycle of the overflow of timer 1. A/D Converter 23 AI0 to to 16 AI7 Secondary function of P3.0 to 3.7: I These are used for analog channels during A/D conversion. Secondary function of P0.5: Clock Output 3 CLKOUT O Output pin that provides clocks equal to OSCCLK divided by 2 or 4, and also clocks equal to XTCLK divided by 2 or 4. Remote Control Input 59 RMCIN I 56 SFTO1 O 57 SFTI1 I Shift Register Secondary function of P1.4: Input pin for remote control. Secondary function of P1.7: Data output pin for shift register 1. Secondary function of P1.6: Data input pin for shift register 1. Secondary function of P1.5: Sync clock I/O pin for shift register 1. 58 SFTCK1 I/O This provides clock output when used as the master, while it functions as clock input when used as a slave. 7/15 ¡ Semiconductor MSM65352/65352B ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Symbol VI Output Voltage VO Storage Temperature Rating Ta = 25°C –0.3 to VDD+0.3 PD TSTG Unit –0.3 to 7.0 VDD Input Voltage Power Dissipation Condition V –0.3 to VDD+0.3 Ta = 25°C, per package 400 Ta = 25°C, per output 50 — –55 to +150 °C Unit mW RECOMMENDED OPERATING CONDITIONS Parameter Symbol Condition Range VDD — 2.7 to 5.5 VDDMH fOSC = 0Hz 2.0 to 5.5 fOSC — 1 to 10 MHz fXT VDD = 2.7 to 5.5 32.768 kHz Operating Frequency*2 fEXTCLK — 0 to 10 MHz Operating Temparature Top — –20 to +70 °C Supply Voltage Memory Hold Voltage Oscillation Frequency*1 External Clock V *1 Determined by the crystal oscillator or ceramic resonator to be used. *2 External clock cannot be used in the XT pin. 8/15 ¡ Semiconductor MSM65352/65352B ELECTRICAL CHARACTERISTICS DC Characteristics 1 (VDD=4.5 to 5.5V) Condition Min. Typ. Max. *1 VIH1 CPUCLK=1MHz 2.4 — — *2 VIH2 CPUCLK=1MHz 0.7VDD — — VIL CPUCLK=1MHz — — 0.8 Parameter "H" Input Voltage 1 "H" Input Voltage 2 (GND = 0V, Ta = –20 to +70˚C) Symbol "L" Input Voltage "H" Output Voltage 1 *3 VOH1 IOH = –200mA 0.75VDD — — "H" Output Voltage 2 *4 VOH2 IOH = –400mA 0.75VDD — — "L" Output Voltage 1 *3 VOL1 IOL = 1.6mA — — 0.4 "L" Output Voltage 2 *4 VOL2 IOL = 3.2mA — — 0.4 Input Leakage Current *5 ILI2 VI = VDD/0V — — ±10 "L" Input Current *6 IIL VI = 0V, VDD = 5V –40 –200 –400 CI f = 1MHz, Ta = 25˚C Input Capacitance Operating Current Consumption VDD = 5V XT = 32kHz OSC = 10MHz *1 *2 *3 *4 *5 *6 *7 *8 *9 Unit V mA — 5 — pF *7 — 15 30 mA *8 — 30 60 mA IDD3 CPUCLK = 32kHz, HALT mode CPUCLK = 32kHz, no load. *9 — 80 160 mA IDD4 CPUCLK = 10MHz, HALT mode *7 — 8 16 mA — 20 40 mA IDD1 IDD2 IDD5 Stop mode CPUCLK = 10MHz, no load. Excluding OSC0 and RESET Only for OSC0 and RESET Excluding P4 Only for P4 Excluding RESET Only for RESET Measured when LCD is operated Measured when OSC clock is stopped but LCD is operated without load Measured when OSC clock is stopped 9/15 ¡ Semiconductor MSM65352/65352B DC Characteristics 2 (2.7V£VDD<4.5V) (GND = 0V, Ta = –20 to +70˚C) Symbol Condition Min. *1 VIH1 CPUCLK=1MHz 0.3VDD +0.9 *2 VIH2 CPUCLK=1MHz VIL Parameter "H" Input Voltage 1 "H" Input Voltage 2 "L" Input Voltage Max. — — 0.6VDD +0.6 — — CPUCLK=1MHz — — 0.3VDD –0.1 — — *10 "H" Output Voltage 1 *3 VOH1 IOH = –10mA 0.75VDD *11 "H" Output Voltage 2 *4 VOH2 IOH = –20mA 0.75VDD — — "L" Output Voltage 1 *3 VOL1 IOL = 10mA — — 0.1 "L" Output Voltage 2 *4 VOL2 IOL = 20mA — — 0.1 Input Leakage Current *5 ILI2 VI = VDD/0V — — ±10 "L" Input Current *6 IIL VI = 0V, VDD = 3V –40 –125 –250 CI f = 1MHz, Ta = 25˚C Input Capacity Operating Current Consumption VDD = 3V XT = 32KHz OSC = 5MHz Unit Typ. V mA — 5 — pF Stop mode CPUCLK = 32kHz, HALT mode *8 — 4 8 mA — 15 30 mA CPUCLK = 32kHz, no load. *9 — 45 90 mA IDD4 CPUCLK = 5MHz, HALT mode *7 — 1.5 3 mA IDD5 CPUCLK = 5MHz, no load. — 5 14 mA IDD1 IDD2 IDD3 *7 *1 Excluding OSC0 and RESET *2 Only for OSC0 and RESET *3 Excluding P4 *4 Only for P4 *5 Excluding RESET *6 Only for RESET *7 Measured when LCD is operated *8 Measured when OSC clock is stopped but LCD is operated without load *9 Measured when OSC clock is stopped *10 More than 3.375V *11 Less than 0.8V 10/15 ¡ Semiconductor MSM65352/65352B A/D Converter Characteristics 1 (VDD=AVDD=5V, GND=AGND=0V, Ta=–20 to +70°C) Parameter Symbol Condition Min. Typ. Max. AINFH (ADOUT)=FH 4.77 5.00 — AINEH (ADOUT)=EH 4.45 4.53 4.61 AINDH (ADOUT)=DH 4.14 4.22 4.30 AINCH (ADOUT)=CH 3.83 3.91 3.98 AINBH (ADOUT)=BH 3.52 3.59 3.67 AINAH (ADOUT)=AH 3.20 3.28 3.36 A/D Conversion AIN9H (ADOUT)=9H 2.89 2.97 3.05 Analog Input AIN8H (ADOUT)=8H 2.58 2.66 2.73 Detecting Voltage AIN7H (ADOUT)=7H 2.27 2.34 2.42 AIN6H (ADOUT)=6H 1.95 2.03 2.11 AIN5H (ADOUT)=5H 1.64 1.72 1.80 AIN4H (ADOUT)=4H 1.33 1.41 1.48 AIN3H (ADOUT)=3H 1.02 1.09 1.17 AIN2H (ADOUT)=2H 0.70 0.78 0.86 AIN1H (ADOUT)=1H 0.39 0.47 0.55 AIN0H (ADOUT)=0H — 0.00 0.23 tSET — — 60 200 A/D Conversion Settling Time Unit V ms 11/15 ¡ Semiconductor MSM65352/65352B A/D Converter Characteristics 2 (VDD=AVDD=3V, GND=AGND=0V, Ta=–20 to +70°C) Parameter Symbol Condition Min. Typ. Max. AINFH (ADOUT)=FH 2.88 3.00 — AINEH (ADOUT)=EH 2.69 2.72 2.75 AINDH (ADOUT)=DH 2.50 2.53 2.56 AINCH (ADOUT)=CH 2.32 2.34 2.37 AINBH (ADOUT)=BH 2.13 2.16 2.18 AINAH (ADOUT)=AH 1.94 1.97 2.00 A/D Conversion AIN9H (ADOUT)=9H 1.75 1.78 1.81 Analog Input AIN8H (ADOUT)=8H 1.57 1.59 1.62 Detecting Voltage AIN7H (ADOUT)=7H 1.38 1.41 1.43 AIN6H (ADOUT)=6H 1.19 1.22 1.25 AIN5H (ADOUT)=5H 1.00 1.03 1.06 AIN4H (ADOUT)=4H 0.82 0.89 0.87 AIN3H (ADOUT)=3H 0.63 0.66 0.68 AIN2H (ADOUT)=2H 0.44 0.47 0.50 AIN1H (ADOUT)=1H 0.25 0.28 0.31 AIN0H (ADOUT)=0H — 0.00 0.12 tSET — — 60 200 A/D Conversion Settling Time Unit V ms 12/15 ¡ Semiconductor MSM65352/65352B AC Characteristics • CPU control Parameter RESET Pulse Width (VDD = 2.7 to 5.5V, GND = 0V, Ta = –20 to +70˚C) Symbol Condition Min. Max. Unit tRESW — 20 — ns • Peripheral control 1 (VDD = 2.7 to 5.5V, GND = 0V, Ta = –20 to +70˚C) Parameter OSC Clock Cycle Clock "L" Pulse Width External Interrupt EXI Pulse Width Symbol tC Condition Min. Max. VDD = 4.5 to 5.5V 100 — 2.7V £ VDD < 4.5V 200 — tCLW — 0.45 tC 0.55 tC tEXIW — 4 tC — • Peripheral control 2 Parameter OSC ns (VDD = 2.7 to 5.5V, GND = 0V, Ta = –20 to +70˚C) Symbol Condition Min. Max. VDD = 4.5 to 5.5V 100 — 2.7V £ VDD < 4.5V Clock Cycle tC 200 — SFTCK1 Cycle tSFC 8 tC — SFTCK1 "L" Pulse Width tSFCLW tSFCHW 4 tC –20 4 tC –20 — SFTCK1 "H" Pulse Width tSFCLW–100 — SFT1 SFTO1 Setup Time Unit tSFOS CL = 100 pF — SFTO1 Hold Time tSFOH tSFCHW–100 — SFTI1 Setup Time tSFIS 100 — SFTI 1Hold Time tSFIH 100 — Unit ns See Timing Diagram. 13/15 ¡ Semiconductor MSM65352/65352B Timing Diagram • CPU control 1) RESET pulse width tRESW RESET • Peripheral control 1 tC OSC0 tCLW 1) EXI pulse width tEXIW INT0 - 2 • Peripheral control 2 1) SFT1 tSFC tSFCLW tSFCHW tSFOS tSFOH tSFIS tSFIH SFTCK SFTO1 SFTI1 14/15 ¡ Semiconductor MSM65352/65352B PACKAGE DIMENSIONS (Unit : mm) QFP64-P-1414-0.80-BK Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.87 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 15/15