TI OPA361AIDCKTG4

OPA361
SBOS334A − SEPTEMBER 2005 − REVISED JANUARY 2006
3V VIDEO AMPLIFIER
with Internal Gain and Filter in SC70
FEATURES
D
D
D
D
DESCRIPTION
EXCELLENT VIDEO PERFORMANCE
INTERNAL GAIN: 5.2V/V
SUPPORTS TV-DETECTION
COMPATIBLE WITH OMAP242x and
DAVINCIE PROCESSORS
2-POLE RECONSTRUCTION FILTER
The OPA361 high-speed amplifier is optimized for 3V
portable video applications. It is specifically designed to be
compatible with the video encoders embedded in Texas
Instruments’ OMAP2420 and DaVinci processors or other
application processors with 0.5VPP video output. The input
common-mode range includes GND, which allows a
video-DAC (digital-to-analog converter) to be DC-coupled
to the OPA361. The TV-detection feature simplifies the
end-user interface significantly by facilitating the
automatic start/stop of video transmission.
D
D INPUT RANGE INCLUDES GROUND
− DC-Coupled Input
D INTEGRATED LEVEL SHIFTER
D
D
D
D
D
D
The output swings within 5mV of GND and 250mV to V+
with a standard back-terminated video load (150Ω). An
internal level shift circuit prevents the output from
saturating with 0V input, thus preventing sync-pulse
clipping in common video circuits. Therefore, the OPA361
is ideally suited for DC-coupling to the video load.
− DC-Coupled Output(1)
− No Output Capacitors Needed
RAIL-TO-RAIL OUTPUT
LOW QUIESCENT CURRENT: 5.3mA
SHUTDOWN CURRENT: 1.5mA
SINGLE-SUPPLY: 2.5V to 3.3V
SC70-6 PACKAGE: 2.0mm x 2.1mm
RoHS COMPLIANT
The OPA361 has been optimized for space-sensitive
applications by integrating internal gain setting resistors
(G = 5.2V/V) and a 2-pole video-DAC reconstruction filter.
(1) Internal circuitry avoids output saturation, even with 0V sync tip
level at the input video signal.
APPLICATIONS
D CAMERA PHONES
In shutdown mode, the quiescent current is reduced to
< 1.5µA, dramatically reducing power consumption and
prolonging battery life.
The OPA361 is available in the tiny 2mm x 2.1mm SC70-6
package.
V+
RELATED LOW VOLTAGE VIDEO AMPS
OPA361
10mV
FEATURES
2−Pole
Filter
+In
75Ω
Out
500Ω
RSET
4kΩ
Enable
PRODUCT
2.7V to 3.3V, 70MHz, 6mA IQ, 5µA Sleep, SC70
OPA358
2.7V to 3.3V, Filter, SAG, G = 2, 5µA Sleep, SC70
OPA360
2.7V to 5.5V, 200MHz, 300V/µs, 6µA Sleep, SOT23
OPA355
2.7V to 5.5V, 100MHz, 150V/µs, 6µA Sleep, SOT23
OPA357
G = 5.2V/V
Shutdown
Control
(see note 1)
GND
(1) Closed when enabled during normal operation; open when shut down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
DAVINCI is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners.
Copyright  2005, Texas Instruments Incorporated
! ! www.ti.com
"#$
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SBOS334A − SEPTEMBER 2005 − REVISED JANUARY 2006
ORDERING INFORMATION(1)
PRODUCT
PACKAGE
PACKAGE DESIGNATOR
OPA361
SC70-6
DCK
PACKAGE MARKING
AUY
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website
at www.ti.com.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
ABSOLUTE MAXIMUM RATINGS(1)
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2) Input terminals are diode-clamped to the power-supply rails.
Input signals that can swing more than 0.5V beyond the supply
rails should be current-limited to 10mA or less.
(3) Short-circuit to ground.
2
Top View
SC70
+In
1
GND
2
RSET
3
AUY
Supply Voltage, V+ to V− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.6V
Signal Input Terminals, Voltage(2) . . . . . . . . −0.5V to (V+) + 0.5V
Current(2) . . . . . . . . . . . . . . . . . . . ±10mA
Output Short-Circuit through 75Ω to GND(3) . . . . . . . Continuous
Operating Temperature . . . . . . . . . . . . . . . . . . . . . −40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +160°C
ESD Rating:
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5000V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000V
PIN CONFIGURATION
6
V+
5
Enable
4
Out
NOTE: The location of pin 1 on the OPA361 is determined by orienting
the package marking as shown in the diagram above.
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SBOS334A − SEPTEMBER 2005 − REVISED JANUARY 2006
ELECTRICAL CHARACTERISTICS: VS = +2.5V to +3.3V
Boldface limits apply over the temperature range, TA = −40°C to +125°C.
At TA = +25°C, RL = 150Ω connected to GND, unless otherwise noted.
OPA361
PARAMETER
CONDITIONS
MIN
VS = +2.8V, VIN = GND
−3
TYP
MAX
11
55
UNITS
OFFSET LEVEL-SHIFT VOLTAGE
Output Level-Shift Voltage(1)
VOLS
Over Temperature
vs Power Supply
PSRR
VS = +2.5V to +3.3V
mV
20
mV
±80
µV/V
INPUT VOLTAGE RANGE
Input Voltage Range(2)
Input Resistance (+In)
RSET Resistance
VCM
VS = 2.5V
GND
0.42
V
VS = 2.8V
GND
0.48
V
VS = 3.3V
GND
0.55
V
Ω
RIN
450
510
550
RSET
3600
4070
4400
2
0.5
∆VOUT/∆VIN, VS = +2.5V, VINMIN = 0V, VINMAX = 0.42V
∆VOUT/∆VIN, VS = +2.8V, VINMIN = 0V, VINMAX = 0.48V
5.06
5.17
5.28
V/V
5.06
5.17
5.28
V/V
∆VOUT/∆VIN, VS = +3.3V, VINMIN = 0V, VINMAX = 0.55V
5.06
5.17
5.28
V/V
Matching of RIN and RSET
Ω
%
VOLTAGE GAIN
FREQUENCY RESPONSE
Filter Response
Cutoff Frequency
9
MHz
Normalized Gain: fIN = 4.5MHz
f−3dB
VO = 2VPP
−0.1
dB
fIN = 27MHz
VO = 2VPP
−18
dB
fIN = 54MHz
VO = 2VPP
−23
dB
Differential Gain Error
RL = 150Ω
1.2
%
Differential Phase Error
RL = 150Ω
1.6
degrees
100kHz, 4.5MHz
26
ns
100% White Signal
65
dB
Group Delay Variation
Signal-to-Noise Ratio
SNR
OUTPUT
Positive Voltage Output Swing from Rail
VS = +2.8V, VIN = 0.7V, RL = 150Ω to GND
130
250
mV
Negative Voltage Output Swing from Rail
VS = +2.8V, VIN = −0.05V, RL = 150Ω to GND
0.15
5
mV
Positive Voltage Output Swing from Rail
VS = +2.8V, VIN = 0.7V, RL = 75Ω to GND
260
Negative Voltage Output Swing from Rail
VS = +2.8V, VIN = −0.05V, RL = 75Ω to GND
2
VS = +2.8V, Disabled, VO = 2V
0.3
VS = +2.8V
±80
Output Leakage
Output Current(3)
IO
mV
mV
100
nA
mA
POWER SUPPLY
Specified Voltage Range
Quiescent Current
VS
IQ
Over Temperature
2.5
VS = +2.8V, Enabled, IO = 0, VOUT = 1.4V
5.3
Specified Temperature Range
3.3
V
7.5
mA
9
mA
V
ENABLE/SHUTDOWN FUNCTION
Disabled (logic-LOW threshold)
0
0.35
Enabled (logic-HIGH threshold)
1.3
VS
Enable Time
Disable Time
50
Shutdown Current
VS = +2.8V, Disabled
1.5
V
µs
1.5
ns
3
µA
TEMPERATURE RANGE
Specified/Operating Range
−40
+125
°C
Storage Range
−65
+150
°C
Thermal Resistance
qJA
SC70
250
°C/W
(1) Output referred.
(2) Limited by output swing and internal G = 5.2V/V.
(3) See typical characteristics Output Voltage Swing vs Output Current.
3
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SBOS334A − SEPTEMBER 2005 − REVISED JANUARY 2006
TYPICAL CHARACTERISTICS: VS = 2.8V
At TA = +25°C and RL = 150Ω, unless otherwise noted.
RIN vs TEMPERATURE
RSET vs TEMPERATURE
535
4250
530
4200
525
4150
RSET (Ω)
RIN (Ω)
520
515
510
4100
4050
505
4000
500
3950
495
−50
−25
0
+25
+50
+75
+100
−50
+125 +150
−25
0
+25
+50
+75
Temperature (_C)
Temperature (_C)
RSET/RIN RATIO
vs TEMPERATURE
GAIN
vs TEMPERATURE
8.5
+100
+125 +150
+100
+125 +150
5.5
8.4
5.4
8.2
Gain (V/V)
RSET/RIN Ratio
8.3
8.1
8.0
7.9
5.3
5.2
7.8
5.1
7.7
7.6
7.5
−50
−25
5.0
0
+25
+50
+75
−25
0
+25
+50
+75
Temperature (_C)
OUTPUT VOLTAGE
vs TEMPERATURE
OUTPUT VOLTAGE
vs TEMPERATURE
2.80
VIN = −50mV
VS = 2.8V
0.003
0.002
0.001
VIN = 700mV
VS = 2.8V
2.75
Output Voltage (V)
0.004
2.70
2.65
2.60
2.55
0
2.50
−50
−25
0
+25
+50
+75
Temperature (_C)
4
−50
+125 +150
Temperature (_C)
0.005
Output Voltage (V)
+100
+100
+125 +150
−50
−25
0
+25
+50
+75
Temperature (_ C)
+100
+125 +150
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SBOS334A − SEPTEMBER 2005 − REVISED JANUARY 2006
TYPICAL CHARACTERISTICS: VS = 2.8V (continued)
At TA = +25°C and RL = 150Ω, unless otherwise noted.
VOUT LEVEL SHIFT
vs TEMPERATURE
QUIESCENT CURRENT
vs TEMPERATURE
0.05
8
Quiescent Current (mA)
0.04
VOUT Level Shift (V)
9
VS = 2.8V
VIN = 0V
0.03
0.02
0.01
0
6
5
4
−0.01
3
−50
1000000
−25
0
+25
+50
+75
+100
−50
+125 +150
−25
0
+25
+50
+75
Temperature (_ C)
Temperature (_C)
OUTPUT LEAKAGE CURRENT
vs TEMPERATURE
OUTPUT LEAKAGE
IN SHUTDOWN
+100
+125 +150
400
Enable = 0V
VPULLUP = 1.8V
Enable = 0V
350
Output Leakage Current (pA)
100000
10000
1000
100
10
1
300
250
200
150
100
50
0
−50
−100
0.1
−50
−25
0
+25
+50
+75
+100
+125 +150
0
0.5
1
1.5
2
2.5
Temperature (_C)
VPULLUP (V)
SHUTDOWN QUIESCENT CURRENT HYSTERESIS
vs TEMPERATURE
AC RESPONSE
AT VARIOUS TEMPERATURES
3
3
10000
0
−3
AC Response (dB)
1000
IQSHDN (mA)
Output Leakage Current (pA)
7
−40_C
100
+25_ C
+125_ C
10
−6
−9
+125_ C
−12
−15
−18
−21
+85_ C
−24
+25_C
−27
1
0.7
0.75
0.8
0.85
VSHDN (V)
0.9
0.95
1
−30
100k
−40_C
1M
10M
100M
Frequency (Hz)
5
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SBOS334A − SEPTEMBER 2005 − REVISED JANUARY 2006
TYPICAL CHARACTERISTICS: VS = 2.8V (continued)
At TA = +25°C and RL = 150Ω, unless otherwise noted.
TURN−ON TIME
Voltage (500mV/div)
Voltage (500mV/div)
TURN−OFF TIME
Time (1µs/div)
Time (25ns/div)
OUTPUT VOLTAGE
vs OUTPUT CURRENT
GROUP DELAY
vs FREQUENCY
100
3.0
90
2.5
80
70
Group Delay (ns)
VOUT (V)
2.0
1.5
1.0
+125_C
0.5
60
50
40
30
0_ C −25_ C −40_C
+85_ C +25_ C
20
10
0
100k
0.15
0.14
0.13
0.12
0.11
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
0
1M
Frequency (Hz)
IOUT (A)
DIFFERENTIAL GAIN
I NP = A − C S Y NC = I NT
−5
− 0. 6
DG1
%1
− 1. 0
DG2
%.
− 1. 1
DG3
%.
− 1. 2
DG4
%.
− 0. 8
DG5
%5
ST EP S
4
5
DIFFERENTIAL PHASE
I NP = A − C S Y NC = I NT
−5
DP1
DP2
DP3
DP4
DP5
6
1 .1
1 .6
1 .6
1 .5
1 .1
dg1
dg.
dg.
dg.
dg5
ST EP S
4
5
MT IM E = 10s
0
0
ZO O M
2
1
MT IM E = 10s
0
0
ZO O M
1
2
LI N E = 3 3 0
+5
M OD E
1
LI N E = 3 3 0
+5
M OD E
1
10M
100M
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SBOS334A − SEPTEMBER 2005 − REVISED JANUARY 2006
helps to automate start/stop operation of the TV-out
function and minimizes power consumption.
APPLICATIONS INFORMATION
The OPA361 video amplifier has been optimized to fit
seamlessly with Texas Instruments’ OMAP242x
Multimedia processor. The following features have been
integrated to provide excellent video performance.
D A 2-pole filter is incorporated for DAC signal
D Internal gain setting resistors (G = 5.2V/V) reduce
that avoids sync pulse clipping and allows
DC-coupled output.
the number of external components needed in the
video circuit.
reconstruction.
D The OPA361 employs an internal level shift circuit
D A shutdown feature reduces quiescent current to
less than 1.5µA—crucial for portable applications
D Integration of the 500Ω video encoder load resistor
and 4kΩ RSET resistor used by the OMAP242x
helps minimize the number of external components
and also ensures excellent ratio and temperature
tracking. This feature helps to keep the overall gain
accurate and stable over temperature.
D TV-detection support in connection with an
OMAP242x multimedia processor. This feature
Although OPA361 is optimized for the OMAP242x
processor, it is also suitable to interface with any digital
media processor that outputs a video signal on the order
of 0.4VPP to 0.5VPP.
Figure 1 shows a typical application drawing with the
OMAP242x processor and the TWL92230 Energy
Management Chip.
TWL92230
1.8V DAC
Regulator VAUX
0.5V VREF
V+ 2.8V
OMAP2420
1.8V
OPA361
Pull−Up
10kΩ
10mV
+In
Video
DAC
2−Pole
Filter
Out 75Ω
+
500Ω
75Ω
RSET
G = 5.2V/V
4kΩ
Enable
TV Detect
Shutdown
Control
(see note 1)
GPIO(3)
GND
GPIO
TV Detect
100kΩ(2)
(1) Closed when enabled during normal operation; open when shut down.
(2) Protects GPIO against overvoltage conditions during active video transmission.
(3) GPIO must be able to generate an interrupt.
Figure 1. Typical Application using the OMAP242x and the TWL92230
7
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OPERATING VOLTAGE
The Enable logic input voltage is referenced to the
OPA361 GND pin. A logic level HIGH applied to the enable
pin enables the op amp. The logic levels are compatible
with 1.8V CMOS logic levels. A valid logic HIGH is defined
as > 1.3V above GND. A valid logic LOW is defined as
< 0.35V above GND. If the Enable pin is not connected,
internal pull-up circuitry will enable the amplifier.
The OPA361 is fully specified from 2.5V to 3.3V over a
temperature range of −40_C to +125_C. Parameters that
vary significantly with operating voltages or temperature
are shown in the Typical Characteristics. Power-supply
pins should be bypassed with 100nF ceramic capacitors.
When disabling the OPA361, internal circuitry also
disconnects the internal gain setting feedback. This
feature is in support of the TV-detection function. See the
TV-Detect Function section for more detailed information.
INPUT VOLTAGE
The input common-mode range of the OPA361 series
extends from GND to 0.55V on a 3.3V supply. The input
range is limited by the internal gain in conjunction with the
maximum output swing capability and the power-supply
voltage.
INTERNAL 2-POLE FILTER
The OPA361 filter is a Sallen-Key topology with a 9MHz
cutoff frequency. Figure 2 shows a detailed drawing of the
filter components. This filter allows video signals to pass
without any visible distortion, as shown in Figure 3 through
Figure 6. The video encoder embedded in the OMAP242x
processor typically samples at 54MHz. At this frequency,
the attenuation is typically 23dB, which effectively
attenuates the sampling aliases.
INPUT OVERVOLTAGE PROTECTION
All OPA361 pins are static-protected with internal ESD
protection diodes connected to the supplies. These diodes
will provide input overdrive protection if the current is
externally limited to 10mA.
The internal 500Ω resistor on the input to GND converts
the output current of the OMAP2420 internal video DAC
into a voltage. It is also part of the Sallen-Key filter. Using
an external resistor to adjust the input voltage range will
also alter the filter characteristics.
ENABLE/SHUTDOWN
The OPA361 has a shutdown feature that disables the
output and reduces the quiescent current to less than
1.5µA. This feature is especially useful for portable video
applications, where the device is infrequently connected to
a television (TV) or other video device.
3.6pF
OPA361
2.2kΩ
(
Television
2.2kΩ
)
VO
500Ω
75Ω
12.5pF
75Ω
4.22kΩ
1kΩ
Figure 2. Filter Structure of the OPA361
8
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Video Performance
The color bar signal in Figure 3 shows excellent amplitude
characteristics and no attenuation of colors with respect to
the luminance signal.
∆: 2.02V
@: 30.0mV
The multiburst test patterns have different sine-wave burst
sections with the following frequencies: 0.5MHz, 1MHz,
2MHz, 4MHz, 4.8MHz and 5.8MHz with 420mVPP. There
is no visible attenuation even at the highest frequencies,
which indicates a very flat frequency response of the
OPA361. As shown in Figure 5 and Figure 6, the top line
illustrates the full signal and the bottom line is a more
detailed view of the last three sine wave bursts.
Figure 3. 100/75 Color Bar Signal at Output of
OPA361
The CCIR330/5 test pattern requires one of the greatest
dynamic ranges, and therefore tests the OPA361 output
voltage swing capability. The scope plot shown in Figure 4
has been taken with a 2.8V supply and shows no clipping
on the top side of the signal.
∆: 2.30V
@: 2.31mV
Figure 5. Multiburst Signal (CCIR 18/1) Shows
Very Flat Frequency Response
The CCIR17 test pattern contains a 2T and a 20T pulse,
as shown in Figure 6. The 2T pulse is used to check for
pulse distortion and reflection, and the 20T pulse is used
to check for amplitude and group delay between
chrominance and luminance. Neither pulse exhibits any
distortion or group delay artifacts.
Figure 4. CCIR330/5:
No Clipping, Even On 2.8V Supply
Figure 6. CCIR 17 2T and 20T Pulses Show No
Visible Distortion
9
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INTERNAL LEVEL SHIFT
Many common video DACs embedded in digital media
processors, like the new OMAP242x processors, operate
on a single supply (no negative supply). Typically, the
lowest point of the sync pulse output by these video DACs
is close to 0V. With a 0V input, the output of a common
single-supply op amp saturates at a voltage > 0V. This
effect would clip the sync pulse, and therefore degrade the
video signal integrity. The OPA361 employs an internal
level shift circuit to avoid clipping. The input signal is
typically shifted by approximately 11mV. This shift is well
within the linear output voltage range of the OPA361 with
a standard 150Ω video load.
voltage level is pulled LOW if the TV (or other video
equipment) is connected, or HIGH if nothing is connected.
A GPIO in the processor can be used to read this logic level
and decide if a video load is connected. Figure 8 shows a
scope plot with the TV disconnected and Figure 9 shows
a scope plot with the TV connected; the upper line in both
figures is the disable pulse. Figure 10 shows a circuit
drawing using the TV-detect signal to disable or enable the
OPA361.
OPA361 Disable Pulse
∆: 1.84V
@: 1.84V
Output Swing Capability
Figure 7 shows the true output swing capability of the
OPA361 by taking the tip of the input sync pulse to a
slightly negative voltage. Even when the output sync tip is
at 3mV, the output after the 75Ω series termination still
shows no clipping of the sync pulse.
OPA361 Ouput
Pulled HIGH;
No Video Load
Connected
Equilization Pulses
∆: 305mV
@: 3.00mV
1st Vertical Sync Pulse
Vertical Sync Pulses
Figure 8. Output of OPA361 Pulled Up To 1.8V
During Disable: TV Disconnected
OPA361 Disable Pulse
Figure 7. No Clipping of the Sync Pulse
OPA361 Ouput Pulled LOW
Due to Video Load
TV-Detect Function
The TV-detection feature of the OPA361 works in
conjunction with the OMAP242x (or other processors) to
detect if a television is connected to the video output of the
device. In order to detect a TV load, the OPA361 is briefly
turned off, ideally during the first vertical sync pulse. For
the detection, a simple pull-up resistor to the processor
logic supply is used on the output of the OPA361. The
10
Equilization Pulses
1st Vertical Sync Pulse
Vertical Sync Pulses
Figure 9. Output of OPA361 Pulled Down:
TV Connected.
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TWL92230
1.8V DAC
Regulator VAUX
0.5V VREF
V+ 2.5V or 2.8V
OMAP2420
1.8V
OPA361
Pull−Up
10kΩ
10mV
+In
Video
DAC
2−Pole
Filter
Out 75Ω
+
500Ω
75Ω
RSET
G = 5.2V/V
4kΩ
Enable
TV Detect
Shutdown
Control
(see note 1)
GPIO(3)
GND
GPIO
TV Detect
100kΩ(2)
(1) Closed when enabled during normal operation; open when shut down.
(2) Protects GPIO against overvoltage conditions during active video transmission.
(3) GPIO must be able to generate interrupt.
Figure 10. Using TV-Detect Signal to Disable/Enable the OPA361
Disabling the OPA361 also disconnects the internal
feedback resistors’ path to GND, and therefore there is no
current flowing from the logic supply through the pull-up
resistor to GND if no video load is connected; this helps to
conserve battery life. The typical leakage when the output
is pulled high and OPA361 is disabled is only about 300pA.
The following functionality
implementing TV-detection:
can
be
achieved
by
D Automatic video start by polling the video line
periodically.
D Automatic video stop if the TV (or other equipment)
is disconnected.
Proper implementation allows to significantly simplify the
user interface.
For more information, see Application Report SBOA109,
OPA361 and TV Detection, available for download at
www.ti.com.
11
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jan-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
Samples
(Requires Login)
OPA361AIDCKR
ACTIVE
SC70
DCK
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Purchase Samples
OPA361AIDCKRG4
ACTIVE
SC70
DCK
6
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Purchase Samples
OPA361AIDCKT
ACTIVE
SC70
DCK
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Request Free Samples
OPA361AIDCKTG4
ACTIVE
SC70
DCK
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Request Free Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
OPA361AIDCKR
SC70
DCK
6
3000
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
OPA361AIDCKR
SC70
DCK
6
3000
179.0
8.4
2.2
2.5
1.2
4.0
8.0
Q3
OPA361AIDCKT
SC70
DCK
6
250
178.0
9.0
2.4
2.5
1.2
4.0
8.0
Q3
OPA361AIDCKT
SC70
DCK
6
250
179.0
8.4
2.25
2.4
1.22
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Aug-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
OPA361AIDCKR
SC70
DCK
6
3000
180.0
180.0
18.0
OPA361AIDCKR
SC70
DCK
6
3000
195.0
200.0
45.0
OPA361AIDCKT
SC70
DCK
6
250
180.0
180.0
18.0
OPA361AIDCKT
SC70
DCK
6
250
195.0
200.0
45.0
Pack Materials-Page 2
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