SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F – APRIL 2003 – REVISED APRIL 2007 FEATURES • • • • • • • • • • • • • • (1) Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of up to –40°C to 85°C, –40°C to 125°C and –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree (1) Member of the Texas Instruments Widebus™ Family State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Supports Unregulated Battery Operation Down to 2.7 V Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Ioff and Power-Up 3-State Support Hot Insertion Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 500 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) DGG, DGV, OR DL PACKAGE (TOP VIEW) 1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. DESCRIPTION/ORDERING INFORMATION The SN74LVTH16244A is a 16-bit buffer and line driver designed for low-voltage (3.3 V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. This device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides true outputs and symmetrical active-low output-enable (OE) inputs. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2003–2007, Texas Instruments Incorporated SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F – APRIL 2003 – REVISED APRIL 2007 When VCC is between 0 V and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. abc TERMINAL ASSIGNMENTS (1) (56-Ball GQL/ZQL Package) GQL OR ZQL PACKAGE (TOP VIEW) 1 2 3 4 5 6 A B C D E F G H J K abc 1 2 3 4 5 6 A 1OE NC NC NC NC 2OE B 1Y2 1Y1 GND GND 1A1 1A2 C 1Y4 1Y3 VCC VCC 1A3 1A4 D 2Y2 2Y1 GND GND 2A1 2A2 E 2Y4 2Y3 2A3 2A4 F 3Y1 3Y2 3A2 3A1 G 3Y3 3Y4 GND GND 3A4 3A3 H 4Y1 4Y2 VCC VCC 4A2 4A1 J 4Y3 4Y4 GND GND 4A4 4A3 K 4OE NC NC NC NC 3OE abc (1) abc NC - No internal connection ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 125°C –40°C to 85°C (1) (2) 2 TOP-SIDE MARKING SSOP – DL Tape and reel CLVTH16244AQDLREP LH16244AEP TSSOP – DGG Tape and reel CLVTH16244AQDGGREP LH16244AEP TVSOP – DGV Tape and reel CLVTH16244AIDGVREP LL244AEP VFBGA – GQL VFBGA – ZQL (Pb-free) –55°C to 125°C ORDERABLE PART NUMBER TSSOP – DGG Tape and reel Tape and reel CLVTH162244AIGQLREP CLVTH16244AIZQLREP CLVTH16244AMDGGREP LL244AEP H16244AMEP For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Submit Documentation Feedback SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F – APRIL 2003 – REVISED APRIL 2007 FUNCTION TABLE (each 4-bit buffer) INPUTS OE A OUTPUT Y L H H L L L H X Z LOGIC DIAGRAM (POSITIVE LOGIC) 1OE 1A1 1A2 1A3 1A4 2OE 2A1 2A2 2A3 2A4 1 3OE 47 2 46 3 44 5 43 6 1Y1 3A1 1Y2 3A2 1Y3 3A3 1Y4 3A4 48 4OE 41 8 40 9 38 11 37 12 2Y1 4A1 2Y2 4A2 2Y3 4A3 2Y4 4A4 25 36 13 35 14 33 16 32 17 3Y1 3Y2 3Y3 3Y4 24 30 19 29 20 27 22 26 23 4Y1 4Y2 4Y3 4Y4 Pin numbers shown are for the DGG, DGV, and DL packages. Submit Documentation Feedback 3 SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F – APRIL 2003 – REVISED APRIL 2007 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 4.6 V VI Input voltage range (2) –0.5 7 V –0.5 7 V –0.5 VCC + 0.5 V VO Voltage range applied to any output in the high-impedance or power-off VO Voltage range applied to any output in the high state (2) state (2) SN74LVTH16244AQ 96 SN74LVTH16244AI 128 SN74LVTH16244AQ 48 SN74LVTH16244AI 64 UNIT IO Current into any output in the low state IO Current into any output in the high state (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA θJA Package thermal impedance (4) Tstg Storage temperature range DGG package 70 DGV package 58 DL package 63 GQL/ZQL package (1) (2) (3) (4) mA mA °C/W 42 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. This current flows only when the output is in the high state and VO > VCC. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions (1) VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage VI Input voltage IOH High-level output current IOL Low-level output current ∆t/∆v Input transition rise or fall rate (1) 4 Operating free-air temperature MAX 2.7 3.6 2 V V V 5.5 V –24 SN74LVTH16244AI –32 SN74LVTH16244AM –24 SN74LVTH16244AQ 24 SN74LVTH16244AI 64 SN74LVTH16244AM 24 Outputs enabled UNIT 0.8 SN74LVTH16244AQ ∆t/∆VCC Power-up ramp rate TA MIN 10 mA mA ns/V µs/V 200 SN74LVTH16244AQ –40 125 SN74LVTH16244AI –40 85 SN74LVTH16244AM –55 125 °C All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F – APRIL 2003 – REVISED APRIL 2007 Electrical Characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK TEST CONDITIONS II = –18 mA VCC TYP (1) 2.7 V IOH = –100 µA 2.7 V to 3.6 V IOH = –8 mA 2.7 V 'LVTH16244AQ IOH = –24 mA VOH MIN MAX UNIT –1.2 V VCC – 0.2 2.4 2 'LVTH16244AI 'LVTH16244AM 'LVTH16244AQ IOH = –32 mA 3V 'LVTH16244AI V 2 2 'LVTH16244AM IOL = 100 µA 0.2 2.7 V IOL = 24 mA 0.5 IOL = 16 mA 0.4 'LVTH16244AQ VOL IOL = 32 mA 'LVTH16244AI 'LVTH16244AM 0.5 V 3V 'LVTH16244AQ IOL = 64 mA 'LVTH16244AI 0.55 'LVTH16244AM 'LVTH16244AQ VI = 5.5 V 'LVTH16244AI 50 0 V or 3.6 V 10 'LVTH16244AM II Control inputs Data inputs 50 ±1 VI = VCC or GND 3.6 V VI = VCC µA 1 VI = 0 V –5 'LVTH16244AQ Ioff VI or VO = 0 V to 4.5 V 'LVTH16244AI ±100 0V µA 'LVTH16244AM VI = 0.8 V 3V VI = 2 V II(hold) Data inputs 75 –75 'LVTH16244AQ VI = 0 V to 3.6 V 'LVTH16244AI µA 500 –750 3.6 V (2) 'LVTH16244AM 3.6 V 5 µA –5 µA ±100 µA IOZH VO = 3 V IOZL VO = 0.5 V IOZPU VO = 0.5 V to 3 V, OE = Don't care 0 V to 1.5 V IOZPD VO = 0.5 V to 3 V, OE = Don't care 1.5 V to 0 V ±100 µA 3.6 V Outputs high IO = 0 , VI = VCC or GND ICC ∆ICC (3) One input at VCC – 0.6 V, Other inputs at VCC or GND Ci VI = 3 V or 0 V (1) (2) (3) Outputs low 0.19 3.6 V 5 Outputs disabled mA 0.19 3 V to 3.6 V 0.2 0.2 4 mA pF All typical values are at VCC = 3.3 V, TA = 25°C. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. Submit Documentation Feedback 5 SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F – APRIL 2003 – REVISED APRIL 2007 Electrical Characteristics (continued) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER Co TEST CONDITIONS VCC TYP (1) MIN VO = 3 V or 0 V MAX UNIT 9 pF Switching Characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) SN74LVTH16244AQ/M PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A Y OE Y OE Y VCC = 3.3 V ± 0.3 V SN74LVTH16244AI VCC = 2.7 V MIN VCC = 2.7 V MAX MAX MIN TYP MAX 1.1 4.4 4.6 1.2 2.5 3.2 3.7 1.1 3.6 3.9 1.2 2 3.2 3.7 1.1 4.6 5.4 1.2 2.6 4 5 1.1 5.4 6.2 1.2 2.7 4 5 1.6 5.7 6.2 2.2 3.3 4.5 5 1.2 5 4.7 2 3.1 4.2 4.4 0.5 Submit Documentation Feedback MIN UNIT MIN tsk(o) 6 VCC = 3.3 V ± 0.3 V MAX ns ns ns ns SN74LVTH16244A-EP 3.3-V ABT 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS www.ti.com SCAS692F – APRIL 2003 – REVISED APRIL 2007 PARAMETER MEASUREMENT INFORMATION 6V 500 Ω From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 2.7 V Input 1.5 V th 2.7 V 1.5 V Data Input 1.5 V 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V Input 1.5 V 1.5 V 0V tPHL tPLH VOH Output 1.5 V 1.5 V VOL tPHL Output Waveform 1 S1 at 6 V (see Note B) 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 1.5 V 0V tPZL tPLZ 3V 1.5 V tPZH tPLH VOH Output 2.7 V Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH − 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms Submit Documentation Feedback 7 PACKAGE OPTION ADDENDUM www.ti.com 13-Oct-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CLVTH16244AIDGVREP ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CLVTH16244AIZQLREP ACTIVE BGA MICROSTAR JUNIOR ZQL 56 1000 Pb-Free (RoHS) CLVTH16244AMDGGREP ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CLVTH16244AQDGGREP ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CLVTH16244AQDLREP ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/04601-01XE ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/04601-01YE ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/04601-02UA ACTIVE BGA MICROSTAR JUNIOR GQL 56 V62/04601-02ZE ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/04601-03YE ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TBD Call TI Samples (Requires Login) 8W244AMDGGREPG4 SNAGCU (3) Level-1-260C-UNLIM Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 13-Oct-2011 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVTH16244A-EP : • Catalog: SN74LVTH16244A • Military: SN54LVTH16244A NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Military - QML certified for Military and Defense Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device CLVTH16244AIDGVREP Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TVSOP DGV 48 2000 330.0 16.4 7.1 10.2 1.6 12.0 16.0 Q1 CLVTH16244AIZQLREP BGA MI CROSTA R JUNI OR ZQL 56 1000 330.0 16.4 4.8 7.3 1.45 8.0 16.0 Q1 CLVTH16244AMDGGREP TSSOP DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1 CLVTH16244AQDGGREP TSSOP DGG 48 2000 330.0 24.4 8.6 15.8 1.8 12.0 24.0 Q1 DL 48 1000 330.0 32.4 11.35 16.2 3.1 16.0 32.0 Q1 CLVTH16244AQDLREP SSOP Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CLVTH16244AIDGVREP TVSOP DGV 48 2000 367.0 367.0 38.0 ZQL 56 1000 333.2 345.9 28.6 CLVTH16244AIZQLREP BGA MICROSTAR JUNIOR CLVTH16244AMDGGREP TSSOP DGG 48 2000 367.0 367.0 45.0 CLVTH16244AQDGGREP TSSOP DGG 48 2000 367.0 367.0 45.0 CLVTH16244AQDLREP SSOP DL 48 1000 367.0 367.0 55.0 Pack Materials-Page 2 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. 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