UCC5621 27 - Line SCSI Terminator With Split Reverse Disconnect FEATURES DESCRIPTION • Complies with SCSI, SCSI-2, SCSI-3, SPI and FAST-20 (Ultra) Standards UCC5621 provides 27 lines of active termination for a SCSI (Small Computer Systems Interface) parallel bus. The SCSI standard recommends active termination at both ends of the cable. • 2.5pF Channel Capacitance During Disconnect • 100µA Supply Current in Disconnect Mode • 4V To 7V Operation • 110Ω Termination • Completely Meets SCSI Hot Plugging • –900mA Sourcing Current for Termination • +500mA Sinking Current for Active Negation • Logic Command Disconnects all Termination Lines • Split Reverse Controls Lines 1 to 9 and 10 to 27 Separately • Trimmed Impedance to 5% • Current Limit and Thermal Shutdown Protection The UCC5621 is ideal for high performance 5V SCSI systems. During disconnect the supply current is typically only 100µA, which makes the IC attractive for lower powered systems. The UCC5621 features a split reverse disconnect allowing the user to control termination lines 10 to 27 with disconnect one, DISCNCT1, and control terminiation lines 1 to 9 with disconnect two, DISCNCT2. The UCC5621 is designed with a low channel capacitance of 2.5pF, which eliminates effects on signal integrity from disconnected terminators at interim points on the bus. The power amplifier output stage allows the UCC5621 to source full termination current and sink active negation current when all termination lines are actively negated. The UCC5621, as with all Unitrode terminators, is completely hot pluggable and appears as high impedance at the teminating channels with VTRMPWR = 0V or open. Internal circuit trimming is utilized, first to trim the 110Ω impedance, and then most importantly, to trim the output current as close to the maximum SCSI-3 specification as possible, which maximizes noise margin in FAST20 SCSI operation. (continued) BLOCK DIAGRAM Circuit Design Patented 10/98 UDG-96111 UCC5621 CONNECTION DIAGRAM ABSOLUTE MAXIMUM RATINGS TRMPWR Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +7V Regulator Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5A Storage Temperature . . . . . . . . . . . . . . . . . . . -65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . -55°C to +150°C Lead Temperature (Soldering, 10 Sec.). . . . . . . . . . . . . +300°C QSOP-44 (Top View) MWP Package Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. LQFP-48 (Top View) FQP Package DESCRIPTION (cont.) Other features include thermal shutdown and current limit. This device is offered in low thermal resistance versions of the industry standard 44 pin wide body QSOP (MWP) and 48 pin LQFP. Consult QSOP-44 and FQP-48 Packaging Diagrams for exact dimensions. ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = 0°C to 70°C, TRMPWR = 4.75V, DISCNCT1 = DSCNCT2 = 4.75V, TA = TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS Supply Current Section TRMPWR Supply Current Power Down Mode All Termination Lines = Open 1 2 mA All Termination Lines = 0.2V 630 650 mA DISCNCT1 = DSCNCT2 = 0V 100 200 µA 2 UCC5621 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = 0°C to 70°C, TRMPWR = 4.75V, DISCNCT1 = DSCNCT2 = 4.75V, TA = TJ. PARAMETER TEST CONDITIONS MIN TYP MAX UNITS 104.5 110 115.5 Ω Output Section (Termination Lines) Termination Impedance (Note 3) Output High Voltage (Note 1) Max Output Current VLINE = 0.2V, TJ = 25°C VLINE = 0.2V VLINE = 0.2V, TRMPWR = 4V, TJ = 25°C (Note 1) VLINE = 0.2V, TRMPWR = 4V (Note 1) 2.6 2.8 3.0 V -22.1 -20.7 -21 -20 -23.3 -23.3 -23 -23 -24 -24 -24 -24 -22.4 mA mA VLINE = 0.5V mA mA mA Output Leakage DISCNCT1 = DISCNCT2 = 0V, TRMPWR = 0V to 5.25V 10 400 nA Output Capacitance DISCNCT1 = DISCNCT2 = 0V (Note 2) 2.5 4 pF Regulator Section Regulator Output Voltage 2.6 Drop Out Voltage All Termination Lines = 0.2V Short Circuit Current VREG = 0V Sinking Current Capability VREG = 3.5V 2.8 3.0 V 0.4 0.8 V -650 -900 –1300 mA 300 500 900 mA Thermal Shutdown 170 °C Thermal Shutdown Hysteresis 10 °C Disconnect Section Disconnect Threshold DISCNCT1 Controls Lines 10 to 27 Input Current DISCNCT1 DISCNCT1 = 0V Disconnect Threshold DISCNCT2 Controls Lines 1 to 9 Input Current DISCNCT2 DISCNCT2 = 0V 0.8 0.8 1.5 2.0 V –10 –30 µA 1.5 2 V –10 –30 µA Note 1: Measuring each termination line while other 26 are low (0.2V). Note 2: Guaranteed by design. Not 100% tested in production. Note 3: Tested by measuring IOUT with VOUT = 0.2V and VOUT with no load, then calculate: VOUT N . L .− 0 . 2 V Z = OUT at 0 . 2V I PIN DESCRIPTIONS GND: Ground reference for the IC. DISCNCT1: Disconnect one controls termination lines L10 – L27. Taking this pin low causes termination lines L10 – L27 to become high impedence, taking this pin high or leaving it open allows the channels to provide normal termination. L1 - L27: 110Ω termination channels. REG: Output of the internal 2.7V regulator. TRMPWR: Power for the IC. DISCNCT2 : Disconnect two controls termination lines L1 – L9. Taking this pin low causes termination lines L1 – L9 to become high impedence. Taking this pin high or leaving it open allows the channels to provide normal terminiation. Taking both disconnect pins low will put the chip in to sleep mode where it will be in low-power mode. 3 UCC5621 UDG-98168 Figure 1. Typical Wide SCSI Bus Configuration Using the UCC5621 UNITRODE CORPORATION 7 CONTINENTAL BOULEVARD · MERRIMACK, NH 03054 TEL (603) 424-2410 · FAX (603) 424-3460 4 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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