TI TPS78601

TM
Technology for Innovators
TM
An Analog Product Catalog
➔
Inside
Low Dropout Regulators
High-Performance RF LDOs ....................3
Ultra-Low Dropout Linear Regulators
with Soft-Start and Tracking..................3
2Q 2007
Power Management Solutions
for Xilinx and Altera FPGAs
®
®
Step-Down Controllers
Single-Chip Solution for Spartan® and Cyclone®
Synchronous Buck DC/DC
Controller.............................................4
TPS75003
Integrated FET Converters
3-V to 6-V Input, 3-A DC/DC
Converter .............................................5
4.5-V to 20-V Input, 6-A DC/DC
Converters ...........................................5
Low-Power Integrated
FET Controllers
1.2-A Step-Down Converter in
MSOP-10 .............................................6
Dual-Channel Step-Down Converter
with 1-Pin EasyScale™ Interface ........6
APP
REPORT
E VA L U AT I O N
S
S
Wide-Input, Low Pin-Count Buck
Controller.............................................4
D ATA
SHEETS
T
PR
ODUC
A
MPLE
MODULE
Get samples, datasheets, app reports, evaluation modules and software tools at:
www.ti.com/sc/device/TPS75003
Key Features
• Two 95% efficient 3-A buck controllers and one 300-mA LDO
• Adjustable output voltages to 1.2 V for buck and 1.0 V for LDO
• Input voltage range: 2.2 V to 6.5 V
• Independent enable for each supply
• Packaging: Low profile 4.5 mm x 3.5 mm QFN
Benefits
• Small single-chip solution
• Flexible sequencing
FPGA Applications
• Altera Cyclone II family
• Xilinx Spartan-3 family
PTH Power Modules
T2 2nd Generation PTH
Point-of-Load Modules........................7
TPS75003
5 V_Input
100 pF
Power Supply Sequencers
8-Channel Power-Supply Sequencer
and Monitor.........................................8
Reference Designs
5 VIN Low Power, Small Size
Simple Design .....................................9
0.033
0.033
IS1
3A
Buck 1 SW1
FB1
IS2
3A
Buck 2 SW2
FB2
OUT3
300 mA FB3
LDO
SS3
AGND
DGND
DGND
IN1
IN2
IN3
EN1
SS1
EN2
SS2
EN1
VCCAUX
DGND
1.5 nF
1.5 nF
Q2
15 µH
+
D2
Q1
5 µH
10 nF
D1
61.9 k
12 VIN High Power, High Efficiency...10
5 VIN Multiple FPGA Design
for Complex Systems.........................11
+
VCCO
3.3 V @ 3 A
100 pF
36.5 k
12 VIN Low Power, Cost Optimized .....9
12 VIN Mid Power, Simple Design.....10
VCCINT
1.2 V @ 3 A
100 pF
VCCAUX
61.9 k
15.4 k
10 µF2.5 V @ 300 mA
Power Management Solutions for FPGAs
Power Management Solutions for Your FPGA and CPLD Designs
Altera
Max®
Max II
Cyclone®
Cyclone II
Stratix®, GX
Stratix II, GX
Stratix III
Xilinx
CoolRunner®, XPLA3
CoolRunner-II
Spartan Family
• IIE, /XL
• 3, 3A, 3E
Virtex®, E, EM
Virtex-II, Pro
Virtex-4
Virtex-5
• Broad portfolio including LDOs, Controllers, Integrated FET
Converters and Modules
• FPGA reference designs, power design services, design software
• Seminars, webcasts and application notes
• Rapid delivery samples, evaluation modules
• Local application support
• Distributor partners
Texas Instruments’ broad portfolio of high-performance power
management products, local technical support and easy-touse design tools can help you differentiate your FPGA-based
design and speed your time to market.
This issue highlights several innovative devices optimized to
work with FPGA and CPLD devices, such as those from leading
manufacturers Xilinx and Altera. TI’s new power management
ICs and reference designs increase power efficiency and
simplify design.
Power Management Home Page:
power.ti.com
Power Management Solutions for Altera FPGAs:
www.ti.com/alterafpga
Power Solutions for Xilinx FPGAs:
www.ti.com/xilinxfpga
e-Store for Power Management Evaluation Modules
www.ti.com/home_b_estore
Power Management FPGA Support Email
[email protected]
2
Power Management for FPGAs Sine On
Texas Instruments 2Q 2007
Low Dropout Regulators
High-Performance RF LDOs
TPS791/792/793/794/795/796/786xx
D ATA
SHEETS
APP
REPORT
EVALUATION
S
S
T
PR
ODUC
A
MPLE
MODULE
Get samples, datasheets, app reports and evaluation modules at:
www.ti.com/sc/device/PARTnumber
(Replace PARTnumber with TPS79101, TPS79201, TPS79301,
TPS79401, TPS79501, TPS79601, or TPS78601
Key Features
• Input voltage range: 2.7 V to 5.5 V
• Fixed output voltages: 1.8 V to 4.75 V and adjustable
1.2 V to 5.0 V
• Rated output current: 100 mA to 1.5 A
• Stable with ceramic output capacitor
• 32_VRMS output noise, 100 Hz to 100 kHz
• Fast startup time (50 µs)
• Accuracy: 2% over load/line/temp
• Very high PSRR: 70 dB @ 1 kHz and 70 dB @ 10 kHz
Applications
• Altera Stratix II GX, MAX II
• Xilinx Virtex-5, CoolRunner II
• Low-noise RF applications
• PLL and VCO power supplies
Typical Device Specifications
Device
TPS79101
TPS79201
TPS79301
TPS79401
TPS79501
TPS79601
IOUT
100 mA
100 mA
200 mA
250 mA
500 mA
1.0 A
VDO (mV)
38
38
77
145
105
220
EN
/EN
✓
✓
✓
✓
✓
TPS78601
1.5 A
340
✓
Packages
SOT23
SOT23
SOT 23, WCSP
MSOP8, SOT223
SOT223
SOT 223, DDPAK,
SON (2.8 V)
SOT223, DDPAK
TPS79501
VIN
VOUT
OUT
IN
R1
1 µF
EN
1 µF
C1
FB
GND
R2
Benefits
• Produces low-noise power for sensitive analog functions
• Uses smaller, less expensive ceramic capacitors
Ultra-Low Dropout Linear Regulators
with Soft-Start and Tracking
TPS744xx
D ATA
SHEETS
APP
REPORT
EVALUATION
S
S
T
PR
ODUC
A
MPLE
Applications
• Altera Cyclone II, Stratix II, Stratix II GX, Stratix III
• Xilinx Spartan-3 family, Virtex-5
• Core and IO power supplies
• PLL and VCO power supplies
MODULE
Get samples, datasheets, app reports and evaluation modules at:
www.ti.com/sc/device/TPS74401
Key Features
• Programmable soft-start/tracking capabilities
• Input voltage range: 0.9 V to 5.5 V
• Bias voltage range: 2.375 V to 5.25 V
• Ultra-low VIN VDO: 195 mV max @ 3 A
• Ultra-low VBIAS VDO: 1.62 V max @ 3 A
• Output voltages: 0.8 V to 3.3 V
• 1% accuracy over load/line/temp
• Stable with any/no output capacitor
• Guaranteed min/max current limit
Typical Device Specifications
Device
TPS74201
TPS74301
TPS74401
IOUT (A)
1.5
1.5
3.0
VDO (mV)
55
55
110
Startup
Soft-Start
Track
Soft-Start
TPS74401
VDD
IN
CIN
1 µF
R3
R1
SS
CBIAS
1 µF
GND
CSS
VOUT
OUT
BIAS
VBIAS
VPG
PG
EN
COUT
FB
R2
Optional
Benefits
• Low-noise high-current linear solution
• Less board space than switching solution
• Fewer components than switching solution
Texas Instruments 2Q 2007
Power Management for FPGAs Sine On 3
Step-Down Controllers
4.5-V to 15-V Input, Synchronous
Buck DC/DC Controller
TPS40190
D ATA
SHEETS
APP
REPORT
EVALUATION
S
S
A
T
PR
ODUC
• Fewer external components, simplifies design
• Minimized switching losses improves efficiency
• Up to 25-A power supply possible with the TPS40190
• Minimizes power dissipation in fault condition, automatically restarts
when fault is removed
MPLE
MODULE
Get samples, datasheets, app reports, evaluation modules and
software tools at:
www.ti.com/sc/device/TPS40190
Key Features
• Input operating voltage range: 4.5 V to 15 V
• Output voltage down to 0.591 V with +1% reference accuracy
• Synchronous rectification for high efficiency
• Three selectable short-circuit thresholds
• Hiccup recovery from short-circuit condition
• Integrated bootstrap drivers for N-Channel MOSFET
• Internal soft-start
Applications
• Altera Cyclone II, Stratix II, Stratix II GX, Stratix III
• Xilinx Spartan-3 family, Virtex-5
• Core and IO power supplies
VDD
TPS40190
1 ENABLE
Shutdown
HDRV 10
2 FB
SW 9
3 COMP
BOOT 8
4 VDD
LDRV 7
5 GND
BP5 6
VOUT
Benefits
• High-performance, low-cost solution
• Allows for a single-input power solution, no separate power
supply needed to power the controller
• Provides power supply flexibility without adding circuit
complexity
4.5-V to 52-V Input, Low-Pin Count
Buck Controller
TPS40200
D ATA
SHEETS
APP
REPORT
EVALUATION
S
S
A
T
PR
ODUC
MPLE
MODULE
Get samples, datasheets, app reports and evaluation modules at:
www.ti.com/sc/device/TPS40200
Key Features
• 4.5-V to 52-V operation
• Voltage mode control with feed-forward compensation
• 700-mV voltage reference: 1% accuracy
• Internal under-voltage lockout
• Programmable frequency: 35 kHz to 500 kHz
• Programmable overcurrent protection
• Frequency synchronization
• Closed loop soft-start
• Integrated driver
• Soft-start provides smooth, well controlled power up
• Simple configuration — minimal external components
Applications
• Altera Cyclone II, Stratix II, Stratix II GX, Stratix III
• Xilinx Spartan-3 family, Virtex-5
• Core and IO power supplies
VIN
TPS40200
1
RC
VIN
8
2
SS/SD
ISNS
7
3
COMP
GDRV
6
4
FB
GND
5
RSENSE
VOUT
Benefits
• Wide-input range for use in many applications
• Voltage feed forward – great line regulation, fast transient
response
• Programmable features allows flexible design; frequency,
overcurrent protection, under-voltage lockout
4
Power Management for FPGAs Sine On
Texas Instruments 2Q 2007
Integrated FET Converters
1.6-MHz, 3-V to 6-V Input, 3-A DC/DC
Synchronous Buck Converter
TPS54317
D ATA
SHEETS
APP
REPORT
EVALUATION
S
S
A
T
PR
ODUC
MPLE
MODULE
Get samples, datasheets, app reports, evaluation modules and
software tools at:
www.ti.com/sc/device/TPS54317
Other Low-Voltage SWIFT™ Devices*
VIN Range
Part Number
(V)
TPS54310
3 to 6
TPS54610
3 to 6
TPS54910
3 to 4
TPS54010
3 to 4
* Same feature set as TPS54317
IOUT
(A)
3
6
9
14
Frequency
Up to 700 kHz
Up to 700 kHz
Up to 700 kHz
Up to 700 kHz
Package
20HTSSOP
28HTSSOP
28HTSSOP
28HTSSOP
TPS54317
Input
Output
VIN
Key Features
• Input voltage range: 3.0 V to 6.0 V
• Two 3-A (4.5-A peak) integrated MOSFETs provide synchronous
rectification
• Adjustable/synchronizable switching frequency to 1.6 MHz
• Output voltage adjustable down to 0.9 V
• Power good, enable, adjustable slow-start, current limit,
thermal shutdown and 1% accuracy
• Supported by free SwitcherPro™ design software
Benefits
• High frequency allows use of a smaller inductor and capacitor
to save board space
• High efficiency greater than 90%
• Large current source from a small board space
4.5-V to 20-V Input, 3-A and 6-A
Converters
TPS54350, TPS54550
D ATA
SHEETS
APP
REPORT
EVALUATION
S
S
T
PR
ODUC
A
MPLE
MODULE
Get samples, datasheets, app reports, evaluation modules and
software tools at:
www.ti.com/sc/device/TPS54350 or TPS54550
PWRGD
SS/ENA
BOOT
SYNCH
PGND
RT
VBIAS
AGND
Benefits
• Accommodates high inrush currents
• Greater than 90% efficiency
• 1% regulation accuracy over temperature
• Reduces input bulk capacitance size
• Operates at up to 700 kHz for smaller passive components
Texas Instruments 2Q 2007
VSENSE
COMP
Applications
• Altera Cyclone II, Stratix II, Stratix II GX, Stratix III
• Xilinx Spartan-3 family, Virtex-5
• Core and IO power supplies
• Many integrated protection and performance features to protect
the system
Mid-Voltage SWIFT™ Devices
VIN Range
IOUT
Part Number
(V)
(A)
TPS54350
4.5 to 20
3
TPS5435x
4.5 to 20
3
TPS54550
4.5 to 20
6
* Fixed output versions available (1.2, 1.5, 1.8, 2.5 and 3.3 V)
Compensation
External
Internal*
External
Package
16HTSSOP
16HTSSOP
16HTSSOP
TPS54350 and TPS54550*
VIN
SYNC
Key Features
• Input voltage range: 4.5 V to 20 V
• Synchronous-buck for high efficiency
• Adjustable output voltage down to 0.9 V
• Power good, enable, adjustable slow-start, current limit,
thermal shutdown
• 180° out-of-phase switching
• TPS54350 and TPS54550 are footprint compatible
• Fixed 250 kHz, 500 kHz, or adjustable switching frequency
PH
Input
Voltage
PWRGD
SS/ENA
VBIAS
BOOT
COMP
PH
Output
Voltage
LSG
VSENSE
PWRPAD
PGND
*Note: TPS54350 and TPS54550 are footprint compatible.
Applications
• Altera Cyclone II, Stratix II, Stratix II GX, Stratix III
• Xilinx Spartan-3 family, Virtex-5
• Core and IO power supplies
Power Management for FPGAs Sine On 5
Low-Power Integrated FET Converters
1.2-A Step-Down Converter in MSOP-10
TPS6204x
D ATA
SHEETS
APP
REPORT
EVALUATION
S
S
A
T
PR
ODUC
MPLE
MODULE
Get samples, datasheets, app reports, evaluation modules and
software tools at:
www.ti.com/sc/device/TPS62040
Key Features
• Input voltage range: 2.5 V to 6.0 V
• Output current: up to 1.2 A with up to 95% efficiency
• 18-µA (typ) quiescent current, 0.1-µA shutdown
• PFM power-save mode for light loads
• 1.25-MHz fixed frequency PWM operation possible
• Adjustable output voltage range: 0.7 V to VIN
• 100% duty cycle mode
• Soft-start limits in-rush current
• Packaging: 10-pin MSOP
Dual-Channel Step-Down Converter
with 1-Pin EasyScale™ Interface
TPS62400
D ATA
SHEETS
APP
REPORT
EVALUATION
S
MPLE
Small Inductor
TPS6204x
VI
2.5 V to 6 V
2
3
C1
22 µF
VIN
SW
VIN
SW
1 EN
6
MODE
4
GND
VO
0.7 V to VI/1.2 A
L1
6.2 µH
8
7
C2
22 µF
FB 5
10
PGND
9
PGND
Benefits
• Small solution size
• EasyScale™ digital programming allows simple DVS
• Reduced input capacitance
• No external compensation required
MODULE
Get samples, datasheets, app reports, evaluation modules and
software tools at:
www.ti.com/sc/device/TPS62400
Key Features
• Input voltage: 2.5 V to 6 V
• Output voltage: 0.7 V to 6.0 V (adj.)
• Output currents: 400 mA and 600 mA (TPS62400)
• Efficiency: 95% (max)
• EasyScale: simple one wire interface to adjust output voltage
(dynamic voltage scaling)
• Fixed frequency operation: 2.25 MHz
• 180° out-of-phase operation
• Power-save mode (PFM/PWM) or forced PWM, 100%
duty cycle
• Soft-start
• Packaging: 3 mm x 3 mm 10-pin QFN
6
Applications
• Altera Max II, Cyclone II
• Xilinx CoolRunner-II, Spartan-3 family
S
T
PR
ODUC
A
Benefits
• Suitable for 3-to 4-cell alkaline or 1-cell Li-Ion
• Conserve battery capacity
• High efficiency over entire load range
• Small inductors
• Ideal for low-noise applications
Power Management for FPGAs Sine On
Applications
• Altera Max II, Cyclone II
• Xilinx CoolRunner-II, Spartan-3 family
VIN 2.5 V to 6 V
TPS62401
VIN
FB1
2.2 µH
10 µF
SW1
VOUT1: 1.575 V
400 mA
DEF_1
10 µF
EN_1
Dynamic
Voltage Scaling
in 25, 50 or
100 mV Steps
Two
Independent
Outputs
EN_2
2.2 µH
SW2
MODE/DATA
VOUT2: 1.8 V
600 mA
10 µF
ADJ2
GND
Texas Instruments 2Q 2007
T2 Power Modules
2nd Generation PTH Point-of-Load
Modules
PTH04T2xx, PTH08T2xx
D ATA
SHEETS
APP
REPORT
EVALUATION
S
S
A
T
PR
ODUC
MPLE
MODULE
Get samples, datasheets, app reports, evaluation modules and
software tools at:
www.ti.com/T2
Key Features
• TurboTrans™ technology
• 1.5% output regulation
• Up to 50% smaller footprint
• SmartSync synchronization
• Wide input voltage (4.5 V to 14 V)
• Auto-Track™ sequencing
• Pb-free/RoHS compliant
Typical Device Specifications
Model
PTH04T260W
PTH08T260/261W
PTH04T230W
PTH08T230/231W
PTH04T240/241W
PTH08T240F
PTH08T240/241W
PTH04T220W
PTH08T220/221W
PTH05T210W
PTH08T210W
PTH08T250W
PTV08T250W
Input Voltage
(V)
2.2 to 5.5
4.5 to 14
2.2 to 5.5
4.5 to 14
2.2 to 5.5
4.5 to 14
4.5 to 14
2.2 to 5.5
4.5 to 14
4.5 to 5.5
5.5 to 14
4.5 to 14
8 to 14
Output Voltage
(V)
0.7 to 3.6
0.7 to 5.5
0.7 to 3.6
0.7 to 5.5
0.7 to 3.6
0.7 to 2.0
0.7 to 5.5
0.7 to 3.6
0.7 to 5.5
0.7 to 3.6
0.7 to 3.6
0.7 to 3.6
0.8 to 3.6
Output Current
(A)
3
3
6
6
10
10
10
16
16
30
30
50
50
Benefits
T2’s reduce development costs and save PCB space:
• Sequencing easily solved with Auto-Track technology
• SmartSync synchronization for input cap reduction/easier
filtering
• TurboTrans technology for high transient load applications
• Up to 8x reduction in output capacitors
• Faster transient response
• Stable with ultra-low ESR caps
• 1.5% tolerance meets specs of FPGA core
Applications
• Altera Stratix II, Stratix II GX, Stratix III
• Xilinx Virtex-5
• Wireless infrastructure
• Telecom
• Networking
• Servers
• Mass storage
SmartSync
Track
TurboTrans™
10
1
Track SYNC
VI
2
9
TT
VI
+Sense
PTH08T241W
Inhibit
11
RUVLO
1%
0.05 W
(Optional)
GND
Texas Instruments 2Q 2007
C1
200 µF
(Required)
INH/UVLO
GND
3
VO
–Sense
GND VOADJ
4
8
6
5
RTT
1%
0.05 W
(Optional)
+ Sense
VO
7
RSET[A]
1%
0.05 W
(Required)
L
O
C0
A
300 µF
D
(Required)
– Sense
GND
Power Management for FPGAs Sine On 7
Power Supply Sequencers
Applications
• Telecommunications switches servers
• Networking equipment
• Test equipment
• Any system requiring sequencing of multiple voltage rails
8-Channel Power Supply Sequencer
and Monitor
UCD9080
D ATA
SHEETS
APP
REPORT
E VA L U AT IO N
S
S
A
T
PR
ODUC
MPLE
MODULE
Get samples, datasheets, app reports, evaluation modules and
software tools at:
www.ti.com/sc/device/UCD9080
Key Features
• Sequencing and monitoring of up to 8 voltage rails
• All rails monitored and updated every 50-µs 3.5-mV resolution
• Sequencing of up to three digital outputs for power-on-reset
and other functions
• Under- and over-voltage threshold per rail
• I2C interface for configuration and monitoring
• Microsoft® Windows® GUI for configuration and monitoring
• Flexible rail shutdown
• Supply voltage: 3.3 V
• Low power consumption: 300 µA, 3.0 V
POL-3
POL-4
Low
Dropout
Regulator
DC/DC
Converter
Low
Dropout
Regulator
DC/DC
Converter
RAIL2
POL-2
RAIL2
POL-1
RAIL1
RAIL0
Benefits
• Intuitive Windows-based GUI for easy sequencing
• Allows setting of dependent and independent rails
• Saves fault information if power is suddenly disrupted
3.3 V
DC/DC
Converter
POL-5
Hard Drive
RAIL4
RAIL0
RAIL1
RAIL2
RAIL3
RAIL4
RAIL5
0
1
2
3
4
5
RAIL6
RAIL7
To
System
10 k
VDD_IPM
Enable
Outputs
A/D Inputs
UCD9080
6
7
0
1
2
3
4
5
EN0
EN1
EN2
EN3
EN4
EN5
6
7
EN6
EN7
10 k
SDA
SCL
????
Interface
VDD
Interrupt
Output
INT
INT
1.8 V
Low
Dropout
Regulator
DSP
POL-6
DSP/µC
RAIL5
1.5 V
Low
Dropout
Regulator
To
System
VDD_IPM
POL-7
Memory
RAIL6
5.0 V
DC/DC
Converter
Interface
POL-8
RAIL7
8
Power Management for FPGAs Sine On
Texas Instruments 2Q 2007
Reference Designs
Reference Design for Cyclone II
and Spartan-3 Family
TPS62040
4.70 µF
2
VIN
5 VIN Low Power, Small Size,
Simple Design
3
1
Key Features
• Integrated high and lowside FETs to achieve up to 95%
conversion efficiency
• Typical quiescent current: 18 µA
• Load current: 1.2 A
• Operating input voltage range: 2.5 V to 6.0 V
• Efficient generation of lower power I/O voltages
• Switching frequency: 1.25 MHz reduces inductor size and
output voltage ripple
• Adjustable and fixed output voltages
• Power save mode operation at light load currents
• 100% duty cycle for lowest dropout
• Internal soft-start
6
22µF
Dual TPS6204x
4
VIN
SW
VIN
SW
EN
FB
MODE
PGND
RC
PGND
3
1
RST
6
22µF
VIN
SW
VIN
SW
EN
FB
PGND
MODE
4
PGND
RC
1.2 V
10
22µF
9
165 k
100 pF
8
3.3 V @ 1 A
7
5
10
22µF
9
VIN
VDO
RST
RESET
CT
J1
12 V
GND
GND
12 V
TP1
1
2
TP2
R2
127 k
1
RC
VDD
8
2
SS
ISNS
7
3
TPS40200
4
C4
1000 pF
C8
33 pF
C2
100 pF
U1
TPS40200D
R3
127 k
12 VIN Low Power, Cost Optimized
Key Features
• Simple 8-pin wide VIN controller for voltage rails needing less
than 3 A
• Voltage feed-forward for improved response to line transients
232 k
5
4.70 µF
2
VIN
SENSE
Download reference design schematic and BOM at:
www-s.ti.com/sc/techlit/SBVR002
1.2 V @ 1 A
68 pF
7
TPS62046
Benefits
• Power rail sequencing
• High efficiency over wide-load range
• Small solution size
Reference Design for Cyclone II
and Spartan-3 Family
8
COMP DRV
FB
GND
R3
127 k
3
Q2
2N7002DICT
C9
0.47 µF
1
R7
30.1 k
4.7 V
D1
MMBZ5230BLT1
R5
1.0 K
4
6
3
5
R6
0
25
F = 200 kHz
C7
470 pF
R1
10 k
C1
10 µF
6
1
C5
0.1 µF
Q1
Si4403BDY
L1
33 µH
TP4
1
2
5V
1
J2
2
C6
10 µF
D2
B340
TP4
C3
0.01 µF
1.2 V @ 3 A
GND
2
R8
4.99 K
TP5
3.3 V_RESET/
4.7 V
C10
150 pF
TP6
TP7
4
ENAB/
TP8
R11
4.99 K
R9
100 K
R12
140 k
VDD
RST
GND
5
SNS
GND
3
2
1
U2
TPS3801-01DCK
R13
16.2 K
12 V
R14
127 k
1
RC
VDD
8
2
SS
ISNS
7
3
4
C13
1000 pF
C17
33 pF
C12
100 pF
U3
TPS40200D
COMP DRV
FB
GND
R15
0.03 k
R16
1.0 K
4
6
3
5
R17
0
F = 200 kHz
25
1
6
Q3
IRLMS6802
C14
0.1 µF
C18
0.47 µF
R18
30.1 k
TP11
L2
33 µH
TP9
1
3.3 V_RESET/
C16
470 pF
C11
10 µF
D3
B340
TP10
2
1
C15
10 µF
2
J3
3.3 V @ 2 A
GND
R19
4.99 K
C19
150 pF
R22
26.7 k
Texas Instruments 2Q 2007
TP12
TP13
R20
100 K
Power Management for FPGAs Sine On 9
Reference Designs
Pull Up 3.3 or 5 V
PU1
PWRGD_1.2
VIN
VIN = 12 V
+
C1
47 µF
12 VIN, Mid Power, Simple Design
1
2
3
4
5
6
7
8
C9
10 µF
TPS54350
Download reference design schematic and BOM at:
www-s.ti.com/sc/techlit/SBVR001
U1
TPS54350PWP
VIN
BOOT
VIN
PH
UVLO
PH
PWRGD
LSG
RT
VBIAS
SYNC
PGND
ENA
AGND
COMP
VSENSE
PwrPD
Key Features
• 180° out-of-phase operation minimizes input capacitance
• 1.2-V SWIFT™ power good pin sequences 3.3-V rail
• 100-mΩ MOSFET switch integrated for high efficiency at 3 A
• Uses external lowside MOSFET for synchronous operation
• Output voltage: adjustable down to 0.891 V with 1% accuracy
• SwitcherPro™ design software
+
C4
1.0 µF
C2
100 µF
C10
0.1 µF
C11
3300 pF
R1
10.0 k
R3
7.68 k
R5
R2
1.37 k
28.7 k
VOUT 1 = 1.2 V @ 3 A
VOUT 2 - 3.3 V @ 3 A
C8
3300 pF
C15
10 µF
C14
47 µF
R14
10.0 k
U2
TPS54350PWP
VIN
BOOT
VIN
PH
UVLO
PH
PWRGD
LSG
RT
VBIAS
SYNC
PGND
ENA
AGND
COMP
VSENSE
PwrPD
17
C19
82 nF
L2
10 µH
C5
0.1 µF
16
15
14
13
12
11
10
9
1 2 3 67
Q2
FDR6674A
+
8 5
C16
1.0 µF
R7
3.74 k
R11
137
C12
33 nF
1
2
12 V
R1
10.0 K
U1
TPS40190DRC
1.2 V
1
R3
100 K
2
3
TP3
R5
100 K
C6
R6
4.99 K 470 pF
C3
2200 pF
4
5
C9
100 pF
EN
FB
HDRV
SW
COMP BOOT
VDO
LDRV
C1
10 µF
Q1
Si4426
R4 3.3
1.2 V
L1
6.8 µH
10
9
TP4
1
TP5
2
8 C2 0.1 µF
7
GND
BP5
11 PwrPD
1
+
6
C7
0.1 µF
Q2
Si4408DY
C8
4.7 µF
3.3 V_RESET/
4
D1
MMBZ5230BLT1
C10
0.01 µF
12 V
3.3 V_RESET/
R14
100 K
R17
4.99 K
R18
100 K
SNS
GND
3
2
1
R11
16.2 K
R12
10.0 K
U3
TPS40190DRC
1 EN
2
FB
TP7
C16
470 pF
RST
U2
TPS3801-01DCK
3.3 V
TP10
VDD
GND
5
4.7 V
1.2 V @ 6.0 A
GND
C5
10 µF
4.7 V
R10
4.99 K
12 V
J2
2
1
C4
2300 µF
R8
Open
R7
100 K
R9
10 k
C13
0.1 µF
R12
1.00 k
R6
768
TP2
R13
49.9 K
C18
100 µF
C20
3300 pF
TP1
J1
1.2 V
GND
TP6
R15
4.7
4
C17
1800 pF
R2
49.9 K
VOUT = 3.3 V
VOUT2
1
1
2
3
4
5
6
7
8
2
+
Download reference design schematic and BOM at:
www-s.ti.com/sc/techlit/SBVR003
Key Features
• Input operating voltage range: 4.5 V to 15 V
• Reference 0.591 V ±1%
• Voltage mode control
• Selectable short-circuit protection thresholds
• Pre-bias output safe
• Fixed switching frequency of 300 kHz
• Internal soft-start
• Bootstrapped drivers for N-Channel MOSFET
• Adaptive anti-cross conduction
• Internal bootstrap diode
R10
4.7
8 5
PWRGD_3.3
R16
215 k
TPS40190
VOUT = 1.2 V
VOUT1
Q2
FDR6674A
4
C7
180 pF
R13
10.0 k
Benefits
• Can be upgraded to 6 A with the TPS54550 pin-compatible
device
• Integrated FET minimizes board space
12 VIN, High Power, High Efficiency
1 2 3 67
17
C6
8200 pF
Reference Design for Stratix II,
Stratix II GX, Cyclone II, Virtex-4,
Spartan-3 Family
L1
10 µH
C3
0.1 µF
16
15
14
13
12
11
10
9
1
R8
10.0 k
2
Reference Design for Stratix II,
Stratix II GX, Cyclone II, Virtex-4,
Spartan-3 Family
R16
C13
100 K 2200 pF
C19
100 pF
HDRV 10
R15 3.3
9
SW
3
8 C12 0.1 µF
COMP BOOT
4
7
VDO LDRV
5
6
GND
BP5
11 PwrPD
C17
0.1 µF
C18
4.7 µF
C11
2300 µF
Q3
Si4426
L2
6.8 µH
TP8
1
3.3 V TP9
2
1
2
+
Q4
Si4408DY
C14
10 µF
J3
3.3 V @ 6.0 A
GND
1
C15
2300 µF
R19
Open
Benefits
• Scalable up to 20 A per rail
• Easy power sequencing with EN pin
• Highly efficient conversion to voltage rails
10
Power Management for FPGAs Sine On
Texas Instruments 2Q 2007
Reference Designs
Reference Design for Virtex-5
5-V Multiple FPGA Design for
Complex Systems
10 µF
+VIN
+
470 µF
10 µF
1.0 V @ 10 A
Maximum
–VOUT
Sense
PTH08T240W
+1.0 V @ 10 A
Eff. 87%
+
+VOUT
+
10 µF
1000 µF
ESR 5 mΩ
to 10 mΩ
1000 µF
ESR 5 mΩ
to 10 mΩ
–VOUT +V
ADJ
Sense
Inhibit/UVLO
UVLO
Adj.
Download reference design schematic and BOM at:
www-s.ti.com/sc/techlit/SLVR306
Benefits
T2’s reduce development costs and save PCB space:
• Sequencing easily implemented with Auto-Track technology
• SmartSync synchronization for input cap reduction/easier
filtering
• TurboTrans technology for high transient load applications
• Up to 8x reduction in output capacitors
• Faster transient response
• Stable with ultra-low ESR caps
• 1.5% tolerance meets specs of FPGA core
T/T
AutoTrack
PTH08T230W
Key Features
• T2 power modules for:
• Higher current (up to 50 A)
• Simplified sequencing with Auto-Track sequencing
• Fast transient response with TurboTrans technology
• Frequency synchronization with SmartSynch
• TPS51100 for DDR termination power
• Power supply for external flash memory
• Power supply for fan control
• Design used in Xilinx evaluation platform ML501
3.74 kΩ
SmartSync (in)
Rset = 20.5 kΩ - 1%
Board Area
0.539 in2
Load GND
23.2 kΩ
5V
SENSE
CT
SmartSync (in)
VDD
TPS3808G33
3.3 V SVS RESET
25 ms
Delay
MR
T/T
AutoTrack
2.2
µF
+
+VIN
470 µF
PTH08T230W
+3.3 V @ 6 A
Eff. 94%
22 µF
4700
pF
UVLO
Adj.
3.3 V @ 6 A
Maximum
–VOUT
Sense
+
+VOUT
+
200 µF
Ceramic
680 µF
ESR 5 mΩ
to 10 mΩ
–VOUT +V
ADJ
Sense
Inhibit/UVLO
Rset = 1.21 kΩ - 1%
Board Area
0.461 in2
SmartSync Control
240 kHz
with Phase Shift
Load GND
23.2 kΩ
SmartSync (in)
T/T
AutoTrack
2.2
µF
+
+VIN
470 µF
22 µF
UVLO
Adj.
PTH08T230W
+3.3 V @ 6 A
Eff. 94%
Inhibit/UVLO
1.8 V @ 6 A
Maximum
–VOUT
Sense
+
+VOUT
+
200 µF
Ceramic
100 pF
ESR 5 mΩ
to 10 mΩ
–VOUT +V
ADJ
Sense
Rset = 1.21 kΩ - 1%
Board Area
0.461 in2
Load GND
VDDQ 1.8 V
TPS51100DGQ
5V
VIN
VTTDDR
0,9 V @ 1.4 A
VDDQSNS
VLDOIN
S5
1 µF
GND
VTT
DDR
S3
PGND
VTTREF
0.1 µF
VTTSNS
10 µF
PwrPD
IN
1 µF
EN
BIAS
1 µF
10 kΩ
TPS74401
2.5 V
FB
R2
0.001 µF
1 ms
Power Up
R2 = 1.69 kΩ - 1%
R1 = 3.57 kΩ - 1%
IN
1 µF
BIAS
1 µF
PowerGood
PG
10 kΩ
TPS74401
2.5 V
OUT
R1
SS
GND
0.001 µF
1 ms
Power Up
Texas Instruments 2Q 2007
2.5 V
Flash
Reset
OUT
R1
GND
10 µF
PowerGood
PG
SS
EN
10 µF
2.5 V
Fan Control
Option
FB
R2
R2 = 1.69 kΩ - 1%
R1 = 3.57 kΩ - 1%
Power Management for FPGAs Sine On 11
TM
Technology for Innovators
TI Worldwide Technical Support
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Trademarks in this issue: Technology for Innovators , the
black/red banner, TurboTrans, Sine On, SWIFT, SwitcherPro,
EasyScale, High-Performance Analog >> Your Way graphic and
Auto-Track are trademarks of Texas Instruments. Microsoft and
Windows are registered trademarks of Microsoft Corporation.
Altera, Max, Cyclone and Stratix are registered trademarks of
Altera Corporation. Xilinx, Virtex, CoolRunner and Spartan are
registered trademarks of Xilinx Inc. All other trademarks are the
property of their respective owners.
© 2007 Texas Instruments Incorporated
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AN ANALOG
PRODCUT CATALOG
Power Management Solutions
for Xilinx® and Altera® FPGAs
2Q 2007
SLYM065