PLL701-01/02/04/06 Low EMI Spread Spectrum Multiplier Clock FEATURES • PIN CONFIGURATION • • • • • • • • XIN/FIN 1 XOUT/SD*^ 2 SC0^ 3 SC1^ 4 PLL701-0X Spread Spectrum Clock Generator with selectable multiplier from 1x to 6x outputs. Output frequency ranges: 10MHz to 180MHz. Accepts input from crystal or reference clock. Selectable Center, Down or Asymmetric Spread Modulation. Selectable Modulation rate. TTL/CMOS compatible outputs. 3.3V Operating Voltage. Low short term jitter. Available in 8-Pin 150mil SOIC. 8 VDD 7 SC2^ 6 FOUT 5 GND XIN/FIN = 10 ~ 30 MHz Note: ^: Internal pull-up resistor (120kΩ for SD, 30 kΩ for SC0-SC2). *: The value of SD is latched upon power-up. The internal pull-up resistor results in a default high value when no pull-down resistor is connected to this pin (recommended external pull-down resistor of 27 kΩ). DESCRIPTION The PLL701-01/02/04/06 are Spread Spectrum Clock Generators designed for the purpose of reducing EMI in high-speed digital systems. Any output frequency from 10 to 180MHz can be selected by programming 6 multiplier modes. The device is designed to operate from a crystal or reference clock input and provides 1x to 6x modulated clock outputs. OUTPUT CLOCK (FOUT) SELECTION SD 1 1 0 1 0 1 0 1 0 1 0 1 0 1 SC2 0 0 0 0 0 0 0 1 1 1 1 1 1 1 SC1 0 0 0 1 1 1 1 0 0 0 0 1 1 1 SC0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 FOUT (-01) FOUT (-02) FOUT (-04) FOUT (-06) X1 X1 X1 X1 X1 X1 X1 X1 X1 X1 X1 X1 X1 X1 X2 X2 X2 X2 X2 X2 X2 X2 X2 X2 X2 X2 X2 X2 X4 X4 X4 X4 X4 X4 X4 X4 X4 X4 X4 X4 X4 X4 X6 X6 X6 X6 X6 X6 X6 X6 X6 X6 X6 X6 X6 X6 SST Modulation Magnitude Freq. 0.50% 1.00% 1.50% 2.00% Fin / 512 2.50% 3.00% 3.50% Type C C D C A C A C A C A C A ±0.25% ±0.5% -1.0% ±0.75% +0.25% ~ -1.25% ±1.0% +0.5% ~ -1.5% ±1.25% +0.75% ~ -1.75% ±1.5% +1.0% ~ -2.0% ±1.75% +1.25% ~ -2.25% OFF Notes: C: Center Spread. A: Asymmetric Spread. D: Down Spread. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 08/30/05 Page 1 PLL701-01/02/04/06 Low EMI Spread Spectrum Multiplier Clock BLOCK DIAGRAM XIN/FIN XTAL OSC XOUT PLL SST FOUT Control SC(0:2) Logic PIN DESCRIPTIONS Name Number Type Description XIN/FIN 1 I Crystal input to be connected to fundamental parallel mode crystal.(C L =18pF) or clock input. XOUT/SD 2 B At power-up, this pin is an input pin to select modulation type. After input sampling, this pin is crystal output. Has internal pull up resistor. SC0 3 I Digital control input to select modulation magnitude. Has internal pull-up. SC1 4 I Digital control input to select modulation magnitude. Has internal pull-up. GND 5 P Ground. FOUT 6 O Modulated Clock Frequency Output. The frequency before modulation is synthesized by multiplying the input frequency by 1X, 2X, 4X, 6X depending on the part number (PLL701-01, -02, -04, -06). SC2 7 I Digital control input to select modulation magnitude. Has internal pull-up. VDD 8 P Power Supply. FUNCTIONAL DESCRIPTION Selectable spread spectrum and modulation magnitudes The PLL701-01/02/04/06 provides selectable spread spectrum modulation type, as well as selectable modulation magnitude. Selection is made by connecting specific pins to a logical “zero” or “one” according to the output clock selection table on page 1. In order to reduce the number of pins on the chip, the PLL701-01/02/04/06 uses pin 2 (XOUT/SD) as a bidirectional pin. The pin serves as modulation type selector input (SD) upon power-up (see output clock selection table on page 1), and as XOUT crystal connection as soon as the input has been latched. Pins 3 (SC0), 4 (SC1), and 7 (SC2) are used as inputs to select the spread spectrum modulation magnitude as shown on the output clock selection table (page 1). 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 08/12/04 Page 2 PLL701-01/02/04/06 Low EMI Spread Spectrum Multiplier Clock Connecting a selection pin to a logical “one” All selection pins have an internal pull-up resistor (30kΩ for pins 3, 4, 7, and 120kΩ for pin 2). This internal pull-up resistor will pull the input value to a logical “one” (pull-up) by default, i.e. when no resistive load is connected between the pin and GND. No external pull-up resistor is therefore required for connecting a logical “one” upon power-up. Connecting a selection pin to a logical “zero” For an input only pin, i.e. pins 3 (SC0), 4 (SC1), and 7 (SC2), the pin simply needs to be grounded to pull the input down to a logical “zero”. Connecting the bi-directional pin (SD) to a logical “zero” will however require the use of a 27kΩ loading resistor between the pin and GND. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model V DD VI VO TS TA TJ MIN. -0.5 -0.5 -65 -40 MAX. UNITS 4.6 V DD +0.5 V DD +0.5 150 85 125 260 2 V V V °C °C °C °C kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only. 2. Timing Characteristics PARAMETERS SYMBOL Rise Time Fall Time Output Duty Cycle Cycle to Cycle Jitter Cycle to Cycle Jitter Tr Tf DT T cyc-cyc T cyc-cyc CONDITIONS Measured at 0.8V ~ 2.0V @ 3.3V Measured at 2.0V ~ 0.8V @ 3.3V MIN. TYP. MAX. UNITS 0.8 0.78 45 0.95 0.85 50 1.1 0.9 55 100 100 ns ns % ps ps FOUT=48MHz @ 3.3V FOUT=72MHz @ 3.3V 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 08/12/04 Page 3 PLL701-01/02/04/06 Low EMI Spread Spectrum Multiplier Clock 3. DC/AC Specifications PARAMETERS Supply Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current Output High Voltage Output Low Voltage Input Frequency SYMBOL V DD V IH V IL I IH I IL V OH V OL F XIN F IN Maximum interruption of F IN Load Capacitance CL Pull-up Resistor Pull-up Resistor Short Circuit Current 3.3V Dynamic Supply Current R up R up I sc I CC CONDITIONS MIN. TYP. 2.97 0.7*VDD MAX. UNITS 3.63 V V V 0.3*VDD 100 100 I OH =5mA, VDD=3.3V I OL =6mA, VDD=3.3V When using a crystal When using reference clock When using reference clock Between Pin XIN and XOUT* PIN 2 PIN 3, 4, 7 No Load µA µA 2.4 0.4 30 30 100 10 10 MHz MHz µs 18 pF 120 30 50 20 kΩ kΩ mA mA *Note: Pin XIN and XOUT each has a 36pF capacitance. When used with a XTAL, the two capacitors combined load the crystal with 18pF. If driving XIN with a reference clock signal, the load capacitance will be 36pF (typical). 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 08/12/04 Page 4 PLL701-01/02/04/06 Low EMI Spread Spectrum Multiplier Clock PACKAGE INFORMATION 8 PIN Narrow SOIC ( mm ) SOI C Symbol Min. A 1.47 A1 B C D 0.10 0.33 0.19 4.80 E H L e 3.80 5.80 0.38 Max . 1.73 E 0.25 0.51 0.25 H D 4.95 4.00 6.20 1.27 A A1 1.27 BSC C L e B ORDERING INFORMATION For part ordering, please contact our Sales Department: 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER The order number for this device is a combination of Device number, Package type and Operating temperature range PLL701-0X X C X R NONE= TUBE R=TAPE AND REEL PART NUMBER NONE=NORMAL PACKAGE L=GREEN PACKAGE FAMILY DESIGNATOR PACKAGE TYPE S=SOIC Part / Order Number PLL701-0XSCR PLL701-0XSC PLL701-0XSCLR PLL701-0XSCL TEMPERATURE C=COMMERCIAL, I=INDUSTRIAL Marking P701-0XXC P701-0XXC P701-0XXCL P701-0XXCL Package Option SOIC SOIC SOIC SOIC -Tape and Reel -Tube -Tape and Reel (GREEN) –Tube (GREEN) Temperature 0 0 0 0 to to to to +70ﾟC +70ﾟC +70ﾟC +70ﾟC PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 05/07/03 Page 5