ISO122 Precision Lowest Cost ISOLATION AMPLIFIER FEATURES APPLICATIONS ● 100% TESTED FOR HIGH-VOLTAGE BREAKDOWN ● INDUSTRIAL PROCESS CONTROL: Transducer Isolator, Isolator for Thermocouples, RTDs, Pressure Bridges, and Flow Meters, 4mA to 20mA Loop Isolation ● GROUND LOOP ELIMINATION ● MOTOR AND SCR CONTROL ● ● ● ● ● RATED 1500Vrms HIGH IMR: 140dB at 60Hz BIPOLAR OPERATION: VO = ±10V 16-PIN PLASTIC DIP AND 28-LEAD SOIC EASE OF USE: Fixed Unity Gain Configuration ● POWER MONITORING ● PC-BASED DATA ACQUISITION ● TEST EQUIPMENT ● 0.020% max NONLINEARITY ● ±4.5V to ±18V SUPPLY RANGE DESCRIPTION The ISO122 is a precision isolation amplifier incorporating a novel duty cycle modulation-demodulation technique. The signal is transmitted digitally across a 2pF differential capacitive barrier. With digital modulation the barrier characteristics do not affect signal integrity, resulting in excellent reliability and good high frequency transient immunity across the barrier. Both barrier capacitors are imbedded in the plastic body of the package. VIN VOUT The ISO122 is easy to use. No external components are required for operation. The key specifications are 0.020% max nonlinearity, 50kHz signal bandwidth, and 200µV/°C VOS drift. A power supply range of ±4.5V to ±18V and quiescent currents of ±5.0mA on VS1 and ±5.5mA on VS2 make these amplifiers ideal for a wide range of applications. The ISO122 is available in 16-pin plastic DIP and 28lead plastic surface mount packages. International Airport Industrial Park • Mailing Address: PO Box 11400 Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • © SBOS160 1989 Burr-Brown Corporation –VS2 Gnd +VS2 –VS1 +VS1 Gnd • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706 Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 PDS-857F Printed in U.S.A. November, 1993 SPECIFICATIONS At TA = +25°C , VS1 = VS2 = ±15V, and RL = 2kΩ unless otherwise noted. ISO122P/U PARAMETER CONDITIONS ISOLATION Voltage Rated Continuous AC 60Hz 100% Test (1) Isolation Mode Rejection Barrier Impedance Leakage Current at 60Hz GAIN Nominal Gain Gain Error Gain vs Temperature Nonlinearity(2) 1s, 5pc PD 60Hz MIN TYP TYP MAX UNITS * VAC VAC dB Ω || pF µArms 140 1014 || 2 0.18 * * * 0.5 VO = ±10V 1 ±0.05 ±10 ±0.016 ±20 ±200 ±2 4 OUTPUT Voltage Range Current Drive Capacitive Load Drive Ripple Voltage(3) TEMPERATURE RANGE Specification Operating Storage θJA θJC MIN * * VISO = 240Vrms INPUT Voltage Range Resistance POWER SUPPLIES Rated Voltage Voltage Range Quiescent Current: VS1 VS2 MAX 1500 2400 INPUT OFFSET VOLTAGE Initial Offset vs Temperature vs Supply Noise FREQUENCY RESPONSE Small Signal Bandwidth Slew Rate Settling Time 0.1% 0.01% Overload Recover Time ISO122JP/JU * * * ±0.025 ±0.50 ±0.020 ±50 * * * * * ±0.050 * V/V %FSR ppm/°C %FSR mV µV/°C mV/V µV/√Hz ±10 ±12.5 200 * * * V kΩ ±10 ±5 ±12.5 ±15 0.1 20 * * * * * * V mA µF mVp-p 50 2 * * kHz V/µs 50 350 150 * * * µs µs µs VO = ±10V ±15 ±4.5 ±5.0 ±5.5 –25 –25 –40 100 65 * ±18 ±7.0 ±7.0 * +85 +85 +85 * * * * * * * * * * * * * V V mA mA °C °C °C °C/W °C/W * Specification same as ISO122P/U. NOTES: (1) Tested at 1.6 X rated, fail on 5pC partial discharge. (2) Nonlinearity is the peak deviation of the output voltage from the best-fit straight line. It is expressed as the ratio of deviation to FSR. (3) Ripple frequency is at carrier frequency (500kHz). The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® ISO122 2 CONNECTION DIAGRAM Top View —P Package Top View—U Package +VS1 1 16 Gnd +VS1 1 28 Gnd –VS1 2 15 VIN –VS1 2 27 VIN VOUT 7 10 –VS2 VOUT 13 16 –VS2 Gnd 8 9 Gnd 14 15 +VS2 +VS2 ABSOLUTE MAXIMUM RATINGS PACKAGE INFORMATION(1) MODEL ISO122P ISO122JP ISO122U ISO122JU PACKAGE PACKAGE DRAWING NUMBER 16-Pin Plastic DIP 16-Pin Plastic DIP 28-Pin Plastic SOIC 28-Pin Plastic SOIC 238 238 217-1 217-1 Supply Voltage ................................................................................... ±18V VIN ......................................................................................................±100V Continuous Isolation Voltage ..................................................... 1500Vrms Junction Temperature .................................................................... +150°C Storage Temperature ....................................................................... +85°C Lead Temperature (soldering, 10s) ................................................ +300°C Output Short to Common ......................................................... Continuous NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book. ORDERING INFORMATION MODEL ISO122P ISO122JP ISO122U ISO122JU PACKAGE NONLINEARITY MAX %FSR Plastic DIP Plastic DIP Plastic SOIC Plastic SOIC ±0.020 ±0.050 ±0.020 ±0.050 ® 3 ISO122 TYPICAL PERFORMANCE CURVES TA = +25°C, VS = ±15V unless otherwise noted. SINE RESPONSE (f = 2kHz) SINE RESPONSE (f = 20kHz) +10 Output Voltage (V) Output Voltage (V) +10 0 –10 0 500 0 –10 0 1000 50 STEP RESPONSE STEP RESPONSE +10 +10 Output Voltage (V) Output Voltage (V) 100 Time (µs) Time (µs) 0 –10 0 500 0 –10 50 0 1000 100 Time (µs) Time (µs) ISOLATION VOLTAGE vs FREQUENCY IMR vs FREQUENCY 160 Max DC Rating 140 120 1k IMR (dB) Peak Isolation Voltage 2.1k Degraded Performance 100 80 100 Typical Performance 60 40 0 100 1k 10k 100k 1M 10M 1 100M 100 1k 10k Frequency (Hz) Frequency (Hz) ® ISO122 10 4 100k 1M TYPICAL PERFORMANCE CURVES TA = +25°C, VS = ±15V unless otherwise noted. ISOLATION LEAKAGE CURRENT vs FREQUENCY PSRR vs FREQUENCY 60 54 100mA Leakage Current (rms) PSRR (dB) 10mA 40 +VS1 , +VS2 –VS1 , –VS2 20 1mA 1500Vrms 100µA 10µA 240Vrms 1µA 0.1µA 0 1 10 100 1k 10k 100k 1 1M 10 100 1k 10k 100k 1M Frequency (Hz) Frequency (Hz) SIGNAL RESPONSE TO INPUTS GREATER THAN 250kHz 100kHz Freq Out V OUT / VIN dBm 0 250 –10 200 –20 150 –30 100 –40 50 0 500kHz 1MHz Frequency Out VOUT/VIN 1.5MHz Input Frequency (NOTE: Shaded area shows aliasing frequencies that cannot be removed by a low-pass filter at the output.) ® 5 ISO122 THEORY OF OPERATION The ISO122 isolation amplifier uses an input and an output section galvanically isolated by matched 1pF isolating capacitors built into the plastic package. The input is dutycycle modulated and transmitted digitally across the barrier. The output section receives the modulated signal, converts it back to an analog voltage and removes the ripple component inherent in the demodulation. Input and output sections are fabricated, then laser trimmed for exceptional circuitry matching common to both input and output sections. The sections are then mounted on opposite ends of the package with the isolating capacitors mounted between the two sections. The transistor count of the ISO122 is 250 transistors. VOUT pin equal to VIN. The sample and hold amplifiers in the output feedback loop serve to remove undesired ripple voltages inherent in the demodulation process. BASIC OPERATION SIGNAL AND SUPPLY CONNECTIONS Each power supply pin should be bypassed with 1µF tantalum capacitors located as close to the amplifier as possible. The internal frequency of the modulator/demodulator is set at 500kHz by an internal oscillator. Therefore, if it is desired to minimize any feedthrough noise (beat frequencies) from a DC/DC converter, use a π filter on the supplies (see Figure 4). ISO122 output has a 500kHz ripple of 20mV, which can be removed with a simple two pole low-pass filter with a 100kHz cutoff using a low cost op amp. See Figure 4. MODULATOR An input amplifier (A1, Figure 1) integrates the difference between the input current (VIN/200kΩ) and a switched ±100µA current source. This current source is implemented by a switchable 200µA source and a fixed 100µA current sink. To understand the basic operation of the modulator, assume that VIN = 0.0V. The integrator will ramp in one direction until the comparator threshold is exceeded. The comparator and sense amp will force the current source to switch; the resultant signal is a triangular waveform with a 50% duty cycle. The internal oscillator forces the current source to switch at 500kHz. The resultant capacitor drive is a complementary duty-cycle modulation square wave. The input to the modulator is a current (set by the 200kΩ integrator input resistor) that makes it possible to have an input voltage greater than the input supplies, as long as the output supply is at least ±15V. It is therefore possible when using an unregulated DC/DC converter to minimize PSR related output errors with ±5V voltage regulators on the isolated side and still get the full ±10V input and output swing. An example of this application is shown in Figure 10. DEMODULATOR The sense amplifier detects the signal transitions across the capacitive barrier and drives a switched current source into integrator A2. The output stage balances the duty-cycle modulated current against the feedback current through the 200kΩ feedback resistor, resulting in an average value at the CARRIER FREQUENCY CONSIDERATIONS The ISO122 amplifier transmits the signal across the isolation barrier by a 500kHz duty cycle modulation technique. For input signals having frequencies below 250kHz, this system works like any linear amplifier. But for frequencies above 250kHz, the behavior is similar to that of a sampling amplifier. The signal response to inputs greater than 250kHz Isolation Barrier 200µA Sense 150pF 200kΩ VIN 200µA 1pF 1pF 1pF 1pF Sense 150pF 100µA 200kΩ 100µA VOUT – – || + A1 A2 S/H G=1 Osc +VS1 Gnd 1 –VS1 +VS2 FIGURE 1. Block Diagram. ® ISO122 6 + S/H G=6 Gnd 2 –VS2 HIGH VOLTAGE TESTING Burr-Brown Corporation has adopted a partial discharge test criterion that conforms to the German VDE0884 Optocoupler Standards. This method requires the measurement of minute current pulses (<5pC) while applying 2400Vrms, 60Hz high voltage stress across every ISO122 isolation barrier. No partial discharge may be initiated to pass this test. This criterion confirms transient overvoltage (1.6 x 1500Vrms) protection without damage to the ISO122. Lifetest results verify the absence of failure under continuous rated voltage and maximum temperature. performance curve shows this behavior graphically; at input frequencies above 250kHz the device generates an output signal component of reduced magnitude at a frequency below 250kHz. This is the aliasing effect of sampling at frequencies less than 2 times the signal frequency (the Nyquist frequency). Note that at the carrier frequency and its harmonics, both the frequency and amplitude of the aliasing go to zero. ISOLATION MODE VOLTAGE INDUCED ERRORS IMV can induce errors at the output as indicated by the plots of IMV vs Frequency. It should be noted that if the IMV frequency exceeds 250kHz, the output also will display spurious outputs (aliasing), in a manner similar to that for VIN > 250kHz and the amplifier response will be identical to that shown in the Signal Response to Inputs Greater Than 250kHz performance curve. This occurs because IMVinduced errors behave like input-referred error signals. To predict the total error, divide the isolation voltage by the IMR shown in the IMR vs Frequency curve and compute the amplifier response to this input-referred error signal from the data given in the Signal Response to Inputs Greater than 250kHz performance curve. For example, if a 800kHz 1000Vrms IMR is present, then a total of [(–60dB) + (–30dB)] x (1000V) = 32mV error signal at 200kHz plus a 1V, 800kHz error signal will be present at the output. This new test method represents the “state of the art” for non-destructive high voltage reliability testing. It is based on the effects of non-uniform fields that exist in heterogeneous dielectric material during barrier degradation. In the case of void non-uniformities, electric field stress begins to ionize the void region before bridging the entire high voltage barrier. The transient conduction of charge during and after the ionization can be detected externally as a burst of 0.010.1µs current pulses that repeat on each AC voltage cycle. The minimum AC barrier voltage that initiates partial discharge is defined as the “inception voltage.” Decreasing the barrier voltage to a lower level is required before partial discharge ceases and is defined as the “extinction voltage.” We have characterized and developed the package insulation processes to yield an inception voltage in excess of 2400Vrms so that transient overvoltages below this level will not damage the ISO122. The extinction voltage is above 1500Vrms so that even overvoltage induced partial discharge will cease once the barrier voltage is reduced to the 1500Vrms (rated) level. Older high voltage test methods relied on applying a large enough overvoltage (above rating) to break down marginal parts, but not so high as to damage good ones. Our new partial discharge testing gives us more confidence in barrier reliability than breakdown/no breakdown criteria. HIGH IMV dV/dt ERRORS As the IMV frequency increases and the dV/dt exceeds 1000V/µs, the sense amp may start to false trigger, and the output will display spurious errors. The common mode current being sent across the barrier by the high slew rate is the cause of the false triggering of the sense amplifier. Lowering the power supply voltages below ±15V may decrease the dV/dt to 500V/µs for typical performance. Isolation Barrier A0 ISO150 +15V –15V VIN VOUT 1 –VS2 1 Gnd VIN Gnd +VS2 +VS1 – VS1 1µF +15V –15V 2 9 15 15 10 7 VOUT 8 ISO122P 16 ±VS1 1µF 6 2 7 PGA 8 102 45 3 A1 ±VS2 1µF 1µF FIGURE 3. Programmable-Gain Isolation Channel with Gains of 1, 10, and 100. FIGURE 2. Basic Signal and Power Connections. ® 7 ISO122 Isolation Barrier 13kΩ 100pF 385Ω 13kΩ VIN 2 ISO122 –VS2 Gnd – 6 4700pF OPA602 3 VOUT = –VIN + Gnd +VS2 –VS1 +VS1 10µH 10µH 10µH ±VS1 10µH ±VS2 1µF 1µF 1µF 1µF 1µF 1µF 1µF 1µF FIGURE 4. Optional π Filter to Minimize Power Supply Feedthrough Noise; Output Filter to Remove 500kHz Carrier Ripple. For more information concerning output filter refer to AB-023. This Section Repeated 49 Times. ISO122P 10kΩ 1 e1 = 12V +V 9 10kΩ 15 V = e1 2 7 8 10 e2 = 12V 2 –V Multiplexer 16 Charge/Discharge Control ISO122P e49=12V 1 15 +V 9 7 e50=12V 2 +V –V 7 4 25kΩ 25kΩ 25kΩ – 5 8 10kΩ 10 2 10kΩ –V + 3 25kΩ 16 INA105 6 V = e50 2 1 FIGURE 5. Battery Monitor for a 600V Battery Power System. (Derives Input Power from the Battery.) ® ISO122 8 Control Section +15V 2 10.0V 6 REF 102 Thermocouple 4 R4 +15V –15V R1 27kΩ +15V Isothermal Block with 1N4148 (1) 1MΩ +15V –15V 1 12 RG R2 2 2 4 +In 5 INA101 10 11 –In 1 10 15 14 R5 50Ω R6 7 VOUT 8 13 16 3 R3 100Ω ISO122P 9 –15V 100 Zero Adj ISA TYPE E Ground Loop Through Conduit J NOTE: (1) –2.1mV/°C at 2.00µA. K T MATERIAL SEEBACK COEFFICIENT (µV/°C) R2 (R3 = 100Ω) R4 (R5 + R6 = 100Ω) 58.5 3.48kΩ 56.2kΩ 50.2 4.12kΩ 64.9kΩ 39.4 5.23kΩ 80.6kΩ 38.0 5.49kΩ 84.5kΩ Chromel Constantan Iron Constantan Chromel Alumel Copper Constantan FIGURE 6. Thermocouple Amplifier with Ground Loop Elimination, Cold Junction Compensation, and Up-scale Burn-out. 1mA 1mA 10 8 5 XTR101 RS 4-20mA 0.01µF 11 3 +VS =15V on PWS740 6 4 R1 = 100Ω 7 3 16 1 14 2 RCV420 5, 13 10 4 RTD (PT100) ISO122P 15 +V 15 9 7 8 11 R2 = 2.5kΩ 10 12 VOUT 0V-5V 2 16 –V 2mA Gnd –VS = –15V on PWS740 FIGURE 7. Isolated 4-20mA Instrument Loop. (RTD shown.) ® 9 ISO122 RS 10kΩ 2kΩ VL RD1 Load 0.1µF IL RD2 2 2kΩ ISO122P +V 16 – OPA602 3 6 (V1) IL= V1 + 10RS 0.01µF 9 7 15 8 ISO122P 10 +V 2 1 –V 9 15 7 16 10 2 0.3µF 8 0.3µF 1 –V 0.3µF XY 10 1 4 PWS740-3 3 6 X MPY100 0.3µF 3 2 1 6 5 4 Y (V2) PL= V2(RD1 + RD2) RS RD2 PWS740-2 1 4 PWS740-3 3 6 (V3) VL= V3(RD1 + RD2) RD2 3 2 1 6 5 4 To PWS740-1 PWS740-2 To PWS740-1 FIGURE 8. Isolated Power Line Monitor. ® ISO122 10 Channel 1 ISO122P 10 15 VIN 7 VOUT 8 9 16 2 1 0.3µF 0.3µF 0.3µF 0.3µF Channel 2 (Same as Channel 1.) 1 4 PWS740-3 +V 3 10µF 2 1 PWS740-3 6 3 4 1 3 6 3 2 1 PWS740-2 20µH PWS740-2 4 5 6 0.3µF 4 5 6 8 6 5 PWS740-1 4 3 Channel 3 (Same as Channel 1.) Channel 4 (Same as Channel 1.) FIGURE 9. Three-Port, Low-Cost, Four-Channel Isolated, Data Acquisition System. ® 11 ISO122 +15V 9 VIN , up to ± 10V Swing 7 ISO 122P VOUT 8 10 1 16 2 –15 +5V Regulator MC78L05 0.1µF 1 0.1µF 1 2 3 3 –5V Regulator MC79L05 2 0.33µF 0.33µF 4 PWS740–3 To PWS740–2,–1 NOTE: The input supplies can be subregulated to ±5V to reduce PSR related errors without reducing the ±10V input range. FIGURE 10. Improved PSR Using External Regulator. VS1 (+15V) VS (V) INPUT RANGE (V)(1) 20+ 15 12 –2 to +10 –2 to +5 –2 to +2 7 INA105 Difference Amp 2 5 R1 10kΩ 6 Signal Source VIN + RS 15 In 1 RC Gnd 16 4 1 Reference IN4689 5.1V 9 ISO ISO 122P 122 122P (1) R4 R3 3 +VS2 (+15V) R2 7 8 VOUT = VIN 10 2 –VS1 Com 2 –VS2 (–15V) NOTE: Since the amplifier is unity gain, the input range is also the output range. The output can go to –2V since the output section of the ISO amp operates from dual supplies. NOTE: (1) Select to match RS . FIGURE 11. Single Supply Operation of the ISO122P Isolation Amplifier. For additional information see AB-009. ® ISO122 12 1 2 4 5 6 HPR117 –15V, 20mA VIN Input Gnd +15V, 20mA 16 15 10 9 Gnd V IN V– V+ INPUT SECTION V+ V– 1 2 ISO122P Auxiliary Isolated Power Output OUTPUT SECTION V O 7 Gnd 8 +15V Output Gnd –15V VO FIGURE 12. Input-Side Powered ISO Amp. For additional information refer to AB-024. +15V Gnd 1 2 5 5 6 HPR117 HPR117 6 4 4 2 1 VIN –15V, 20mA Input Gnd +15V, 20mA 16 15 10 9 Gnd V IN V– V+ INPUT SECTION Auxiliary Isolated Power Output V+ V– 1 2 ISO122P Auxiliary Isolated Power Output OUTPUT SECTION V O 7 Gnd 8 +15V, 20mA Output Gnd –15V, 20mA VO FIGURE 13. Powered ISO Amp with Three-Port Isolation. For additional information refer to AB-024. ® 13 ISO122 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) ISO122JP ACTIVE PDIP NVF 8 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 ISO122JP ISO122JPE4 ACTIVE PDIP NVF 8 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 ISO122JP ISO122JU ACTIVE SOIC DVA 8 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -25 to 85 ISO 122JU ISO122JU/1K ACTIVE SOIC DVA 8 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -25 to 85 ISO 122JU ISO122JU/1KE4 ACTIVE SOIC DVA 8 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -25 to 85 ISO 122JU ISO122JUE4 ACTIVE SOIC DVA 8 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -25 to 85 ISO 122JU ISO122P ACTIVE PDIP NVF 8 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 ISO122P ISO122PE4 ACTIVE PDIP NVF 8 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -25 to 85 ISO122P ISO122U ACTIVE SOIC DVA 8 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -25 to 85 ISO 122U ISO122U/1K ACTIVE SOIC DVA 8 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -25 to 85 ISO 122U ISO122U/1KE4 ACTIVE SOIC DVA 8 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -25 to 85 ISO 122U ISO122UE4 ACTIVE SOIC DVA 8 20 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR -25 to 85 ISO 122U (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant ISO122JU/1K SOIC DVA 8 1000 330.0 24.4 10.9 18.3 3.2 12.0 24.0 Q1 ISO122U/1K SOIC DVA 8 1000 330.0 24.4 10.9 18.3 3.2 12.0 24.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) ISO122JU/1K SOIC DVA 8 1000 367.0 367.0 45.0 ISO122U/1K SOIC DVA 8 1000 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA MPDI072 – AUGUST 2001 NVF (R-PDIP-T8/16) PLASTIC DUAL-IN-LINE 0.775 (21,34) 0.735 (18,67) D 16 9 0.280 (7,11) 0.240 (6,10) Index Area 1 D 8 0.195 (4,95) 0.115 (2,92) 0.045 (1,14) 0.030 (0,76) 0.210 (5,33) MAX 0.070 (1,78) 0.045 (1,14) 0.325 (8,26) 0.300 (7,62) C Seating Plane Base Plane E 0.005 (0,13) MIN 4 PL D 1/2 Lead 0.150 (3,81) 0.115 (2,92) 0.100 (2,54) 0.022 (0,56) 0.014 (0,36) 0.010 (0,25) M 0.015 (0,38) MIN C 0.300 (7,63) 0.014 (0,36) 0.008 (0,20) 0.060 (1,52) 0.000 (0,00) F 0.430 (10,92) MAX F 4202501/A 08/01 A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001-BB with the exception of lead count. D. Dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 (0,25). E. Dimensions measured with the leads constrained to be perpendicular to Datum C. F. Dimensions are measured at the lead tips with the leads unconstrained. G. A visual index feature must be located within the cross-hatched area. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 MECHANICAL DATA MPDS105 – AUGUST 2001 DVA (R-PDSO-G8/28) PLASTIC SMALL-OUTLINE C A 18,10 17,70 0,25 M B M 28 15 B 7,60 7,40 10,65 10,01 D Index Area 1 14 2,65 2,35 C 0,75 0,25 x 45° Seating Plane 1,27 G 0,51 0,33 0,30 0,10 0,10 0,32 0,23 0,25 M C A M B S 0°–8° F 1,27 0,40 4202103/B 08/01 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body length dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall not exceed 0,15 mm per side. D. Body width dimension does not include inter-lead flash or portrusions. Inter-lead flash and protrusions shall not exceed 0,25 mm per side. E. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the cross-hatched area. G. Lead width, as measured 0,36 mm or greater above the seating plane, shall not exceed a maximum value of 0,61 mm. H. Lead-to-lead coplanarity shall be less than 0,10 mm from seating plane. I. Falls within JEDEC MS-013-AE with the exception of the number of leads. F. Lead dimension is the length of terminal for soldering to a substrate. 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