LM1203A LM1203A 150 MHz RGB Video Amplifier System Literature Number: SNOS652A LM1203A 150 MHz RGB Video Amplifier System Y The LM1203A is an improved version of the popular LM1203 wideband video amplifier system. The device is intended for high resolution RGB CRT monitors. In addition to three matched video amplifiers, the LM1203A contains three gated differential input black level clamp comparators for brightness control and three matched attenuator circuits for contrast control. Each video amplifier contains a gain set or ‘‘Drive’’ node for setting maximum system gain or providing gain trim capability for white balance. The LM1203A also contains a voltage reference for the video inputs. The LM1203A is pin and function compatible with the LM1203. Features Y Three wideband video amplifiers 150 MHz @ b3 dB Matched ( g 0.1 dB or 1.2%) attenuators for contrast control Y Improvements over LM1203 Y Y Y Y 150 MHz vs 70 MHz bandwidth VOUT low: 0.15V vs 0.9V tr, tf: 4 ns vs 7 ns Built in power down spot killer Applications Y Y High resolution RGB CRT monitors Video AGC amplifiers Wideband amplifiers with gain and DC offset controls Y O bs ol Block and Connection Diagrams Y et Y Y Three externally gated comparators for brightness control Provisions for individual gain control (Drive) of each video amplifier Video input voltage reference Low impedance output driver e General Description TL/H/11441 – 1 FIGURE 1 Order Number LM1203AN See NS Package Number N28B C1996 National Semiconductor Corporation TL/H/11441 RRD-B30M66/Printed in U. S. A. LM1203A 150 MHz RGB Video Amplifier System January 1996 Absolute Maximum Ratings (Note 1) Thermal Resistance (iJA) Junction Temperature (TJ) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (VCC) Pins 1, 13, 23, 28 (Note 3) Peak Video Output Source Current (Any One Amp) Pins 16, 20 or 25 Voltage at Any Input Pin (VIN) 50§ C/W 150§ C ESD Susceptibility (Note 4) Storage Temperature Lead Temperature (Soldering, 10 sec.) 13.5V 28 mA 2 kV b 65§ C to 150§ C 265§ C Operating Ratings (Note 2) VCC t VIN t GND Power Dissipation, (PD) (Above 25§ C derate based on iJA and TJ) 2.5W Temperature Range Supply Voltage (VCC) b 20§ C to a 80§ C 10.8V s VCC s 13.2V DC Electrical Characteristics See Test Circuit (Figure 2) , TA e 25§ C; VCC1 e VCC2 e 12V. S17, 21, 26 Open; V12 e 6V; V14 e 0V; V15 e 2.0V unless otherwise stated. Conditions Typical (Note 5) VCC1 a VCC2, RL e % (Note 7) 70 Parameter IS Supply Current V11 Video Input Reference Voltage Limit (Note 6) Units 95 mA (max) 2.8 2.5 V (min) e Symbol 3.1 V (max) 7 20 mA (max) 1.2 0.8 V (max) Video Input Bias Current Any One Amplifier V14L Clamp Gate Low Input Voltage Clamp Comparators On V14H Clamp Gate High Input Voltage Clamp Comparators Off 1.6 2.0 V (min) I14L Clamp Gate Low Input Current V14 e 0V b1 b 5.0 mA (max) I14H Clamp Gate High Input Current V14 e 12V 0.07 0.2 mA (max) ICLAMP a Clamp Cap Charge Current V5, 8 or 10 e 0V 750 500 mA (min) ICLAMPb Clamp Cap Discharge Current V5, 8 or 10 e 5V b 750 b 500 mA (min) VOL Video Output Low Voltage V5, 8 or 10 e 0V 0.15 0.5 V (max) VOH Video Output High Voltage V5, 8 or 10 e 5V 7.5 7 V (min) DVO(2V) Video Output Offset Voltage Between Any Two Amplifiers, V15 e 2V 2 g 25 mV (max) DVO(4V) Video Output Offset Voltage Between Any Two Amplifiers, V15 e 4V 2 g 25 mV (max) O bs ol et IB http://www.national.com 2 AC Electrical Characteristics See Test Circuit (Figure 2) , TA e 25§ C; VCC1 e VCC2 e 12V. S17, 21, 26 Closed; V14 e 0V; V15 e 4V unless otherwise stated. Symbol Parameter Conditions Typical (Note 5) Limit (Note 6) Units 4.5 V/V (min) AV max Video Amplifier Gain V12 e 12V, VIN e 560 mVPP 6.5 DAV 5V Attenuation @ 5V Ref: AV max, V12 e 5V b8 @ 2V Ref: AV max, V12 e 2V b 30 dB V12 e 12V (Note 8) g 0.3 dB dB Attenuation Absolute Gain Match DAV track 1 Gain Change Between Amplifiers V12 e 5V (Notes 8, 9) g 0.1 dB DAV track 2 Gain Change Between Amplifiers V12 e 5V (Notes 8, 9) g 0.3 dB THD Video Amplifier Distortion V12 e 3V, VO e 1 VPP 1 % f (b3 dB) Video Amplifier Bandwidth (Notes 10, 11) V12 e 12V, VO e 4 VPP (No External Peaking Capacitor) 100 MHz f (b3 dB) Video Amplifier Bandwidth (Notes 10, 11) V12 e 12V, VO e 4 VPP With 18 pF Peaking Cap from Pins 18, 22 and 27 to GND 150 MHz tr Output Rise Time (Note 10) VO e 4 VPP (No External Peaking Capacitor) 3 ns tf Output Fall Time (Note 10) VO e 4 VPP (No External Peaking Capacitor) 4 ns Vsep 10 kHz Video Amplifier 10 kHz Isolation V12 e 12V (Note 12) b 70 dB Vsep 10 MHz Video Amplifier 10 MHz Isolation V12 e 12V (Notes 10, 12) b 50 dB AV max et @ e DAV 2V AV match Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. bs ol Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 3: VCC supply pins 1, 13, 23, 28 must be externally wired together to prevent internal damage during VCC power on/off cycles. Note 4: Human body model, 100 pF discharged through a 1.5 kX resistor. Note 5: Typical specifications are specified at a 25§ C and represent the most likely parametric norm. Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 7: The supply current specified is the quiescent current for VCC1 and VCC2 with RL e % , see Figure 2’s test circuit. The supply current for VCC2 (pin 23) also depends on the output load. With video output at 2V DC, the additional current through VCC2 is 18 mA for Figure 2’s test circuit. Note 8: Measure gain difference between any two amplifiers. VIN e 1 VPP. Note 9: D AV track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators. It is the difference in gain change between any two amplifiers with the contrast voltage (V12) at either 5V or 2V measured relative to an AV max condition, V12 e 12V. For example, at AV max the three amplifiers’ gains might be 17.4 dB, 16.9 dB and 16.4 dB and change to 7.3 dB, 6.9 dB, and 6.5 dB respectively for V12 e 5V. This yields the measured typical g 0.1 dB channel tracking. Note 10: When measuring video amplifier bandwidth or pulse rise and fall times, a double sided full ground plane printed circuit board without socket is recommended. Video amplifier 10 MHz isolation test also requires this printed circuit board. O Note 11: Adjust input frequency from 10 kHz (AV max reference level) to the b 3 dB corner frequency (fb3 dB). Note 12: Measure output levels of the other two undriven amplifiers relative to the driven amplifier to determine channel separation. Terminate the undriven amplifier inputs to simulate generator loading. Repeat test at fIN e 10 MHz for Vsep e 10 MHz. 3 http://www.national.com e et bs ol TL/H/11441 – 2 FIGURE 2. LM1203A Test Circuit Typical Performance Characteristics VCC e 12V, TA e 25§ C unless otherwise specified O Contrast vs Frequency TL/H/11441 – 3 http://www.national.com 4 Typical Performance Characteristics VCC e 12V, TA e 25§ C unless otherwise specified (Continued) Crosstalk vs Frequency TL/H/11441 – 4 bs ol et e Frequency Response Using Various Peaking Caps TL/H/11441 – 5 O Attenuation vs Contrast Voltage TL/H/11441 – 6 5 http://www.national.com e et bs ol TL/H/11441 – 7 O *47X resistors are added to the input pins for protection against current surges coming from the 10 mF capacitors. By increasing these resistors to well over 100X the rise and fall times of the LM1203A can be increased for EMI considerations. FIGURE 3. LM1203A Typical Application http://www.national.com 6 VIDEO AMPLIFIER SECTION Figure 6 is a simplified schematic of one of the three video amplifiers along with the recommended external components. The IC pin numbers are circled and all external components are shown outside the dashed line. The video input is applied to pin 6 via a 10 mF coupling capacitor. DC bias for the video input is through the 10k resistor connected to the 2.8V reference at pin 11. The low frequency roll-off of the amplifier is set by these two components. Transistor Q1 buffers the video signal to the base of Q2. Q2’s collector current is then directed to the VCC1 supply directly or through the 2k load resistor depending upon the differential DC voltage at the bases of Q3 and Q4. This differential DC voltage is generated by the contrast control circuit which is described in the following sections. A 0.01 mF decoupling capacitor in series with a 30X resistor is required between pins 2 and 3 to ensure high frequency isolation between the three video amplifiers which share these common connections. The video signal is buffered by Q5 and Q6 and DC level shifted by the voltage drop across R5. The magnitude of the current through R5 is determined by the voltage at pin 8. The voltage at pin 8 is set by the clamp comparator output current which charges or discharges the clamp hold capacitor during the black level period of the video waveform. Transistors Q9 and Q10 are Darlington connected to ensure a minimum discharge of the clamp hold capacitor during the time that the clamp capacitor is gated off. Q7, Q8 and R6 form a current mirror which sets a voltage at the base of Q11. Q11 buffers the video signal to the base of Q12 which provides additional signal gain. The ‘‘Drive’’ pin allows the user to trim the Q12 gain of each amplifier to correct for gain differences in the CRT and high voltage cathode driver gain stages. A small capacitor (several pico-Farads) from the ‘‘Drive’’ pin to ground will cause high frequency peaking and slightly improve the amplifier’s bandwidth. Applications Information et Circuit Description e Figure 4 shows the block diagram of a typical analog RGB color monitor. The RGB monitor is used with CAD/CAM work stations, PC’s, arcade games and in a wide range of other applications that benefit from the use of color display terminals. The RGB color monitor characteristics may differ in such ways as sweep rates, screen size, CRT color trio spacing (dot pitch), or in video amplifier bandwidths but will still be generally configured as shown in Figure 4 . Separate horizontal and vertical sync signals may be required or they may be contained in the green video input signal. The video input signals are usually supplied by coax cable which is terminated in 75X at the monitor input and internally AC coupled to the video amplifiers. These input signals are approximately 1V peak to peak in amplitude and at the input of the high voltage video section, approximately 6V peak to peak. At the cathode of the CRT the video signals can be as high as 60V peak to peak. One important requirement of the three video amplifiers is that they match and track each other over the contrast and brightness control range. The Figure 4 block labeled ‘‘VIDEO AMPLIFICATION WITH GAIN AND DC CONTROL’’ describes the function of the LM1203A which contains the three matched video amplifiers, contrast control and brightness control. O bs ol Figure 5 is a block diagram of one of the video amplifiers along with the contrast and brightness controls. The contrast control is a DC-operated attenuator which varies the AC gain of all three amplifiers simultaneously while not introducing any signal distortions or tracking errors. The brightness control function requires a ‘‘sample and hold’’ circuit (black level clamp) which holds the DC bias of the video amplifiers and CRT cathodes constant during the black level reference portion of the video waveform. The clamp comparator, when gated on during this reference period, will charge or discharge the clamp capacitor until the plus input of the clamp comparator matches that of the minus input voltage which was set by the brightness control. TL/H/11441 – 8 FIGURE 4. Typical RGB Color Monitor Block Diagram 7 http://www.national.com Circuit Description (Continued) The value of this resistor should not be less than 390X or else package power limitations may be exceeded under worst case conditions (high supply voltage, maximum current, maximum temperature). The collector current from the video output transistor of each video channel is returned to the power supply at VCC2, pin 23. When making power dissipation calculations note that the data sheet specifies only the VCC1 and VCC2 supply current at 12V supply voltage with no pull down resistor at the output (i.e., RL e % , see test circuit Figure 2 ). The IC power dissipation due to VCC2 is dependant upon the external video output pull down resistor. bs ol et e For individual gain adjustment of each video channel, a 51X resistor in series with a 100X potentiometer should be used with the red and green channel drive pins. A 91X resistor used with the blue channel drive pin sets the blue channel amplifier gain at approximately 6.2. The 100X potentiometer at the red and green channel drive pins allow a gain of 6.2 with g 25% gain adjustment. The video signal at the collector of Q12 is buffered and level shifted down by Q13, Q14 and Q15 to the base of the output emitter follower Q16. A 50X decoupling resistor is included in series with the emitter of Q16 and the video output pin so as to prevent oscillations when driving capacitive loads. An external resistor should be connected between the video output pin and ground. O FIGURE 5. Block Diagram of LM1203A Video Amplifier with Contrast and Black Level Control http://www.national.com 8 TL/H/11441 – 9 bs ol et e Circuit Description (Continued) TL/H/11441 – 10 O FIGURE 6. Simplified Schematic of LM1203A Video Amplifier Section with Recommended External Components 9 http://www.national.com Circuit Description (Continued) (Figure 8) consists of a PNP input buffer transistor (Q46), a PNP emitter coupled pair (Q47 and Q49) referenced on one side to 2.1V and an output switch transistor Q53. When the clamp gate input at pin 14 is high (l1.5V) the Q53 switch is on and shunts the 200 mA current from current source Q54 to ground. When pin 14 is low (k1.3V) the Q53 switch is off and the 200 mA current is mirrored by the current mirror comprised of Q55 and Q36 (see Figure 9 ). Consequently the clamp comparator comprised of the differential pair Q35 and Q37 is enabled. The input of each clamp comparator is similar to the clamp gate except than an NPN emitter coupled pair is used to control the current that will charge or discharge the clamp capacitors at pins 5, 8 and 10. PNP transistors are used at the inputs because they offer a number of advantages over NPNs. PNPs will operate with base voltages at or near ground and will usually have a greater emitter base breakdown voltage (BVebo). Because the differential input voltage to the clamp comparator during the video scan period could be greater than the BVebo of NPN transistors, a resistor (R37) with a value one half that of R36 or R39 is connected between the bases of Q34 and Q38. The clamp comparator’s common mode range is from ground to approximately 9V and the maximum differential input voltage is VCC and ground. et O bs ol CLAMP GATE AND CLAMP COMPARATOR SECTION Figures 8 and 9 show simplified schematics of the clamp gate and clamp comparator circuits. The clamp gate circuit e INPUT REFERENCE AND CONTRAST CONTROL SECTION Figure 7 shows the input reference and contrast control circuitry. A temperature compensated 2.8V reference voltage is made available at pin 11. The external DC biasing resistors shown should not be larger than 10k because minor differences in input bias currents of the individual video amplifiers may cause offsets in gain. Figure 7 also shows how the contrast control circuit is configured. R21, R22, Q22, Q23 and Q24 establish a low impedance zero TC half supply voltage reference at the base of Q25. The differential amplifier formed by Q27, Q28 and feedback transistor Q29 along with R28 and R29 establish a differential base voltage for Q3 and Q4 in Figure 6 . When externally adding or subtracting current from the collector of Q28, a new differential voltage is generated that reflects the change in the ratio of currents in Q27 and Q28. To allow voltage control of the current through Q28, resistor R27 is added between the collector Q28 and pin 12. A capacitor should be connected from pin 12 to ground to prevent noise from the contrast control potentiometer from entering the IC. TL/H/11441 – 11 FIGURE 7. Simplified Schematic of LM1203A Video Input Reference and Contrast Control Circuits http://www.national.com 10 et e Circuit Description (Continued) TL/H/11441 – 12 O bs ol FIGURE 8. Simplified Schematic of LM1203A Clamp Gate Circuit 11 http://www.national.com bs ol et e Circuit Description (Continued) O FIGURE 9. Simplified Schematic of LM1203A Clamp Comparator Circuits http://www.national.com 12 TL/H/11441 – 13 Additional Applications of the LM1203A Figure 10 shows the configuration for a three channel high frequency amplifier with non gated DC feedback. Pin 14 is tied low to turn on the clamp comparators (feedback amplifiers). The inverting inputs (Pins 17, 21, 26) are connected to the amplifier outputs from a low pass filter. Additional low frequency filtering is provided by the clamp caps. The drive resistors can be made variable or fixed at values between 0X and 300X. Maximum output swings are achieved when the DC output is set to approximately 4V. The high frequency response will be dependent upon external peaking at the drive pins. Figure 11 shows a complete RGB video preamplifier circuit using the LM1203A. A quad Exclusive-OR gate (MM74HC86) is used to generate the back porch clamp signal from the composite sync input signal. The composite H O bs ol et e Sync input signal may have either polarity. The back porch clamp signal applied to LM1203A’s pin 14 allows clamping the video output signals to the black reference level, thereby providing DC restoration. The back porch clamp pulse width is determined by the time constant due to the product of R11 and C15. For fast horizontal scan rates, the back porch clamp pulse width can be made narrower by decreasing the value of R11 or C15 or both. Note that an MM74C86 Exclusive-OR gate may also be used, however, the pin out is different than that of the MM74HC86. For optimum performance and maximum bandwidth, high speed buffer transistors (Q1, Q2 and Q3 in Figure 11 ) are recommended. The 2N5770 NPN transistors maintain high speed at high currents when driving the inputs of high voltage CRT drivers. TL/H/11441 – 14 FIGURE 10. Three Channel High Frequency Amplifier with Non-gated DC Feedback (Non-video Application) 13 http://www.national.com O bs ol et e Additional Applications of the LM1203A (Continued) TL/H/11441 – 18 FIGURE 11. LM1203A Applications Circuit http://www.national.com 14 LM1203A vs LM1203 printed circuit board with adequate ground plane and power supply decoupling as close to the VCC pins as possible is recommended. Figure 12 shows the layout of the PC board for Figure 11’s circuit. For suggestions on optimum PC board layout, please see the reference section below. The LM1203A also includes a built-in power down spot killer to prevent a flash on the screen upon power down. In some preamplifiers, the video output signal may go high as the device is being powered down. This may cause a whiter than white level at the output of the CRT driver, thus causing a flash on the screen. LM1203A is an improved version of the LM1203 RGB video amplifier system and is pin and function compatible with the LM1203. LM1203A’s output voltage can swing as low as 0.15V as opposed to 0.9V for the LM1203. This eliminates the need for a level shift stage between the preamplifier and the CRT driver in most applications. The LM1203A also offers faster rise and fall times of 4 ns vs 7 ns for the LM1203 and 100 MHz bandwidth vs 70 MHz for LM1203. With a peaking capacitor across the drive resistor, LM1203A’s bandwidth can be extended to 150 MHz. Because of LM1203A’s wide bandwidth, the device may oscillate if plugged directly into an existing LM1203 board. For optimum performance and stable operation, a double sided REFERENCE O bs ol et e Ott, Henry W. Noise Reduction Techniques in Electronic Systems, John Wiley & Sons, New York, 1976. TL/H/11441 – 16 FIGURE 12(a). PC Board Silk Screen 15 http://www.national.com bs ol et e Additional Applications of the LM1203A (Continued) TL/H/11441 – 17 O FIGURE 12(b). PC board layout of bottom side. Top side of PC board (not shown) is full ground plane. http://www.national.com 16 e et bs ol O 17 http://www.national.com e et Order Number LM1203AN NS Package Number N28B bs ol LM1203A 150 MHz RGB Video Amplifier System Physical Dimensions inches (millimeters) unless otherwise noted LIFE SUPPORT POLICY O NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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