SSG9410
18A, 30V,RDS(ON) 6mΩ
Elektronische Bauelemente
N-Channel Enhancement Mode Power Mos.FET
RoHS Compliant Product
SOP-8
Description
0.19
0.25
0.40
0.90
The SSG9410 provide the designer with the best Combination of fast switching,
45
o
0.375 REF
6.20
5.80
ruggedized device design, Ultra low on-resistance and cost-effectiveness.
0.25
The SOP-8 is universally preferred for all commercial
3.80
4.00
industrial surface mount application and suited for low
voltage applications such as DC/DC converters.
1.27Typ.
0.35
0.49
4.80
5.00
0.100.25
1.35
1.75
o
0
o
8
Features
Dimensions in millimeters
* Low on-resistance
D
D
D
D
* Simple drive requirement
8
7
6
5
* Fast switching Characteristic
Date Code
D
9410SC
G
1
2
3
4
S
S
S
G
S
Absolute Maximum Ratings
Parameter
Drain-Source Voltage
Ratings
Unit
30
V
±20
V
18
A
ID@TA=70 C
15
A
IDM
80
A
2.5
W
0.02
W / oC
VDS
Gate-Source Voltage
VGS
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current
Symbol
3
3
1
Total Power Dissipation
o
ID@TA=25 C
o
o
PD@TA=25 C
Linear Derating Factor
Operating Junction and Storage Temperature Range
Tj, Tstg
-55~+150
Symbol
Ratings
o
C
Thermal Data
Parameter
Thermal Resistance Junction-ambient 3
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Rthj-a
50
Unit
o
C /W
Any changing of specification will not be informed individual
Page 1 of 4
SSG9410
18A, 30V,RDS(ON) 6m Ω
N-Channel Enhancement Mode Power Mos.FET
Elektronische Bauelemente
o
Electrical Characteristics( Tj=25 C Unless otherwise specified)
Parameter
Symbol
Min.
Typ.
Max.
Unit
BVDSS
30
_
_
V
BVDS/ Tj
_
0.01
_
V/ C
_
_
1.2
V
_
_
±100
nA
VGS=± 12V
_
_
1
uA
VDS=30V,VGS=0
_
_
25
uA
VDS=24V,VGS=0
_
_
5
_
_
6
_
_
Qg
_
59
95
Gate-Source Charge
Qgs
_
10
_
Gate-Drain ("Miller") Charge
Qgd
23
_
16
_
Tr
_
12
_
Td(Off)
_
96
_
Tf
_
30
_
_
5080
8100
660
_
400
_
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
VGS(th)
Gate Threshold Voltage
IGSS
Gate-Source Leakage Current
o
Drain-Source Leakage Current (Tj=25 C)
Drain-Source Leakage Current (Tj=70oC)
Static Drain-Source On-Resistance
Total Gate Charge
2
Turn-on Delay Time
2
2
IDSS
RDS(ON)
Td(ON)
Rise Time
Turn-off Delay Time
Fall Time
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Forward Transconductance
_
_
_
Test Condition
VGS=0V, ID=250uA
o
o
Reference to 25 C ,ID=1mA
VDS=VGS, ID=250uA
VGS=10V, ID=18A
mΩ
8
VGS=4.5V, ID=12A
VGS=2.5V, ID=6A
nC
ID=18A
VDS=24V
VGS=4.5V
VDS=15V
ID=1A
nS
VGS=10V
RG=3.3Ω
RD=15Ω
pF
VGS=0V
VDS=25V
VDS=10V, ID=12A
f=1.0MHz
Crss
_
Gfs
_
47
_
S
Symbol
Min.
Typ.
Max.
Unit
Test Condition
_
_
-1.2
V
IS=18A, VGS=0V.
Source-Drain Diode
Parameter
Forward On Voltage 2
Reverse Recovery Time
VSD
2
Reverse Recovery Charge
Trr
Qrr
_
_
43
39
_
_
nS
nC
Is=18A, VGS=0
dl/dt=100A/uS
Notes: 1.Pulse width limited by Max. junction temperature.
2.Pulse width≦300us, dutycycle≦2%.
3.Surface mounted on 1 inch2 copper pad of FR4 board; 270°C/W when mounted on min. copper pad.
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Any changing of specification will not be informed individual
Page 2 of 4
SSG9410
Elektronische Bauelemente
18A, 30V,RDS(ON) 6m Ω
N-Channel Enhancement Mode Power Mos.FET
Characteristics Curve
Fig 1. Typical Output Characteristics
Fig 3. On-Resistance v.s. Gate Voltage
Fig 5. Forward Characteristics of
Reverse Diode
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
Fig 2. Typical Output Characteristics
Fig 4. Normalized On-Resistance
v.s. Junction Temperature
Fig 6. Gate Threshold Voltage v.s.
Junction Temperature
Any changing of specification will not be informed individual
Page 3 of 4
SSG9410
Elektronische Bauelemente
Fig 7. Gate Charge Characteristics
Fig 9. Maximum Safe Operating Area
Fig 11. Switching Time Circuit
http://www.SeCoSGmbH.com/
01-Jun-2002 Rev. A
18A, 30V,RDS(ON) 6mΩ
N-Channel Enhancement Mode Power Mos.FET
Fig 8. Typical Capacitance Characteristics
Fig 10. Effective Transient Thermal Impedance
Fig 12. Gate Charge Waveform
Any changing of specification will not be informed individual
Page 4 of 4