SSU50N10 54A , 100V , RDS(ON) 22mΩ N-Ch Enhancement Mode Power MOSFET Elektronische Bauelemente RoHS Compliant Product A suffix of “-C” specifies halogen free DESCRIPTION TO-263 The SSU50N10 is the highest performance trench N-ch MOSFETs with extreme high cell density , which provide excellent RDS(ON) and gate charge for most of the synchronous buck converter applications . FEATURES Advanced high cell density Trench technology Super Low Gate Charge Excellent CdV/dt effect decline 100% EAS and 100% Rg Guaranteed Green Device Available MARKING 50N10 Date Code 2 Drain PACKAGE INFORMATION 1 Package MPQ Leader Size TO-263 0.8K 13 inch REF. Gate A b L4 c L3 L1 E 3 Source Millimeter Min. Max. 4.40 4.80 0.76 1.00 0.00 0.30 0.36 0.5 1.50 REF 2.29 2.79 9.80 10.4 Millimeter Min. Max. 1.17 1.45 1.1 1.47 8.5 9.0 2.54 REF 14.6 15.8 0° 8° 1.27 REF REF. c2 b2 D e L θ L2 ABSOLUTE MAXIMUM RATINGS (TA=25°C unless otherwise specified) Parameter Symbol Rating Unit Drain-Source Voltage VDS 100 V Gate-Source Voltage VGS ±20 V 54 A 38 A 160 A Continuous Drain Current 1 VGS=10V, TC=25°C VGS=10V, TC=100°C Pulsed Drain Current 2 Total Power Dissipation ID IDM TC=25°C 4 TA=25°C Single Pulse Avalanche Energy 3 Single Pulse Avalanche Current Operating Junction and Storage Temperature Range 104 PD W 3.13 EAS 98 mJ IAS 41 A TJ, TSTG -55~150 °C RθJA 40 °C / W RθJC 1.2 °C / W Thermal Resistance Rating Maximum Thermal Resistance Junction-Ambient (PCB 1 mount) Maximum Thermal Resistance Junction-Case http://www.SeCoSGmbH.com/ 9-Dec-2011 Rev. A 1 Any changes of specification will not be informed individually. Page 1 of 4 SSU50N10 54A , 100V , RDS(ON) 22mΩ N-Ch Enhancement Mode Power MOSFET Elektronische Bauelemente ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise specified) Parameter Symbol Min. Typ. Max. Unit Teat Conditions Static Drain-Source Breakdown Voltage BVDSS 100 - - V VGS=0, ID=250µA Gate-Threshold Voltage VGS(th) 2.5 - 4.5 V VDS=VGS, ID=250µA gfs - 27 - S VDS=5V, ID=30A IGSS - - ±100 nA VGS= ±20V - - 1 µA VDS=80V, VGS=0 - - 5 - 18 22 Forward Transconductance Gate-Source Leakage Current TJ =25°C Drain-Source Leakage Current IDSS TJ =55°C Static Drain-Source On-Resistance 2 RDS(ON) - 36 40 VDS=0, VGS=0, f =1.0MHz nC ID=30A VDS=80V VGS=10V nS VDS=50 V ID=30A VGS=10V RG=3.3 Ω pF VGS =0 VDS=15 V f =1.0MHz - mJ VDD=25V,L=0.1mH , IAS=30A Rg - 1.9 3.8 Total Gate Charge Qg - 27.6 38.6 Gate-Source Charge Qgs - 11.4 16 Gate-Drain (“Miller”) Change Qgd - 7.9 11.1 Td(on) - 15.6 31.2 Tr - 17.2 31 Td(off) - 16.8 33.6 Tf - 9.2 18.4 Input Capacitance Ciss - 1890 2645 Output Capacitance Coss - 268 375 Reverse Transfer Capacitance Crss - 67 94 Rise Time Turn-off Delay Time Fall Time VGS=7V, ID=15A Ω Gate Resistance Turn-on Delay Time VGS=10V, ID=30A mΩ Guaranteed Avalanche Characteristics Single Pulse Avalanche Energy 5 EAS 53 - Source-Drain Diode Diode Forward Voltage 2 VSD - - 1.2 V IS=1A, VGS=0 IS - - 40 A VD=VG=0, Force Current Reverse Recovery Time Trr - 34 - ns Reverse Recovery Charge Qrr - 47 - nC Continuous Source Current 1,6 IF=30A, TJ = 25°C dI/dt=100A/µs Notes: 1. The data tested by surface mounted on a 1 inch2 FR-4 board with 2OZ copper. 2. The data tested by pulsed , pulse width≦300µs , duty cycle≦2% 3. The EAS data shows Max. rating . The test condition is VDD=25V,VGS=10V,L=0.1mH,IAS=41A 4. The power dissipation is limited by 150°C junct ion temperature 5. The Min. value is 100% EAS tested guarantee. 6. The data is theoretically the same as ID and IDM , in real applications , should be limited by total power dissipation. http://www.SeCoSGmbH.com/ 9-Dec-2011 Rev. A Any changes of specification will not be informed individually. Page 2 of 4 SSU50N10 Elektronische Bauelemente 54A , 100V , RDS(ON) 22mΩ N-Ch Enhancement Mode Power MOSFET CHARACTERISTIC CURVES http://www.SeCoSGmbH.com/ 9-Dec-2011 Rev. A Any changes of specification will not be informed individually. Page 3 of 4 SSU50N10 Elektronische Bauelemente 54A , 100V , RDS(ON) 22mΩ N-Ch Enhancement Mode Power MOSFET CHARACTERISTIC CURVES http://www.SeCoSGmbH.com/ 9-Dec-2011 Rev. A Any changes of specification will not be informed individually. Page 4 of 4