1 SPEC No. 1 E L 0 6 8 1 0 7 ISSUE: Aug. 31. 1994 To; SPECIFICATIONS Product Type lode1 No. 8 0 0 u t p u t L CD S e gm en t Driver LH1514AF %This tentative specifications contains ‘20 pages including the cover and appendix. If you have any objections.please contact us before issuing purchasing order. CUSTONERSACCEPTANCE DATE: BY: PRESENTED BY: Y. $tNO Dept. Genera .l Manager REVIEWED BY: Engineering PREPARED BY: Dept. 1 SHARP CORPORATION 1 SHARI= 1 LH1514AF Contents Page 1. Summary 2. Features 3. Block ................................................. 2 ................................................ 2 ........................................... 3 Diagram 4. Functional Operations of Each Block ..................o.. 3 5. Pin Configuration ....................................... 5 6. Pin Descriptions ........................................ 5 .................... 7 7. Description of Functional . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8. precaution 9. Absolute Maximum 10. Recommended 11. Electrical Operations Ratings Operating ,............................... Conditions Characteristics 12. Example of System 13. Example of Typical 14. Package and Packing . . . . . . . . . . . . . . . ..*....... . . . . . . . . . . . . . . . ..*............ Configuration Characteristic Specification 13 13 13 . . . . . . . . . . . . . . . . . . . . . . . . . 16 ....................... 17 •~~=~~~~==....*~=~=~=~~ 18 (Note] This document contains confidential information such as copyright and know-how belonging to Sharp Corporation. The information herein shall therefore be used exclusively for the design of systems utilizing this product and may not be used for any other purpose. This document shall not be reprinted or disclosed to any third party without the prior written consent of Sharp Corporation. This product is designed to be used in electrical products such as office equipment , audio-visual equipment and other consumer products. You are requested to contact Sharp Corporation if you intend to use this product for specific applitrains or aircraft which have critical control or cations such as automobiles, safety requirements, antidisaster. anticrime systems or any other applications which require extremely high reliability. This product shall .not be used in any medical equipment which affects human life. LH1514AF 2 1. Summary The LH1514AF is a 80 output segment driver LSI suitable for driving black and white dot matrix LC panels. Through the use of SST (Super Slim TCP) technology, it is ideal for substantially decreasing the size of the frame section of the LC module. The LH1514AF is particularly well suited to driving black and white LC panels used for palmtop personal computers because of its low-voltage operation (Supply voltage for logic system : -5.5 to -2.5 V). When combined with the LH1513A Common Driver, a low power consuming, high-precision LC panel display can be assembled. 2. Features . Supply Supply voltage voltage for for the logic LC drive system : -5.5 to : -28.0 to (absolute : 80 : 1.5 kR : 6.5 MHz -2.5 V -10.0 v maximum rating -30.0 V) Number of LC drive outputs Low output impedance (Typ.) Shift Clock frequency (Max.) Low power consumption Adopts a data bus system 4-bit/B-bit parallel input modes are selectable with a mode (MD) pin Automatic transfer function of an enable signal Automatic counting function which, in the chip select mode, causes the internal clock to be stopped by automatically counting 80 of input data . Line latch circuit reset function when DISPOFF active . Supports high capacity LC panel display when combined with the LH1513A Common Driver CMOS process (N-type Silicon Substrate) Package : 109 pin TCP (Tape Carrier Package) Not designed or rated as radiation hardened SHARP LH1514AF 3. Block 3 Diagram VOR VZR VSR VSR YI y2 Y79 Ye0 . .._......._.._.----.--.--.-- FB VSL DISPOFF V3L EIO, V2L EIOz VOL LP XCK SHL MD 4. Functional Operations of Each Block Following a LP signal input, and after the chip select signal is input, a select signal is generated internally until 80 bits of data have been read in. Once data input has been completed, a select signal for cascade the Line Latch selection signal driver output pin is controlled by the control logic latch control, 80 bits of data are read in five sets All 80 bits which have been read into the data latch simultaneously latched on the falling edge of the LP output to the level shifter block. shifts and the data of 16 bits. are signal, and SHARP LH1514AF 4 V,) based on the FR and DISPOFF selection signal output from the active control block. Once the selection signal has been output, operation of the data latch and data transmission are controlled, 80 bits of data are . . SHARI= 5. Pin Configuration 6. Pin Descriptions 6-l. Pin 5 LH1514AF Designations a9 90 91 92 93 94 95 96 to 103 TEST2 TEST1 SHL DISPOFF FR LP XCK DIO-D17 I I I I I I I I Test mode selection input Test mode selection input Display data shift direction selection Control input for deselect output level AC-converting signal input for LC drive Display data latch pulse input Display data shift clock input Display data input waveform SHARP 6-2. LH1514AF Input/Output 6 Circuits Signal Input Fig.1 Input [Applicable pins] DI,,-, ,XCK.LP.FR SHL,MD.DISPOFF Circuit Input Signal Output Control Fig.2 +Control Input/Output Signal 11j \ Signal [Applicable EIO, .EI02 Circuit 7 Signal I-Control pins] Signal 0 Control -I Signal 3 V5 t- I v3 Control Signal v5 [Applicable Fig.3 LC Drive Output Circuit Y1-Ye0 pins] SHARP LH1514AF 7. Description 7-l. Pin of Functional 7 Operations Functions river vo the bias voltage used is set by a resistor divider. *Ensure that voltages are set such that VssLV0>V2>V,>V5. *To further reduce the difference between the output waveforms of LC driver output pins Y1 and Ys,,. externally connect VIR and VIL *In 4-bit parallel input mode, input data into the ially 4 pins DI,,-D13. from YsO to Y1. *The input signal is level-shifted from logic voltage level drive voltage level,and controls LC drive circuit. *When set to Voo level ‘L”.the LC drive output pins (Y,-Yso) to LC are set *While set to ‘L”.the contents of the line latch are reset.but read the display data in the data latch regardless of condition of DISPOFF. When the DISPOFF function is canceled.the driver outputs deselect level (V, or V,),then outputs the contents of the date latch on the next falling edge of the LP. That time.if DISPOFF removal time can not kee *The input signal is level-shifted from logic voltage level to LC drive voltage level,and controls LC drive circuit. l Normally,inputs a frame inversion signal. *The LC driver output pin’s output voltage level can be set using the line latch output signal and the FR signal.Table of truth value SHARP 8 LH1514AF *When set *When set parallel to Voo level “L”, 4-bit parallel to VSS level “H”. 8-bit ip between the display data input mode is set. input mode is set. and driver output pins is is set for input. *When SHL input is at VSS level “H”, EIO, is set for input, and EIOs is set for output. 80 bits of *During output, set to “H” while LP*XCK is “H” and after data have been read set to ‘L” for one cycle (from falling edge to falling edge of the XCK),after which it return to “H”. after the LP signal is input, the chip is selected *During input, After 80-bits of data have been read, the VT. Va. or V,) (VII. 7-2. Functional 7-2-l. Truth Here, [Note] is selected and outnut. Operations Table VSSlV,>V,>V3>Vs, L: VDo(-5.5 “Don’t care” should be fixed There are two kinds of power for LCD driver, please supply specification for each power to -2.5 V). H: VSS(O V), x: Don’t care to “H” or “L”, avoiding floating. supply (logic level voltage,LC drive voltage) regular voltage which assigned by pin. SHARI= 7-2-2. LH1514AF Relationship (a) q-Bit Parallel between the Display Data 9 and Driver Output pins Mode Iclocd MD ::: I y6 y 2 (b) a-Bit Parallel Mode SHARP 7-2-3. LH1514AF Connection Examples of Plural Segment Drivers (a) Case of SHL=“L” last top data .,:li (data taking flow) data :,ii;: Yso -Y, EIO, XCK LP . MD FR DIo-DIT (b) Case of SHL=‘H” DIo-DI, FR MD LP . XCK VDD EIO, Yl :A EIOz > EIO, ‘Ye0 i[i (data top data Yl ‘Yso taking EIOz --........-.+EIO, EIOz 1 YI ------+y*o flow) last ;rT.,, I data i SHARP 7-2-4. LH1514AF Timing Chart of 4-Device 11 Connection cascade \I FR K LP n l-l . DIo-DI, .I/ device EI (device A I. device B I/ I. I/ device A) EO (device A) EO (device B) (devf:e C) c*> n: 4-bit 8-bit . parallel parallel mode 20 mode 10 C device D SHARP LH1514AF 8. Precaution OPrecaution when connecting or disconnecting the power This LSI has a high-voltage LCD driver, so it may be permanently damaged by a high current which may flow if a voltage is supplied to the LC drive power supply while the logic system power supply is floating. The detail is as follows. *When connecting the power supply, connect the LC drive power after connecting the logic system power. Furthermore, when disconnecting the power, disconnect the logic system power after disconnecting the LC drive power. *We recommend you connecting the serial resistor (50 to 100 !I) to the LC power Vs of the system as a current limitter resistor. And set up drive the suitable value of the resistor in consideration of LC display grade. And when connecting the logic power supply, the logic condition of this LSI inside is insecurity. Therefore connecting the LC drive power supply after resetting logic condition of this LSI inside on DISPOFF function. After that, cancel the DISPOFF function after the LC drive power supply has become stable. Furthermore, when disconnecting the power, set the LC driver output pins to level V0 on DISPOFF function. After that, disconnect the logic system power after disconnecting the LC drive power. When connecting the power supply. show the following recommend sequence. 12 LH1514AF 9. Absolute Maximum 10. Recommended 11. Electrical 11-1. 13 Ratings Operating Characteristics Conditions . DC Characteristics (Selection) Consumed current (3) Is vDD=-5 v,*q vDo=-3 v.*4v5I. vL)o=-5 v,*4 ,V5R [Note] *l : lAV,,~,j=0.5 V *2 : VL,O=-5.0 V, V5=-28.0 V. V,H=‘?SS, VIL=VDD, TEST,=TEST2=VDD *3 : Vs.=-28.0 V, fxcK=6.15 MHz, No-load The input data is turned over by data taking clock(4-bit parallel *4 : V5=-28.0 V, fxcK=6.15 MHz, f ~~=19.2 kHz, fFR=80 Hz, No-load The input data is turned over by data taking clock(4-bit parallel 5.0 1.0 1.0 mA mA mA input mode) input mode) SHARP LH1514AF 14 11-2. AC Characteristics (Vss=V,=O v. VIlrJ=- 5.5 to -2.5 V, V5=-28.0 to -10.0 V. Ta=-20 to +85 “c) I Parameter ISymbo l/ Conditionsj Min. 1 TYD. 1 Max. lunid -*. , ns Shift clock period 65 ns Shift clock “H” pulse width LwcKH 65 ns Shift clock =L” pulse width tWCKL ns tn. 50 __I Data setup time 40 ns Data hold time tDH 65 ns Latch pulse “H” pulse width tWLPH 0 ns Shift clock rise to Latch pulse rise time tLo llS 65 Shift clock fall to Latch pulse fall tim f tnL -65 ns Latch pulse rise to Shift clock ri se time tLS T.atrh nlrlse fall to 65 ns ----__ r-------- Shift clock fa 11 time tLH 145 ns Enable setup time ts DT’D” .,,,,n “L” pulse width tWDL ii t rem JISPOFF removal time Input signal rise time tr Note Input signal fall time tr Output delay time (1) XCK to EIO,,EI02 to C:L=15 pF Outnut delay time (2) FR to Y,-Yao tpdt Cutput delay time (3) LP to Y1-Yso tpdz Output delay time (4) DISPOFF to Y,-Yso tpda 1.2 1 ps. )/2 is maximum in the cas e of high speed operation. [Note] (tCK-tWCKH-tWCKL Timing 11-3. Input Timing Diagrams Characteristics tWLPH k >I I 1 LP I I tLD \ / fSL < tLS < \ / ,, ,tL \ tWCKH Y XCK c ,I p < DIo-DI, tr I tr twc K \/ \ t DS ,/ ,, toil SHARP LH1514AF Input/Output Timing Characteristics DISPOFF Lp A-. _... r\* (*:> ..._.. EO Outnut .-... ‘jlT-\ (*) n : d-bit &bit Timing Characteristics parallel parallel mode 20 mode 10 1 LP FR -‘tpdl -tpd2 -bd2 -tsdl L 7 Y1-Ye0 VS VS Output DISPOFF Timing Characteristics 2 1 ‘ , uI SHL .YODE ‘* (n-4)R< r-H--+ ‘1 1 1 1 1 1 1 1 FR CK- b i3 u COM, LH1513Ax2 -r------+ ; : 1 640x200DOTMATRIX LCDPANEL > ::qgg--0 VeEZ-----l (Case of l/n bias) YD FB LP om 2 XCK =: 0 =: 2 I XDo-XD? 1 , ___ I I LH1514AFx8 - SHARP 13. Example LH1514AF of Typical Characteristic Parameter Typical Fundamental Rating Propagation Delay Time . Ta=+25 Conditions “c, VSS=O V, ‘IDo=-5.0 Him. V TYP. 50 Max. Unit ns SHARP 14. PACKAGE AND PACKING LH IS I-lAF SPECIFICATION 1. Package Outline Specification Refer to drawing No. SPN2 17 I-00 2. Markings The meanings of the device code printed (1) Date code 18 1 on each tape carrier package are as follows. (example) : ----I i 7 0 a) b) c) a) denotes the last figure of Anno Domini (of production) b) denotes the week (of production) c) denotes the number of times of ;tlteration 3. Packing Specifications 1) Packing Materials Item Reel Material Anti-static treated plastic (40Smm dia.) Anti-static treated PET (188 f( nit) Separator Laminated Adhesive aluminium tape paper bag (520 X 600mm) Carton Label Cardboard(420x420xSOmm) Papet Desiccant Silica gel Purpose Packing of tape carrier package. Protects device and prevents ESD (Electra Static Discharge) Keeping dry. Fixing of tape carrier package and soarator. Contains a reel. Indicates production name, lot.No.. and auantitv. Drying of device (2) Packing Form + Specification of label a) Tape carrier package(TCP)is wound on a reel with separators I and 2 and the ends of them are fixed with adhesive tape. b) A label indicating production name. lot no. TYPE PRODUCTION NAME and quantity is stuck on one side of the reel. LOT NO. c) The reel and silica gel is put in a laminated aluminium bag. Nitrogen gas is enclosed in QUANTITY QUANTITY the bag and the bag is sealed. The same label(b) is affixed to the bag. The bag is put LGT(DATE) SHIPPING DATE in a carton and the same label(b) is affixed to one side of the carton. 4. Miscellaneous (1) The length of the tape carrier is 34 L 46 meters maximum per reel, and depends on shipping quantity. (2) Before unpacking, Also, the operater (3) The device, atomosphere ISSUE DATE ISSUE NUMBER S/C NUMBER prepare a work bench equipped with anti-static shoud ware anti-static wrist bands. once unpacked. should be stored in a nitrogen and used within I \\,eek. AUG.24.199-l APROVE CHECK DESIGN devices. gas, room (NOTE) H6805 . temperature ’ LH1514AF 19 NOTES:l.REEL treated anti-static h 23.05 -z 22. 65(E. c kO.05 3 1 1 L. 1 ZB 20.OlCSR) 19.7 0. 6 *o. 0 0. 4 3. Plastic WINDING o*ttern I surface g” .p 02 06 +’ fl *a -‘\\ ‘,d . 20.05 l *!J.lr*tor 0 I 11 TillI’ I’ ,F I’ OOMAX I’ -_- A’ . ,’ 0.75MAX I= -----. I--- good 19.7 kO.05 (PI) device hole 2. RESIN AREA OF FRONT AND BACK SURFACE IS 18. 5X3. Smm(MAX). 3. E. L. MEANS ASSUMED EXCISING LINE. 4.SL MEANS DIMENSION OF PUNCHING HOLE AND ITS TOLERANCE IS fO.05mm. 5.SR MEANS DIMENSlON OF SOLDER RESIST AND ITS TOLERANCE IS fO.3mm.