SCBS054A − AUGUST 1990 − REVISED NOVEMBER 1993
•
•
•
•
•
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DW OR NT PACKAGE
(TOP VIEW)
State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data
Inverting Data Paths
Power-Up High-Impedance Mode
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (NT)
CLKAB
SAB
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
GND
description
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
VCC
CLKBA
SBA
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
This SN74BCT651 consists of bus transceiver
11
14
circuits, D-type flip-flops, and control circuitry
12
13
arranged for multiplexed transmission of data
directly from the data bus or from the internal
storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions.
The select-control (SAB and SBA) inputs are provided to select whether real-time or stored data is transferred.
A low input level selects real-time data, and a high input level selects stored data. Figure 1 illustrates the four
fundamental bus-management functions that can be performed with the SN74BCT651.
Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the
appropriate clock (CLKAB or CLKBA) inputs regardless of the select- or enable-control pins. When SAB and
SBA are in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops
by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. Thus, when
all the other data sources to the two sets of bus lines are at high impedance, each set will remain at its last state.
The SN74BCT651 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
DATA I/O
OPERATION OR FUNCTION
OEAB
OEBA
CLKAB
CLKBA
SAB
SBA
A1 THRU A8
B1 THRU B8
L
H
H or L
H or L
X
X
Input
Input
Isolation
L
H
↑
↑
X
X
Input
Input
Store A and B data
X
H
↑
H or L
X
Input
Unspecified†
Store A, hold B
H
H
↑
↑
X
X‡
X
Input
Output
Store A in both registers
L
X
H or L
↑
X
Unspecified†
Input
Hold A, store B
L
L
↑
↑
X
X
X‡
Output
Input
Store B in both registers
L
L
X
X
X
L
Output
Input
Real-time B data to A bus
L
L
X
H or L
X
H
Output
Input
Stored B data to A bus
H
H
X
X
L
X
Input
Output
Real-time A data to B bus
H
H
H or L
X
H
X
Input
Output
Stored A data to B bus
H
L
H or L
H or L
H
H
Output
Output
Stored A data to B bus and
stored B data to A bus
† The data output functions may be enabled or disabled by various signals at the OEAB or OEBA inputs. Data input functions are always enabled,
i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs.
‡ When select control is low, clocks can occur simultaneously so long as allowances are made for propagation delays from A to B (B to A) plus
setup and hold times. When select control is high, clocks must be staggered in order to load both registers.
Copyright 1993, Texas Instruments Incorporated
!"# $ %&'# "$ (&)*%"# +"#',
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#'$#1 "** (""!'#'$,
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2−1
3
21
1
23
2
22
3
21
1
23
2
22
OEAB
OEAB
CLKAB
CLKBA
SAB
SBA
OEAB
OEAB
CLKAB
CLKBA
SAB
SBA
L
L
X
X
X
L
H
H
X
X
L
X
REAL-TIME TRANSFER BUS A TO BUS B
BUS B
BUS A
BUS B
BUS A
REAL-TIME TRANSFER BUS B TO BUS A
3
21
1
23
2
22
21
3
1
23
2
22
OEAB
OEAB
CLKAB
CLKBA
SAB
SBA
OEAB
OEAB
CLKAB
CLKBA
SAB
SBA
X
H
↑
X
X
X
H
L
H or L
H or L
H
H
L
X
X
↑
X
X
L
H
↑
↑
X
X
STORAGE FROM A,B, OR A AND B
TRANSFER STORED DATA TO A AND/OR B
Figure 1. Bus-Management Functions
2−2
BUS B
BUS A
BUS B
BUS A
SCBS054A − AUGUST 1990 − REVISED NOVEMBER 1993
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SCBS054A − AUGUST 1990 − REVISED NOVEMBER 1993
logic symbol†
OEBA 21
3
OEAB
23
CLKBA
22
SBA
1
CLKAB
2
SAB
A1
4
EN1 [BA]
EN2 [AB]
C4
G5
C6
G7
≥1
1
6D
A2
A3
A4
A5
A6
20
B1
5 1
7
1
4D
5
≥1
7
2
5
19
6
18
7
17
8
16
9
15
14
A7 10
11
A8
13
B2
B3
B4
B5
B6
B7
B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
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•
2−3
SCBS054A − AUGUST 1990 − REVISED NOVEMBER 1993
logic diagram
OEBA
OEAB
CLKBA
SBA
CLKAB
SAB
21
3
23
22
1
2
One of Eight
Channels
A1
1D
C1
20
4
B1
1D
C1
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to 7 V
Input voltage range: Control inputs (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to 7 V
I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to 5.5 V
Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . − 0.5 V to 5.5 V
Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to VCC
Current into any output in the low state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2−4
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•
SCBS054A − AUGUST 1990 − REVISED NOVEMBER 1993
recommended operating conditions
MIN
NOM
MAX
4.5
5
5.5
UNIT
VCC
VIH
Supply voltage
VIL
IIK
Low-level input voltage
0.8
V
Input clamp current
−18
mA
IOH
IOL
High-level output current
−15
mA
64
mA
TA
Operating free-air temperature
70
°C
High-level input voltage
2
V
V
Low-level output current
0
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
TEST CONDITIONS
VCC = 4.5 V,
II = −18 mA
IOH = − 3 mA
VCC = 4.5 V
VOH
IOH = −15 mA
IOH = −3 mA
VCC = 4.75 V,
VCC = 4.5 V,
VOL
MIN
TYP†
2.4
3.3
2
3.1
IOL = 64 mA
IIH‡
IIL‡
IOS§
ICCL
ICCH
ICCZ
VI = 5.5 V
0.42
VCC = 5.5 V,
VI = 2.7 V
Control inputs
VCC = 5.5 V,
VI = 0.5 V
A or B port
VCC = 5.5 V,
VCC = 5.5 V,
VO = 0
VI = GND
VCC = 5.5 V,
VCC = 5.5 V,
VI = 4.5 V
VI = GND
A or B port
0.55
70
20
A or B port
A or B port
V
1
A or B port
Control inputs
V
V
1
VCC = 5.5 V,
Control inputs
UNIT
−1.2
2.7
A or B port
II
MAX
mA
A
µA
−0.7
−0.7
−100
Ci
Control inputs
VCC = 5 V,
VI = 2.5 V or 0.5 V
Cio
A or B port
VCC = 5 V,
VO = 2.5 V or 0.5 V
† All typical values are at VCC = 5 V, TA = 25°C.
‡ For I/O ports, the parameters IIH and IIL include the off-state output current.
§ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
mA
−225
mA
39
62
mA
8
13
mA
10
16
mA
5.5
pF
11
pF
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
VCC = 5 V,
TA = 25°C
fclock
Clock frequency
CLK high
MIN
MAX
0
85
MIN
MAX
UNIT
0
85
MHz
4.8
4.8
7
7
tw
Pulse duration
tsu
th
Setup time, A or B before CLK↑
6
6
ns
Hold time, A or B after CLK↑
1
1
ns
CLK low
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ns
2−5
SCBS054A − AUGUST 1990 − REVISED NOVEMBER 1993
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Note 2)
PARAMETER
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPZH
tPZL
tPHZ
FROM
(INPUT)
TO
(OUTPUT)
VCC = 5 V,
TA = 25°C
MIN
TYP
MIN
85
CLKBA or CLKAB
A or B
A or B
B or A
SAB or SBA†
(with A or B high)
A or B
SBA or SAB†
(with A or B low)
A or B
OEBA or OEAB
A or B
OEBA or OEAB
A or B
DIR
A or B
85
7
10
3.2
11.7
3.9
7.3
10.2
3.9
11.8
3.2
7.3
10.4
3.2
12.6
2.7
5.9
8.5
2.7
9.8
2.8
6
8.6
2.8
9.8
4.8
9.4
12.8
4.8
15.5
3.9
8.6
12.1
3.9
14.6
4.4
8.1
11.1
4.4
12.8
3.3
7.1
9.8
3.3
12
3.8
7.8
10.8
3.8
13.1
3.6
6.6
9
3.6
10.2
2.8
5.8
8.4
2.8
9.6
2.2
5.1
7.3
2.2
8.3
2.8
5.9
8.5
2.8
9.7
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UNIT
MHz
3.2
4.2
8
12.8
4.2
DIR
A or B
tPLZ
3.8
7.4
10.2
3.8
† These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
NOTE 2: Load circuits and voltage waveforms are shown in Section 1.
2−6
MAX
MAX
15
12.3
ns
ns
ns
ns
ns
ns
ns
ns
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
SN74BCT651DW
OBSOLETE
SOIC
DW
24
TBD
Call TI
Call TI
SN74BCT651DWR
OBSOLETE
SOIC
DW
24
TBD
Call TI
Call TI
SN74BCT651NT
OBSOLETE
PDIP
NT
24
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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