TI TLV3492AMDREP

TLV3491A-EP, TLV3492A-EP, TLV3494A-EP
www.ti.com
SGDS035 – DECEMBER 2007
1.8 V, NANOPOWER,
PUSH/PULL OUTPUT COMPARATORS
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
1
Very Low Supply Current: 0.8 µA (Typical)
Input Common Mode Range 200 mV Beyond
Supply Rails
Supply Voltage: 1.8 V to 5.5 V
High Speed: 6 µs
Push/Pull CMOS Output Stage
Controlled Baseline
– One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of –55°C
to 125°C
Enhanced Diminishing Manufacturing Sources
(DMS) Support
Enhanced Product Change Notification
Qualification Pedigree
•
•
•
•
•
•
•
•
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification testing
should not be viewed as justifying use of this component beyond
specified performance and environmental limits.
Portable Medical Equipment
Wireless Security Systems
Remote Control Systems
Handheld Instruments
Ultra-Low Power Systems
DESCRIPTION/ORDERING INFORMATION
The TLV349x family of push/pull output comparators
features a fast 6µs response time and <1.2 µA (max)
nanopower capability, allowing operation from 1.8 V
to 5.5 V. Input common-mode range beyond supply
rails make the TLV349x an ideal choice for
low-voltage applications.
The TLV349x is excellent for
low-voltage (2-cell) applications.
power-sensitive,
TLV349x RELATED PRODUCTS
PRODUCT
FEATURES
TLV370x
550 nA, 2.5 V to 16 V, Push-Pull CMOS
Output Stage Comparator
TLV340x
550 nA, 2.5 V to 16 V, Open-Drain Output
Stage Comparator
ORDERING INFORMATION (1)
PRODUCT
PACKAGELEAD
PACKAGE
DESIGNATOR (2)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
TLV3491
SO-8
D
–55°C to 125°C
3491EP
TLV3491AMDREP (3)
Tape and Reel, 2500
TLV3492
SO-8
D
–55°C to 125°C
3492EP
TLV3492AMDREP
Tape and Reel, 2500
TLV3494
SO-14
D
–55°C to 125°C
3494EP
TLV3494AMDREP (3)
Tape and Reel, 2500
(1)
(2)
(3)
ORDERABLE
PART NUMBER
TRANSPORT MEDIA,
QUANTITY
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
Prouct Preview. Contact your Texas Instruments Sales Representative for availability.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
TLV3491A-EP, TLV3492A-EP, TLV3494A-EP
www.ti.com
SGDS035 – DECEMBER 2007
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage
Signal Input Terminals
VALUE
UNIT
5.5
V
Voltage (2)
(V–) – 0.5 to (V+) + 0.5
V
Current (2)
±10
mA
Output Short-Circuit (3)
Continuous
Operating Temperature
–55 to 125
°C
Storage Temperature
–65 to 150
°C
Junction Temperature
150
°C
Lead Temperature (soldering, 10s)
300
°C
ESD Rating (Human Body Model)
3000
V
(1)
(2)
(3)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
Input terminals are diode clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails should
be current limited to 10 mA or less.
Short-circuit to ground, one amplifier per package.
PIN CONFIGURATIONS
-In A
-In D
-In A
-In
TLV3492
-In B
V-
V-
V-
-In B
2
Submit Documentation Feedback
-In C
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TLV3491A-EP TLV3492A-EP TLV3494A-EP
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www.ti.com
SGDS035 – DECEMBER 2007
ELECTRICAL CHARACTERISTICS
At TA = 25°C, and VS = 1.8 V to 5.5 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
TA (1)
MIN
TYP
MAX
±3
±15
UNIT
OFFSET VOLTAGE
Input Offset Voltage
vs Temperature
vs Power Supply
VOS
VCM = 0V, IO = 0mA
dVOS/dT
TA = –55°C to 125°C
PSRR
VS = 1.8 V to 5.5 V
Input Bias Current
IB
VCM = VCC/2
Input Offset Current
IOS
VCM = VCC/2
25°C
Full Range
±25
µV/°C
±12
25°C
350
Full Range
mV
1000
1600
µV/V
INPUT BIAS CURRENT
25°C
±1
Full Range
±50
±1600
25°C
±1
Full Range
±50
±200
pA
pA
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
VCM
(V–) – 0.2
VCM = –0.2 V to (V+) – 1.5 V
Common-Mode Rejection Ratio
CMRR
VCM = –0.2 V to (V+) + 0.2 V
25°C
60
Full Range
55
25°C
54
Full Range
50
(V+) + 0.2
V
74
dB
62
INPUT CAPACITANCE
Common-Mode
2
pF
Differential
4
pF
12
µs
SWITCHING CHARACTERISTICS
Propagation Delay Time,
Low-to-High
t(PLH)
f = 10 kHz,
VSTEP = 1 V
Input Overdrive = 10 mV
6
µs
Input Overdrive = 10 mV
13.5
µs
Input Overdrive = 100 mV
6.5
µs
Input Overdrive = 100 mV
Propagation Delay Time,
High-to-Low
t(PHL)
f = 10 kHz,
VSTEP = 1 V
Rise Time
tR
CL = 10 pF
100
ns
Fall Time
tF
CL = 10 pF
100
ns
Voltage Output High from Rail
VOH
VS = 5 V, IOUT = -5 mA
Full Range
90
300
mV
Voltage Output Low from Rail
VOL
VS = 5 V, IOUT = 5 mA
Full Range
160
300
mV
Short-Circuit Current
ISC
OUTPUT
See Typical Characteristics
POWER SUPPLY
Specified Voltage Range
Quiescent Current (2)
VS
IQ
1.8
Vs = 5.5 V, VO = High
25°C
5.5
0.85
Full Range
1.2
2.1
V
µA
TEMPERATURE RANGE
Specified Range
TA
Storage Range
–55
125
°C
–65
150
°C
Thermal Resistance, θJA
(1)
(2)
SO-8
165
°C/W
SO-14
133
°C/W
Full Range is -55°C to 125°C.
IQ per channel.
Copyright © 2007, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TLV3491A-EP TLV3492A-EP TLV3494A-EP
3
TLV3491A-EP, TLV3492A-EP, TLV3494A-EP
www.ti.com
SGDS035 – DECEMBER 2007
TYPICAL CHARACTERISTICS
At TA = 25°C, VS = 1.8 V to 5.5 V, and Input Overdrive = 100 mV, unless otherwise noted.
QUIESCENT CURRENT vs TEMPERATURE
QUIESCENT CURRENT
vs OUTPUT SWITCHING FREQUENCY
1.00
VS = 5 V
10
0.90
VDD = 5 V
0.85
Quiescent Current (µA)
Quiescent Current (µA)
12
VDD = 3 V
0.95
VDD = 1.8 V
0.80
0.75
0.70
0.65
8
6
4
VS = 3 V
2
0.60
–50
0
–25
25
50
75
100
VS = 1.8 V
0
125
1
Temperature ( °C)
10
100
1k
10k
100k
Output Transition Frequency (Hz)
SHORT-CIRCUIT CURRENT vs SUPPLY VOLTAGE
INPUT BIAS CURRENT vs TEMPERATURE
140
45
40
Input Bias Current (pA)
Short-Circuit Current (mA)
120
100
Sink
80
60
Source
40
20
35
30
25
20
15
10
5
0
0
–5
1.5
2
2.5
3
3.5
4
4.5
5
5.5
–50
0
–25
Supply Voltage (V)
25
50
75
100
125
Temperature ( °C)
OUTPUT LOW vs OUTPUT CURRENT
OUTPUT HIGH vs OUTPUT CURRENT
0.25
0.25
VDD = 3 V
0.2
0.2
VDD = 1.8 V
VDD = 3 V
VS Ð VOH (V)
VOL (V)
VDD = 1.8 V
0.15
VDD = 5 V
0.1
0.05
0.1
VDD = 5 V
0.05
0
0
0
2
4
6
8
Output Current (mA)
4
0.15
Submit Documentation Feedback
10
12
0
2
4
6
8
10
12
Output Current (mA)
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TLV3491A-EP TLV3492A-EP TLV3494A-EP
TLV3491A-EP, TLV3492A-EP, TLV3494A-EP
www.ti.com
SGDS035 – DECEMBER 2007
TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = 1.8 V to 5.5 V, and Input Overdrive = 100 mV, unless otherwise noted.
PROPAGATION DELAY (t PLH) vs CAPACITIVE LOAD
80
70
70
60
60
50
50
tPHL (µs)
tPLH (µs)
PROPAGATION DELAY (t PHL) vs CAPACITIVE LOAD
80
VDD = 5 V
40
VDD = 3 V
30
VDD = 1.8 V
20
VDD = 3 V V = 5 V
DD
40
30
20
10
10
0
0.01
0.1
1
10
100
VDD = 1.8 V
0
0.01
1k
0.1
1
Capacitive Load (nF)
PROPAGATION DELAY (t PLH) vs INPUT OVERDRIVE
20
1k
18
16
16
VDD = 5 V
14
tPHL (µs)
14
tPLH (µs)
100
PROPAGATION DELAY (t PHL) vs INPUT OVERDRIVE
20
18
12
VDD = 3 V
10
VDD = 1.8 V
12
VDD = 1.8 V
10
8
8
6
6
4
4
0
10
20
30
40
50
60
70
80
90
100
VDD = 3 V
VDD = 5 V
0
10
20
30
Input Overdrive (mV)
40
50
60
70
80
90
100
Input Overdrive (mV)
PROPAGATION DELAY (t PLH) vs TEMPERATURE
8.0
PROPAGATION DELAY (t PHL) vs TEMPERATURE
8.0
7.5
7.5
7.0
VDD = 1.8 V
7.0
VDD = 3 V
VDD = 1.8 V
6.5
6.5
VDD = 3 V
tPHL (µs)
tPLH (µs)
10
Capacitive Load (nF)
6.0
5.5
6.0
5.5
VDD = 5 V
5.0
5.0
VDD = 5 V
4.5
4.5
4.0
4.0
–50
–25
0
25
50
Temperature ( °C)
Copyright © 2007, Texas Instruments Incorporated
75
100
125
–50
–25
0
25
50
75
100
125
Temperature (° C)
Submit Documentation Feedback
Product Folder Link(s): TLV3491A-EP TLV3492A-EP TLV3494A-EP
5
TLV3491A-EP, TLV3492A-EP, TLV3494A-EP
www.ti.com
SGDS035 – DECEMBER 2007
TYPICAL CHARACTERISTICS (continued)
At TA = 25°C, VS = 1.8 V to 5.5 V, and Input Overdrive = 100 mV, unless otherwise noted.
PROPAGATION DELAY (t PHL)
VDD = ±2.5 V
VIN–
VDD = ±2.5 V
VIN+
500 mV/div
500 mV/div
PROPAGATION DELAY (t PLH)
VIN–
VIN+
2V/div
VOUT
2 µs/div
2 µs/div
PROPAGATION DELAY (t PLH)
PROPAGATION DELAY (t PHL)
VIN+
VDD = ±0.9 V
500 mV/div
500 mV/div
2V/div
VOUT
VIN–
VDD = ±0.9 V
VIN–
2V/div
2V/div
VIN+
VOUT
2 µs/div
6
Submit Documentation Feedback
VOUT
2 µs/div
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TLV3491A-EP TLV3492A-EP TLV3494A-EP
TLV3491A-EP, TLV3492A-EP, TLV3494A-EP
www.ti.com
SGDS035 – DECEMBER 2007
APPLICATION INFORMATION
The TLV349x family of comparators features rail-to-rail input and output on supply voltages as low as 1.8 V. The
push/pull output stage is optimal for reduced power budget applications and features no shoot-through current.
Low supply voltages, common-mode input range beyond supply rails, and a typical supply current of 0.8 µA
make the TLV349x family an excellent candidate for battery-powered applications with single-cell operation.
BOARD LAYOUT
Figure 1 shows the typical connections for the TLV349x. To minimize supply noise, power supplies should be
capacitively decoupled by a 0.01 µF ceramic capacitor in parallel with a 10 µF electrolytic capacitor. Comparators
are very sensitive to input noise. Proper grounding (use of ground plane) will help maintain specified
performance of the TLV349x family.
V+
0.01 µF
10 µF
VIN
VOUT
TLV3492
VREF
Figure 1. Basic Connections of the TLV3492
SETTING REFERENCE VOLTAGE
It is important to use a stable reference when setting the transition point for the TLV349x. The REF1004 provides
a 1.25-V reference voltage with low drift and only 8 µA of quiescent current.
EXTERNAL HYSTERESIS
Comparator inputs have no noise immunity within the range of specified offset voltage (±15 mV). For noisy input
signals, the comparator output may display multiple switching as input signals move through the switching
threshold. The typical comparator threshold of the TLV349x is ±15 mV. To prevent multiple switching within the
comparator threshold of the TLV349x, external hysteresis may be added by connecting a small amount of
feedback to the positive input. Figure 2 shows a typical topology used to introduce hysteresis, described by the
equation:
VHYST =
V + ´ R1
R1 + R2
VHYST will set the value of the transition voltage required to switch the comparator output by increasing the
threshold region, thereby reducing sensitivity to noise.
V+
VHYST = 0.38 V
5V
VIN
TLV3492
VOUT
R2
560 kΩ
R1
39 kΩ
VREF
Figure 2. Adding Hysteresis to the TLV3492
Copyright © 2007, Texas Instruments Incorporated
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TLV3491A-EP, TLV3492A-EP, TLV3494A-EP
www.ti.com
SGDS035 – DECEMBER 2007
RELAXATION OSCILLATOR
The TLV3492 can be configured as a relaxation oscillator to provide a simple and inexpensive clock output (see
Figure 3). The capacitor is charged at a rate of 0.69 RC. It also discharges at a rate of 0.69 RC. Therefore, the
period is 1.38 RC. R1 may be a different value than R2.
VC
2/3 (V+)
1/3 (V+)
t
V+ T1 T2
V+
C
1000 pF
R1
1 MΩ
VOUT
R2
1 MΩ
R2
1 MΩ
t
F = 724 Hz
V+
R2
1 MΩ
Figure 3. TLV3492 Configured as a Relaxation Oscillator
POWER-ON RESET
The reset circuit shown in Figure 4 provides a time delayed release of reset to the MSP430 microcontroller.
Operation of the circuit is based on a stabilization time constant of the supply voltage, rather than on a
predetermined voltage value. The negative input is a reference voltage created by a simple resistor divider.
These resistor values should be relatively high to reduce the current consumption of the circuit. The positive input
is an RC circuit that provides a power-up delay. When power is applied, the output of the comparator is low,
holding the processor in the reset condition. Only after allowing time for the supply voltage to stabilize does the
positive input of the comparator become higher than the negative input, resulting in a high output state and
releasing the processor for operation. The stabilization time required for the supply voltage is adjustable by the
selection of the RC component values. Use of a lower-valued resistor in this portion of the circuit will not increase
current consumption because no current flows through the RC circuit after the supply has stabilized. The reset
delay time needed depends on the power-up characteristics of the system power supply. R1 and C1 are selected
to allow enough time for the power supply to stabilize. D1 provides rapid reset if power is lost. In this example,
the R1 • C1 time constant is 10 ms.
V+
R1
1 MΩ
C1
10 nF
MSP430
R2
2 MΩ
TLV3492
RESET
R3
2 MΩ
Figure 4. The TLV349x Configured as a Reset Circuit for the MSP430.
8
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Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): TLV3491A-EP TLV3492A-EP TLV3494A-EP
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jan-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TLV3492AMDREP
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
V62/07635-01XE
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Aug-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TLV3492AMDREP
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
6.4
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
22-Aug-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TLV3492AMDREP
SOIC
D
8
2500
340.5
338.1
20.6
Pack Materials-Page 2
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