UNISONIC TECHNOLOGIES CO., LTD 4052 CMOS IC DIFFERENTIAL 4-CHANNEL ANALOG MULTIPLEXERS/ DEMULTIPLEXERS DESCRIPTION The UTC 4052 is differential 4-channel analog multiplexers/ demultiplexers for application as digitally–controlled analog switches. The device has two binary control inputs and an inhibit input. It feature low ON impedance and very low OFF leakage current. Control of analog signals up to the complete supply voltage range can be achieved. FEATURES * Wide Analog Voltage Range: VDD–VEE = 3V~18V. (Note: VEE must be≦VSS) * Break-Before-Make Switching Eliminates Channel Overlap. * Linearized Transfer Characteristics * Implement an DP4T Switch Effectively. * Pin to Pin Replacement for CD4052 ORDERING INFORMATION Normal 4052-D16-T 4052-P16-R 4052-S16-T 4052-S16-R Ordering Number Lead Free Plating 4052L-D16-T 4052L-P16-R 4052L-S16-T 4052L-S16-R Halogen Free 4052G-D16-T 4052G-P16-R 4052G-S16-T 4052G-S16-R www.unisonic.com.tw Copyright © 2010 Unisonic Technologies Co., LTD Package Packing DIP-16 TSSOP-16 SOP-16 SOP-16 Tube Tape Reel Tube Tape Reel 1 of 6 QW-R502-013.D 4052 CMOS IC PIN CONFIGURATION PIN DESCRIPTION PIN No. SYMBAL NAME AND FUNCTION 13, 3 X,Y Commons Input/Output 6 INH Inhibit Input 7 VEE Supply Voltage 8 VSS Ground 10,9 A,B Binary Control Inputs 12,14,15,11 X0~X3 X Channel Inputs/Outputs 1,5,2,4 Y0~Y3 Y Channel Inputs/Outputs 16 VDD Positive Supply Voltage Note: Control Inputs referenced to VSS. Analog Inputs and Outputs reference to VEE. VEE must be ＜VSS. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 6 QW-R502-013.D 4052 CMOS IC ABSOLUTE MAXIMUM RATING PARAMETER DC Supply Voltage (Referenced to VEE, VSS≧VEE) SYMBOL VDD RATINGS -0.5 ~ +18 UNIT V Input or Output Voltage (DC or Transient) VIN, VOUT -0.5 ~ VDD +0.5 V (Referenced to VSS for Control Inputs and VEE for Switch I/O) Input Current (DC or Transient), per Control Pin IIN ±10 mA Switch Through Current ISW ±25 mA Power Dissipation 700 mW PD Derating above 65°C 7 mW/°C Junction Temperature TJ 125 °C Operating Temperature Range TOPR -40 ~ +125 °C Storage Temperature Range TSTG -40 ~ +150 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. ELECTRICAL CHARACTERISTICS (Ta=25°C, unless otherwise specified.) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT SUPPLY REQUIREMENTS (Voltages Referenced to VEE) VDD – 3≧VSS≧VEE 3 18 V Power Supply Voltage Range VDD VDD=5V 0.005 5 µA Control Inputs: VIN = VSS or VDD Quiescent Current per Switch I/O: VEE ≦VI/O ≦VDD, and IQ VDD=10V 0.010 10 µA Package ΔVsw≦500mV(Note 2) VDD=15V 0.015 20 µA VDD=5V (0.07 µA/kHz) f + IQ µA Ta=25°C only (The channel Total Supply Current (Dynamic Plus Quiescent, ID(AV) component, (VIN-VOUT)/RON, is VDD=10V (0.20 µA/kHz) f + IQ µA excluded.) Per Package) (0.36 µA/kHz) f + IQ VDD=15V µA SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y, Z (Voltages Referenced to VEE) Recommended Peak to Peak Voltage VI/O Channel On or Off 0 VDD VPP Into or Out of the Switch Recommended Static or Dynamic ΔVsw Channel On 0 600 mV Voltage Across the Switch (Note2) Output Offset Voltage VO(OFF) VIN = 0V, No Load 10 µV ΔVsw≦500mV (Note2) VDD=5V 250 1050 Ω ON Resistance VIN = VIL or VIH (Control), and RON VDD=10V 120 500 Ω VIN = 0 to VDD (Switch) VDD=15V 80 280 Ω ΔON Resistance Between VDD=5V 25 70 Ω Any Two Channels in the VDD=10V ΔRON 10 50 Ω Same Package 10 45 Ω VDD=15V VIN = VIL or VIH (Control) Channel to ±0.05 ±100 nA Channel or Any One Channel, Off Channel Leakage Current IOFF VDD=15V Capacitance, Switch I/O CI/O Inhibit = VDD 10 pF Capacitance, Common O/I CO/I Inhibit = VDD 17 pF Pins Not Adjacent 0.15 Capacitance, Feedthrough pF CI/O Pins Adjacent 0.47 (Channel Off) CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to VSS) VDD=5V 2.25 1.5 V VIL Low Level Input Voltage RON= per spec, IOFF = per spec VDD=10V 4.50 3.0 V VDD=15V 6.75 4.0 V VDD=5V 3.5 2.75 V VIH High Level Input Voltage RON= per spec, IOFF = per spec VDD=10V 7.0 5.50 V VDD=15V 11 8.25 V Input Leakage Current ILEAK VIN= 0 or VDD, VDD=15V ±0.00001 ±0.1 µA Input Capacitance CIN 5.0 7.5 pF UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 6 QW-R502-013.D 4052 CMOS IC DYNAMIC ELECTRICAL CHARACTERISTICS (CL = 50pF, Ta=25°C, VEE≦VSS, unless otherwise specified) PARAMETER SYMBOL Propagation Delay Times Switch Input to Switch Output (RL = 10 kΩ) tPLH, tPHL Inhibit to Output tPHZ, tPLZ tPZH, tPZL Control Input to Output tPLH, tPHL Total Harmonic Distortion THD VDD–VEE TEST CONDITIONS Vdc tPLH, tPHL =(0.17 ns/pF)CL + 21.5ns 5 tPLH, tPHL =(0.08 ns/pF)CL + 8.0ns 10 15 tPLH, tPHL =(0.06 ns/pF)CL + 7.0ns 5 10 15 5 10 15 10 (RL=10kΩ, VEE=VSS) Output “1” or “0” to High Impedance, or High Impedance to “1” or “0” Level RL = 10 kΩ, VEE = VSS MIN TYP MAX UNIT 30 12 10 300 155 125 75 30 25 600 310 250 ns ns ns ns ns ns 325 130 90 0.07 650 260 180 ns ns ns % RL = 10KΩ, f = 1 kHz, VIN = 5 VPP RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p, Bandwidth BW 10 17 MHz CL = 50pF, 20 Log (VOUT/VIN) = -3dB) RL=1KΩ, VIN = 1/2 (VDD–VEE) p–p Off Channel Feedthrough 10 -50 dB Attenuation fIN = 30MHz RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p Channel Separation 10 -50 dB fIN = 3MHz Crosstalk, Control Input to R1 = 1kΩ, RL = 10kΩ Control 10 75 mV Common O/I tTLH = tTHL = 20ns, Inhibit = VSS Note: 1. Data of “TYP” is intended as an indication of the IC’s potential performance. 2. For voltage drops across the switch(ΔVsw)>600mV (>300mV at high temperature), excessive VDD current may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 6 QW-R502-013.D 4052 CMOS IC TEST CIRCUIT VDD VDD VDD IN/OUT OUT/IN VEE VDD LEVEL CONVERTED CONTROL OUT/IN IN/OUT CONTROL VEE Switch Circuit Schematic TRUTH TABLE 16 TRUTH TABLE Control Inputs Select Inhibit 0 0 0 0 1 B 0 0 1 1 X A 0 1 0 1 X INH A B 6 10 9 X0 12 X1 14 X2 15 X3 11 Y0 1 Y1 5 Y2 2 Y3 4 ON Switches X0 Y0 X1 Y1 X2 Y2 X3 Y3 None VDD LEVEL CONVERTER 8 Vss 7 BINARY TO 1-OF-4 DECODER WITH INHIBIT VEE 13 X * X=Don't Care 3 Y UTC 4052 Functional Diagram UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 6 QW-R502-013.D 4052 CMOS IC TYPICAL CHARACTERISTICS "ON" Resistance, RON(Ω) "ON" Resistance, RON(Ω) "ON" Resistance, RON(Ω) "ON" Resistance, RON(Ω) UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 6 QW-R502-013.D