UNISONIC TECHNOLOGIES CO., LTD 4053 CMOS IC TRIPLE 2-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS DESCRIPTION UTC 4053 is triple 2-channel analog multiplexers/demultiplexers for application as digitally–controlled analog switches. The device has three separate digital control inputs and an inhibit input. It feature low ON impedance and very low OFF leakage current. Control of analog signals up to the complete supply voltage range can be achieved. FEATURES * Wide Analog Voltage Range: VDD-VEE = 3V~18V. (Note: VEE must be≦VSS) * Break-Before-Make Switching Eliminates Channel Overlap. * Linearized Transfer Characteristics * Implement an SPDT Switch Effectively. * Pin to Pin Replacement for CD4053 ORDERING INFORMATION Ordering Number Lead Free 4053L-D16-T 4053L-P16-R 4053L-P16-T 4053L-S16-R 4053L-S16-T Halogen Free 4053G-D16-T 4053G-P16-R 4053G-P16-T 4053G-S16-R 4053G-S16-T www.unisonic.com.tw Copyright © 2012 Unisonic Technologies Co., LTD Package Packing DIP-16 TSSOP-16 TSSOP-16 SOP-16 SOP-16 Tube Tape Reel Tube Tape Reel Tube 1 of 7 QW-R502-036.D 4053 CMOS IC PIN CONFIGURATION Y1 1 16 Y0 2 15 Y Z1 3 14 X 13 X1 12 X0 Z 4 Z0 5 UTC 4053 INH 6 VDD 11 A VEE 7 10 B VSS 8 9 C PIN DESCRIPTION PIN No. 14,15,4 6 7 8 11,10,9 12,13 2,1 5,3 16 SYMBAL X,Y,Z INH VEE VSS A,B,C X0,X1 Y0,Y1 Z0,Z1 VDD NAME AND FUNCTION Commons Input/Output Inhibit Input Supply Voltage Ground Digital Control Inputs A-X Switches Inputs/Outputs B-Y Switches Inputs/Outputs C-Z Switches Inputs/Outputs Positive Supply Voltage UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 7 QW-R502-036.D 4053 CMOS IC ABSOLUTE MAXIMUM RATING PARAMETER SYMBOL RATINGS UNIT DC Supply Voltage (Referenced to VEE, VSS≧VEE) VDD -0.5 ~ +18 V Input or Output Voltage (DC or Transient) VIN, VOUT -0.5 ~ VDD +0.5 V (Referenced to VSS for Control Inputs and VEE for Switch I/O) Input Current (DC or Transient), per Control Pin IIN ±10 mA Switch Through Current ISW ±25 mA Power Dissipation 500 mW PD Derating above 65°C 7 mW/°C Junction Temperature TJ 125 °C Operating Temperature TOPR -40 ~ +125 °C Storage Temperature TSTG -40 ~ +150 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. ELECTRICAL CHARACTERISTICS (TA=25°C, unless otherwise specified.) PARAMETER SYMBOL TEST CONDITIONS SUPPLY REQUIREMENTS (Voltages Referenced to VEE) VDD – 3≧VSS≧VEE Power Supply Voltage Range VDD VDD=5V Control Inputs: VIN = VSS or VDD Quiescent Current per Switch I/O: VEE ≦VI/O ≦VDD, VDD=10V IQ Package ΔVSW≦500mV (Note 2) VDD=15V MIN MAX UNIT 18 0.005 5 0.010 10 0.015 20 VDD=5V (0.07 µA/kHz) f + IQ Total Supply Current TA=25°C only (The channel (Dynamic Plus Quiescent, VDD=10V (0.20 µA/kHz) f + IQ ID(AV) component, (VIN-VOUT)/RON, is Per Package) excluded) VDD=15V (0.36 µA/kHz) f + IQ SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y, Z (Voltages Referenced to VEE) Recommended Peak–to–Peak Voltage VI/O Channel On or Off 0 VDD Into or Out of the Switch Recommended Static or Dynamic ΔVSW Channel On 0 600 Voltage Across the Switch (Note2) Output Offset Voltage VO(OFF) VIN = 0V, No Load 10 ΔVSW≦500mV VDD=5V 250 1050 ON Resistance VDD=10V 120 500 RON VIN = VIL or VIH (Control), and VIN = 0 to VDD (Switch) VDD=15V 80 280 ΔON Resistance Between VDD=5V 25 70 VDD=10V 10 50 ΔRON Any Two Channels in the Same Package VDD=15V 10 45 VIN = VIL or VIH (Control) Channel to Channel or Any One Off–Channel Leakage Current IOFF ±0.05 ±100 Channel, VDD=15V Capacitance, Switch I/O CI/O Inhibit = VDD 10 Capacitance, Common O/I CO/I Inhibit = VDD 17 Pins Not Adjacent 0.15 Capacitance, Feedthrough CI/O (Channel Off) Pins Adjacent 0.47 CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to VSS) VDD=5V 2.25 1.5 Low Level Input Voltage VDD=10V RON= per spec, IOFF = per spec 4.50 3.0 VIL VDD=15V 6.75 4.0 VDD=5V 3.5 2.75 High Level Input Voltage VDD=10V RON= per spec, IOFF = per spec 7.0 5.50 VIH VDD=15V 11 8.25 Input Leakage Current ILEAK VIN= 0 or VDD, VDD=15V ±0.00001 ±0.1 Input Capacitance CIN 5.0 7.5 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 TYP V µA µA µA µA µA µA VPP mV µV Ω Ω Ω Ω Ω Ω nA pF pF pF Pf V V V V V V µA pF 3 of 7 QW-R502-036.D 4053 CMOS IC DYNAMIC ELECTRICAL CHARACTERISTICS (CL = 50pF, TA=25°C, VEE≦VSS, unless otherwise specified) PARAMETER SYMBOL Propagation Delay Times Switch Input to Switch Output (RL = 10 kΩ) tPLH, tPHL Inhibit to Output tPHZ, tPLZ tPZH, tPZL Control Input to Output tPLH, tPHL Total Harmonic Distortion THD VDD-VEE VDC 5 10 15 5 10 15 5 10 15 10 TEST CONDITIONS tPLH, tPHL =(0.17 ns/pF)CL + 16.5ns tPLH, tPHL =(0.08 ns/pF)CL + 4.0ns tPLH, tPHL =(0.06 ns/pF)CL + 3.0ns (RL=10kΩ, VEE=VSS), Output “1” or “0” to High Impedance, or High Impedance to “1” or “0” Level RL = 10kΩ, VEE = VSS MIN TYP MAX UNIT 25 8.0 6.0 275 140 110 300 120 80 0.07 65 20 15 550 280 220 600 240 160 ns ns ns ns ns ns ns ns ns % RL = 10KΩ, f = 1 kHz, VIN = 5 VPP RL=1kΩ, VIN= 1/2(VDD-VEE) p-p, 17 MHz Bandwidth BW 10 CL =50pF, 20 Log (VOUT/VIN)= -3dB) RL=1KΩ, VIN = 1/2(VDD-VEE) p-p Off Channel Feedthrough 10 -50 dB Attenuation fIN = 55MHz RL = 1kΩ, VIN = 1/2 VDD-VEE)p-p -50 dB Channel Separation 10 fIN = 3MHz R1 = 1kΩ, RL = 10kΩ Control Crosstalk, Control Input to 10 75 mV Common O/I tTLH = tTHL = 20ns, Inhibit = VSS Note: 1. Data of “TYP” is intended as an indication of the IC’s potential performance. 2. For voltage drops across the switch(ΔVSW)>600mV (>300mV at high temperature), excessive VDD current may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 7 QW-R502-036.D 4053 CMOS IC TEST CIRCUIT VDD VDD VDD IN/OUT OUT/IN VEE VDD LEVEL CONVERTED CONTROL OUT/IN IN/OUT CONTROL VEE Switch Circuit Schematic TRUTH TABLE 16 Control Inputs Select INHIBIT C B A ON Switches UTC 4053 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 Z0 Z0 Z0 Z0 Y0 Y0 Y1 Y1 X0 X1 X0 X1 0 0 0 0 1 1 1 1 0 0 1 1 0 1 0 1 Z1 Z1 Z1 Z1 Y0 Y0 Y1 Y1 X0 X1 X0 X1 1 x x = Don’t Care x x None INH 6 A 11 B 10 C 9 VDD BINARY TO 1 - OF - 2 DECODER WITH INHIBIT LEVEL CONVERTER 8 VSS 7 VEE X0 12 14 X X1 13 Y0 2 Y1 1 Z0 5 Z1 3 15 Y 4 Z UTC 4053 Functional Diagram UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 7 QW-R502-036.D 4053 "ON" Resistance, RON (Ω) TYPICAL CHARACTERISTICS "ON" Resistance, RON (Ω) CMOS IC "ON" Resistance, RON (Ω) 350 VDD = 2.5 V 300 VEE = - 2.5 V Ta =25°C 250 200 150 100 50 0 -10 -8.0 -6.0 -4.0 -2.0 0 2.0 4.0 6.0 8.0 10 Input Voltage , VIN (V) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 7 QW-R502-036.D 4053 CMOS IC UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 7 QW-R502-036.D