A1PROS IMP5219CDWT

IMP51IMP52
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DATA COMMUNICATIONS
9-Line SCSI Terminator
Key Features
The 9-channel IMP5219 SCSI terminator is part of IMP's family of highperformance SCSI terminators that deliver true UltraSCSI performance.
The BiCMOS design offers superior performance over first generation
linear regulator/resistor based terminators.
IMP's new architecture employs high-speed adaptive elements for each
channel, thereby providing the fastest response possible - typically
35MHz, which is 100 times faster than the older linear regulator terminator approach. The bandwidth of terminators based on the older
regulator/resistor terminator architecture is limited to 500kHz since a
large output stabilization capacitor is required. The IMP architecture
eliminates the external output compensation capacitor and the need
for transient output capacitors while maintaining pin compatibility
with first generation designs. Reduced component count is inherent
with the IMP5219.
The IMP5219 architecture tolerates marginal system designs. A key
improvement offered by the IMP5219 lies in its ability to insure reliable,
error-free communications even in systems which do not adhere to recommended SCSI hardware design guidelines, such as improper cable
lengths and impedance. Frequently, this situation is not controlled by the
peripheral or host designer.
Ultra-Fast response for Fast-20 SCSI applications
Hot swap compatible
35MHz channel bandwidth
3.5V operation
Less than 3pF output capacitance
Sleep-mode current less than 375µA
Thermally self limiting
No external compensation capacitors
Implements 8-bit or 16-bit (wide) applications
Compatible with active negation drivers
(60ma/channel)
◆ Compatible with passive and active terminations
◆ Approved for use with SCSI 1, 2, 3 and UltraSCSI
◆
◆
◆
◆
◆
◆
◆
◆
◆
◆
For portable and configurable peripherals, the IMP5219 can be placed in
a sleep mode with an active LOW disable signal. Quiescent current is
typically 375µA and output are in a high impedance state when disabled.
Block Diagrams
Term Power
Thermal
Limiting
Circuit
Current
Biasing
Circuit
24mA Current
Limiting Circuit
DATA OUTPUT
PIN DB (0)
2.85V
Disable Pin
–
1 of 9 Channels
+
1.4V
5219_01.eps
© 2000 IMP, Inc.
Data Communications
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IMP51IMP52
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Pin Configuration
SOWB-16
TSSOP-20
TERM POWER
1
20 TERM POWER
15 NC
NC
2
19 DISABLE
14 DISABLE
NC
3
18 NC
13 D8
D0
4
17 D8
12 D7
D1
5
11 D6
D2
6
15 NC
D3
7
14 D6
D4
8
13 D5
NC
9
12 NC
TERM POWER
1
16 TERM POWER
NC
2
D0
3
D1
4
D2
5
D3
6
IMP5219
D4
7
10 D5
GND
8
9
DW Package
GND
5219_02.eps
IMP5219
GND 10
16 D7
11 GND
PW Package
5219_02a.eps
Ordering Information
Part Number
Temperature Range
Package
IMP5219CDW
0°C to 125°C
16-pin Plastic SOWB
IMP5219CDWT
0°C to 125°C
Tape and Reel, 16-pin Plastic SOWB
IMP5219CPW
0°C to 125°C
20-pin Plastic TSSOP
IMP5219CPWT
0°C to 125°C
Tape and Reel, 20-pin Plastic TSSOP
5219_t01.at3
Absolute Maximum Ratings1
Continuous Termination Voltage . . . . . . . . . . . 10V
Continuous Output Voltage Range . . . . . . . . 0V to 5.5V
Continuous Disable Voltage Range . . . . . . . . 0V to 5.5V
Operating Junction Temperature . . . . . . . . . . 0°C to 125°C
Storage Temperature Range . . . . . . . . . . . . . . –65°C to 150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . 300°C
Note:
1. Exceeding these ratings could cause damage to the device. All
voltages are with respect to Ground. Currents are positive
into, negative out of the specified terminal.
Thermal Data
DW Package:
Thermal Resistance Junction-to-Ambient, θJA . . . . . . 95°C/W
PW Package:
Thermal Resistance Junction-to-Ambient, θJA . . . . . . 144°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θJA numbers are guidelines for the thermal performance of the
device/pc-board system. All of the ambient airflow is assumed.
2
408-432-9100/www.impweb.com
© 2000 IMP, Inc.
IMP51IMP52
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Recommended Operating Conditions2
Parameter
Symbol
Min
VTERM
High Level Disable Input Voltage
Low Level Disable Input Voltage
Termpwr Voltage
Max
Units
3.5
5.5
V
VIH
2
VTERM
V
VIL
0
0.8
V
0
125
°C
Operating Junction Temperature Range
Note:
Typ
5219_t02.eps
2. Recommended operating conditions indicate the range over which the device is functional.
Electrical Characteristics
Unless otherwise specified, these specifications apply at an ambient operating temperature of TA = 25°C. TermPwr = 4.75V. Low duty cycle
pulse testing techniques are used which maintain junction and case temperatures equal to the ambient temperature.
Parameter
Output High Voltage
TermPwr Supply Current
Symbol Conditions
VOUT
ICC
Min
Typ
2.65
2.85
IOUT
Disable Input Current
IIN
Output Leakage Current
IOL
Capacitance in Disabled Mode
COUT
Channel Bandwidth
BW
Termination Sink Current, per Channel
ISINK
Units
V
All data lines = Open
6
9
mA
All data lines = 0.5V
215
225
mA
µA
–24
mA
Disable < 0.8V
Output Current
Max
VOUT = 0.5V
375
–21
–23
Disable = 4.75V
10
Disable = 0V
–90
nA
µA
Disable = 0.8V, VO = 0.5V
10
nA
VOUT = 0V, Frequency = 1MHz
3
pF
35
MHz
VOUT = 4V
60
mA
5219_t03.eps
© 2000 IMP, Inc.
Data Communications
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Application Information
Figure 1. Receiving Waveform – 20MHz
Figure 2. Driving Waveform – 20MHz
Receiver
Driver
1 Meter, AWG 28
IMP5219
IMP5219
5219_03.eps
Figure 3.
IMP5219 Maximizes Line Current
Disable/Sleep Mode
Cable transmission theory suggests to optimize signal speed and
quality, the termination should act both as an ideal voltage reference when the line is released (deasserted) and as an ideal
current source when the line is active (asserted). Common active
terminators which consist of linear regulators in series with resistors (typically 110Ω) are a compromise. With coventional linear
terminators as the line voltage increases the amount of current
decreases linearly by the equation;
Disable mode places the device in a sleep state, where quiescent
current typically 375µA. When disabled, all outputs are in a high
impedance state and output capacitance is a low 3pF. Sleep mode
can be used for power conservation or to remove the terminator
from the SCSI chain.
An additional feature of the IMP5219 is its compatibility with
active negation drivers.
Table 1. Power Up/ Power Down Function Table
(VREF − VLINE) = I.
R
Disable
Outputs
Quiescent Current
The IMP5219, with its unique new architecture, applies the maximum amount of current regardless of line voltage until the
termination high threshold (2.85V) is reached.
H
Enabled
6mA
L
Disable/High
Impedance
375µA
Acting as a near ideal line terminator, the IMP5219 closely reproduces the optimum case when the device is enabled. To enable the
device the Disable pin must be driven HIGH or left Open. When
enabled, quiescent current is 6mA and the device will respond to
line demands by delivering 24mA on assertion and by imposing
2.85V on de-assertion.
Open
Enabled
6mA
4
408-432-9100/www.impweb.com
5219_t04.eps
© 2000 IMP, Inc.
IMP51IMP52
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Typical Characteristics
Figure 4. Receiving Waveform
Figure 5. Driving Waveform
3.5
3.5
Frequency = 1.00266MHz
3.0
2.5
2.5
Line Voltage (V)
Line Voltage (V)
Frequency = 1.03844MHz
3.0
2.0
1.5
1.0
2.0
1.5
1.0
0.5
0.5
GND
GND
–0.5
–0.5
Time (250ns/Div.)
Time (250ns/Div.)
5219_04.eps
Receiver
Figure 4
5219_05.eps
Driver
Figure 5
6 Meter, 92Ω
IMP5219
IMP5219
75C08
75C08
5219_06.eps
Figure 6. End-Driven Cable
© 2000 IMP, Inc.
Data Communications
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IMP51IMP52
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Typical Characteristics
Figure 7. Receiving Waveform
Figure 8. Driving Waveform
3.5
3.5
Frequency = 4.9961MHz
3.0
2.5
2.5
Line Voltage (V)
Line Voltage (V)
Frequency = 5.0092MHz
3.0
2.0
1.5
1.0
2.0
1.5
1.0
0.5
0.5
GND
GND
–0.5
–0.5
Time (50ns/Div.)
Time (50ns/Div.)
5219_07.eps
Receiver
Figure 7
5219_08.eps
Driver
Figure 8
6 Meter, 92Ω
IMP5219
IMP5219
75C08
75C08
5219_09.eps
Figure 9. End-Driven Cable
Figure 10. 10MHz Waveform
Figure 11. 20MHz Waveform
4
Ch2 Frequency = 10.096MHz
3
3
2
2
#2
1
Line Voltage (V)
Line Voltage (V)
4
#1
0
4
#3
#1
#2
1
0
4
#3
2
2
GND
GND
Time (20ns/Div.)
Ch2 Frequency = 20.020MHz
Time (10ns/Div.)
5219_10.eps
4.75V
5219_11.eps
4.75V
#1
6 Meter, 72Ω
#2
IMP5219
IMP5219
#3
5219_12.eps
Figure 12. End-Driven Cable
6
408-432-9100/www.impweb.com
© 2000 IMP, Inc.
IMP51IMP52
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Typical Characteristics
Figure 13. Output High Voltage vs. Junction Temperature
Figure 14. Output Current vs. Junction Temperature
4.5
30
4.0
25
Output Current (mA)
Output High Voltage (V)
VT = 4.75V
3.5
3.0
2.5
20
15
10
2.0
5
0
25
50
75
100
125
Junction Temperature (°C)
0
25
Figure 15. Output Current vs. Output High Voltage
50
75
100
25
VT = 4.75V
VA = 25°C
VT = 3.3V
VA = 25°C
20
Output Current (mA)
Output Current (mA)
20
15
10
5
15
10
5
0
0
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
Output High Voltage (V)
3.2
0
0.8
5219_15.eps
1.2
1.6
2.0
2.4
2.8
3.2
5219_16.eps
Figure 18. TermPwr Supply Current
vs. Termination Voltage (Disabled)
7
500
450
TermPwr Supply Current (µA)
6
5
4
3
2
1
0
2.5
0.4
Output High Voltage (V)
Figure 17. TermPwr Supply Current
vs. Termination Voltage
TermPwr Supply Current (mA)
5219_14.eps
Figure 16. Output Current vs. Output High Voltage
25
400
350
300
250
200
150
100
50
0
3.0
3.5
4.0
4.5
5.0
Termination Voltage (V)
© 2000 IMP, Inc.
125
Junction Temperature (°C)
5219_13.eps
5.5
6.0
5219_17.eps
0
1
2
3
4
Termination Voltage (V)
Data Communications
5
6
5219_18.eps
7
IMP51IMP52
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Typical Characteristics
Figure 19. Output High Voltage vs. Junction Temperature
Figure 20. Output Current vs. Junction Temperature
4.5
30
VT = 3.3V
4.0
25
Output Current (mA)
Output High Voltage (V)
VT = 3.3V
3.5
3.0
2.5
20
15
10
2.0
5
0
25
50
75
100
Junction Temperature (°C)
125
0
25
5218_19.eps
Figure 21. Output High Voltage vs. Termination Voltage
50
75
100
Junction Temperature (°C)
125
5218_20.eps
Figure 22. Output Current vs. Termination Voltage
25
4.0
Output High Voltage (V)
Output High Voltage (V)
3.5
3.0
2.5
2.0
1.5
1.0
20
15
10
5
0.5
0
3.0
3.5
4.0
4.5
5.0
VTERM Voltage (V)
8
5.5
6.0
5218_21.eps
408-432-9100/www.impweb.com
0
3.0
3.5
4.0
4.5
5.0
VTERM Voltage (V)
5.5
6.0
5218_22.eps
© 2000 IMP, Inc.
IMP51IMP52
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Typical Characteristics
24
23.5
Io (mA)
23
23.5 – 24
23 – 23.5
22.5 – 23
22 – 22.5
21.5 – 22
21 – 21.5
22.5
22
21.5
i8
i6
21
i4
1
2
3
4
5
6
7
Channel
8
9 10 11
12 13 14
15 16 17
18 19 20
i0
Part #
21 22
23 24
25
i2
Figure 23. Output Current Matching Channel to Channel
DB (0)
DB (1)
DB (0)
DB (1)
DB (6)
DB (7)
DB (P)
DB (6)
DB (7)
DB (P)
IMP5219
TERMPWR
ACK
RST
MSG
IMP5219
2.2µF
TERMPWR
VTERM
ATN
BSY
SCSI CABLE
ACK
RST
MSG
IMP5219
DISCONNECT
~ ~
ATN
BSY
~ ~ ~
VTERM
TERMPWR
5V
DISCONNECT
VTERM
IMP5219
TERMPWR
DISCONNECT
TERM POWER
VTERM
~ ~
2.2µF
PERIPHERAL
~ ~ ~
DISCONNECT
HOST
TERM POWER
5V
Note: Add third IMP5219 for 16-bit SCSI
Figure 24. 8-Bit SCSI System Application
© 2000 IMP, Inc.
Data Communications
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IMP51IMP52
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Package Dimensions
SOWB (16-Pin)
Inches
Min
Millimeters
Max
Min
Max
SOWB (16-Pin)
E
H
D
M
A
C
e
L
B
A1
16-Pin (SOWB).eps
A
A1
B
C
D
E
e
H
L
M
*LC
0.093
0.104
0.004
0.012
0.013
0.020
0.009
0.013
0.398
0.413
0.291
0.299
0.05 BSC
0.394
0.419
0.016
0.050
0°
8°
—
0.004
2.35
2.65
0.10
0.30
0.33
0.51
0.23
0.32
10.10
10.50
7.40
7.60
1.27 BSC
10.00
10.65
0.40
1.27
0°
8°
—
0.10
TSSOP (20-Pin)
TSSOP (20-Pin)
E
1
2
A
0.033
0.037
—
0.90
B
0.007
0.012
0.18
0.30
C
0.0035
0.008
0.90
0.180
D
0.252
0.260
6.40
6.60
E
0.169
0.177
4.30
4.48
F
0.025 BSC
0.65 BSC
G
0.002
0.005
0.05
0.15
H
—
0.0433
—
1.10
L
0.020
0.028
0.50
0.70
M
0°
8°
0°
8°
P
0.246
0.256
6.25
6.50
*LC
—
0.004
—
0.10
5218_t06.at3
* Lead Coplanarity* JEDEC Drawing ___________
P
3
E
D
F
A
SEATING PLANE
B
H
G
L
M
C
20-Pin (TSSOP).eps
IMP, Inc.
Corporate Headquarters
2830 N. First Street
San Jose, CA 95134-2071
Tel: 408-432-9100
Fax: 408-432-1085
e-mail: [email protected]
http://www.impweb.com
The IMP logo is a registered trademark of IMP, Inc.
All other company and product names are trademarks of their respective owners.
© 2000 IMP, Inc.
Printed in USA
Publication #: 7012
Revision:
D
Issue Date:
07/31/00
Type:
Preliminary