ACT5830 Rev PrB, 05-Mar-08 Advanced Product Information―All Information Subject to Change Twelve Channel PMU for Mobile Phones FEATURES GENERAL DESCRIPTION • Multiple Patents Pending • 350mA, PWM Step-Down DC/DC Converter • Eight I2C-Programmable, Low Noise LDOs − Three Optimized for RF Section Power − Five Optimized for BB Section Power • Li+ Battery Charger with Integrated MOSFET − Charger Current Monitor Output (VICHG) − Charger ON/OFF Control Pin The patent-pending ACT5830 is a complete, integrated power management solution that is ideal for mid-high and mobile phones. This device integrates a linear Li+ battery charger with an internal power MOSFET, a high efficiency 350mA DC/DC converter, eight low dropout linear regulators, a reset output, and two N-Channel open drain switches, and an I2C Serial Interface to achieve flexibility for programming LDO outputs and individual on/off control. • Two N-channel Open Drain Switches The charger is a complete, thermally-regulated, stand-alone single-cell linear Li+ battery charger that incorporates an internal power MOSFET for constant-current/constant-voltage control. The charger includes a variety of value-added features, and it is programmable via the I2C-Interface to control charging current, termination voltage, along with safety features and operation modes. • Minimal External Components • I2CTM Serial Interface − Configurable Operating Modes • AC-OK and RESET Outputs • 5×5mm, Thin-QFN (TQFN55-40) Package − Only 0.75mm Height − RoHS Compliant The ACT5830 is available in a compact 5mm x 5mm 40-pin Thin-QFN package that is just 0.75mm thin. APPLICATIONS • GSM or CDMA Mobile Phones SYSTEM BLOCK DIAGRAM CHG_IN nENCHG VICHG ACOK Single Cell Li+ Battery Charger REG Step-Down DC/DC SCL SDA PWR_HOLD Single Cell Li+ Battery Charger 1.1V to 4.4V Up to 350mA Low-Noise LDOs LDO1 nON LDO2 HF_PWR System Control PWR_ON LDO3 TX_EN LDO4 RX_EN TCXO_EN nRST LDO5 LDO6 OD1 OD2 Open-Drain Drivers LDO7 ACT5830 LDO8 PMU TM 1.4V to 3.7V Up to 300mA 1.4V to 3.7V Up to 300mA 1.4V to 3.7V Up to 100mA 1.4V to 3.7V Up to 100mA 1.4V to 3.7V Up to 150mA Pb-free 1.4V to 3.7V Up to 150mA 0.645V to 3.7V Up to 250mA 1.4V to 3.7V Up to 250mA Active ODI1 Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. ODI2 -1- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 TABLE OF CONTENTS GENERAL INFORMATION ...................................................................................... P. 01 Functional Block Diagram ................................................................................................. p. 03 Ordering Information ......................................................................................................... p. 04 Pin Configuration .............................................................................................................. p. 04 Pin Descriptions ................................................................................................................ p. 05 Absolute Maximum Ratings .............................................................................................. p. 07 SYSTEM MANAGEMENT ........................................................................................ P. 08 Electrical Characteristics................................................................................................... p. 08 I2C Interface Electrical Characteristics .............................................................................. p. 09 System Management Register Descriptions ..................................................................... p. 10 Functional Descriptions..................................................................................................... p. 11 STEP-DOWN DC/DC CONVERTER ....................................................................... P. 13 Electrical Characteristics .................................................................................................. p. 13 Register Descriptions ........................................................................................................ p. 14 Typical Performance Characteristics ............................................................................... p. 16 Functional Description ...................................................................................................... p. 17 LOW-DROPOUT LINEAR REGULATORS .............................................................. P. 19 Register Descriptions ........................................................................................................ p. 19 Typical Performance Characteristics ................................................................................ p. 23 Functional Description ...................................................................................................... p. 24 LDO1................................................................................................................................. p. 25 LDO2................................................................................................................................. p. 26 LDO3................................................................................................................................. p. 27 LDO4................................................................................................................................. p. 28 LDO5................................................................................................................................. p. 29 LDO6................................................................................................................................. p. 30 LDO7................................................................................................................................. p. 31 LDO8................................................................................................................................. p. 32 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) ................................................. P. 33 Electrical Characteristics ................................................................................................... p. 33 Li+ Battery Charger Register Descriptions ........................................................................ p. 35 Typical Performance Characteristics ................................................................................ p. 37 Functional Description....................................................................................................... p. 38 PACKAGE INFORMATION ...................................................................................... P. 41 Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. -2- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 FUNCTIONAL BLOCK DIAGRAM BODY AND VSYS CONTROL AC Adaptor 4.3V to 6V or USB CHG_IN Active-Semi ACT5830 BAT Li+ Battery + CURRENT SENSE VINUVLO 4.0V VOLTAGE SENSE nENCHG Charge Control nACOK PRECONDITION 2.9V BATID THERMAL REGULATION VICHG 110°C VP To Battery OUT1 REG Step-Down DC/DC nRST Reset REF SW VBUCK VBUCK GP Voltage Reference PWR_HOLD LDO1 nON OUT1 OUT1 HF_PWR PWR_ON System Control LDO2 OUT2 OUT2 SDA LDO3 SCL IN1 IN2 To LDOs LDO4 OUT1 OUT4 OUT3 OUT4 To LDOs TCXO_EN BAT OUT3 LDO5 RX_EN TX_EN LDO6 OUT5 OUT6 OUT5 OUT6 ODI1 OD1 Open-Drain #1 LDO7 OUT7 OUT7 ODI2 OD2 Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. Open-Drain #2 LDO8 -3- OUT8 OUT8 www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 ORDERING INFORMATIONcd PART NUMBER VBUCK VLDO1 VLDO2 VLDO3 VLDO4 VLDO5 VLDO6 VLDO7 VLDO8 ICHARGER PACKAGE PINS TEMPERATURE RANGE ACT5830QJCGN-T 1.2V 3.0V 1.8V 3.0V 3.0V 3.0V 3.0V 1.3V 3.0V 0.45A TQFN55-40 40 -40°C to +85°C ACT5830QJCES-T 1.2V 1.8V 2.8V 2.8V 3.0V 3.3V 1.8V 3.0V 2.8V 0.45A TQFN55-40 40 -40°C to +85°C c: Output voltage options detailed in this table represent standard voltage options, and are available for samples or production orders. Additional output voltage options, as detailed in the Output Voltage Codes table, are available for production subject to minimum order quantities. Contact Active-Semi for more information regarding semi-custom output voltage combinations. d: All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS (Restriction of Hazardous Substances) standards. PIN CONFIGURATION NC VP SW SW GP NC nACOK nENCHG BATID VICHG CHG_IN VBUCK BAT HF_PWR REF G nRST nON IN2 IN1 OUT4 OUT3 ACT5830 OUT6 OUT5 OUT8 OUT7 OUT2 OUT1 TX_EN RX_EN NC PWR_HOLD PWR_ON ODI2 OD2 OD1 ODI1 SCL SDA TCXO_EN 5×5mm QFN (TQFN55-40) Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. -4- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 PIN DESCRIPTIONS PIN NAME 1 CHG_IN 2 BAT Battery Charger Output. Connect this pin directly to the battery anode (+ terminal), and to IN1 and IN2 pins. Bypass with 10µF ceramic capacitor to G. 3 REF Reference Noise Bypass. Connect a 0.01µF ceramic capacitor from REF to G. This pin is discharged to G in shutdown. 4 nRST Active Low Reset Output. nRST asserts low for the reset timeout period of 65ms whenever the ACT5830 is first enabled. This output is internally connected to OUT1 via a 15kΩ pull-up resistor. 5 IN2 6 OUT4 LDO4 Output. Capable of delivering up to 100mA of output current. Output is discharged to ground with 1kΩ when disabled. 7 OUT6 LDO6 Output. Capable of delivering up to 150mA of output current. Output is discharged to ground with 1kΩ when disabled. 8 OUT8 LDO8 Output. Capable of delivering up to 250mA of output current. Output has high impedance when disabled. 9 OUT2 LDO2 Output. Capable of delivering up to 300mA of output current. Output has high impedance when disabled. 10 TX_EN LDO6 Independent On/Off Control. Drive to a logic high for normal operation, and to a logic low to disable. 11 TCXO_EN LDO4 Independent On/Off Control. Drive to a logic high for normal operation, and to a logic low to disable. 12 SDA Data Input for I2C Serial Interface. Data is read on the rising edge of the clock. 13 SCL Clock Input for I2C Serial Interface. Data is read on the rising edge of the clock. 14 ODI1 Digital Control for Open Drain N-channel Switch 1. Drive to a logic high to turn on the switch. Drive to a logic low to turn off the switch. 15 OD1 N-channel Open–Drain Output 1. State of output controlled by ODI1. 16 OD2 N-channel Open–Drain Output 2. State of output controlled by ODI2. 17 ODI2 Digital Control for Open Drain N-channel Switch 2. Drive to a logic high to turn on the switch. Drive to a logic low to turn off the switch. 18 PWR_ON 19 DESCRIPTION Battery Charge Supply Input. Connect a 1µF ceramic capacitor from CHG_IN to G. Input supply to LDO2, LDO4, LDO6, and LDO8. Connect to BAT and IN1. Push Button On/Off Input. Connect a push-button between this pin and BAT. There is an internal 200kΩ pull down resistor to G. See the System Startup & Shutdown section for more information. Power Hold Input for REG and LDO1. Drive PWR_HOLD to a logic high to complete the startup PWR_HOLD sequence. Drive the pin to a logic low to disable REG and LDO1. See the System Startup & Shutdown section for more information. 20 NC 21 RX_EN No Connect. Not internally connected. LDO5 Independent On/Off Control. Drive to a logic high for normal operation, and to a logic low to disable. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. -5- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 PIN DESCRIPTIONS CONT’D PIN NAME DESCRIPTION 22 OUT1 LDO1 Output. Capable of delivering up to 300mA of output current. Output has high impedance when disabled. 23 OUT7 LDO7 Output. Capable of delivering up to 250mA of output current. Output has high impedance when disabled. 24 OUT5 LDO5 Output. Capable of delivering up to 150mA of output current. Output is discharged to ground with 1kΩ when disabled. 25 OUT3 LDO3 Output. Capable of delivering up to 100mA of output current. Output has high impedance when disabled. 26 IN1 Input Supply to LDO1, LDO3, LDO5, and LDO7. Connect to BAT and IN2. 27 nON Push Button Active Low Open Drain Output. When PWR_ON is low, nON is open drain. When PWR_ON is high or when in shutdown, nON is asserted low. This output is internally connected to OUT1 via a 15kΩ pull-up resistor. 28 G 29 Ground. Connect G and GP together at a single point place as close to the IC as possible. Hands Free Input. A high level indicates availability of hands free input. This pin is internally HF_PWR pulled down to G via a 200kΩ resistor. Connect to a 0.1µF capacitor to G to achieve TBDkV (typ) ESD protection. Output Feedback Sense for REG. Connect this pin directly to the output node to connect the internal feedback network to the output voltage. 30 VBUCK 31 NC No Connect. Not internally connected. 32 VP Power Input for REG. Connect to BAT, IN1, and IN2. Bypass to GP with a high quality ceramic capacitor placed as close as possible to the IC. 33, 34 SW Switching Node Output for REG. Connect this pin to the switching end of the inductor. 35 GP Power Ground for REG. Connect G and GP together at a single point place as close to the IC as possible. 36 NC No Connect. Not internally connected. 37 nACOK 38 nENCHG Charge Enable Active Low Input. Drive low or leave floating to enable the charger. Drive high to disable the charger. This pin has an internal 200kΩ pull-down resistor. 39 BATID Battery ID pin to detect the presence of the battery. When the battery is present, the voltage at this pin is lower than 2V, otherwise, it is higher than 2V. 40 VICHG Charge Current Monitor. The voltage at this pin is proportional to the charger current, with a gain of 2.47mV/mA. This output becomes high impedance in shutdown. CHG_IN Active Low Status Output. nACOK is asserted low when VCHG_IN > 4.0V. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. -6- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 ABSOLUTE MAXIMUM RATINGSc PARAMETER VALUE UNIT -0.3 to +7 -0.3 to +6 V V IN1, IN2, BAT, BATID, VICHG, SCL, SDA, PWR_HOLD, nRST, PWR_ON, nON, nACOK, nENCHG, TCXO_EN, RX_EN, TX_EN, ODIx, ODx to G -0.3 to +6 V VP, SW, VREG to GP -0.3 to +6 V CHG_IN to G t < 1ms and duty cycle <1% Steady State REF, HF_PWR to G -0.3 to VBAT + 0.3 OUT1, OUT3, OUT5, OUT7 to G -0.3 to VIN1 + 0.3 V OUT2, OUT4, OUT6, OUT8 to G -0.3 to VIN2 + 0.3 V -0.3 to +0.3 V Junction to Ambient Thermal Resistance (θJA) 30 °C/W RMS Power Dissipation (TA = 70°C)d 2.7 W Operating Junction Temperature (TJ) -40 to 150 °C Operating Temperature Range (TA) -40 to 85 °C Store Temperature -55 to 150 °C 300 °C GP to G Lead Temperature (Soldering, 10 sec) c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability. d: Derate 33mW/°C above TA = 70°C. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. -7- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SYSTEM MANAGEMENT ELECTRICAL CHARACTERISTICS (VBAT = VIN1 = VIN2 = 3.6V, TA = 25°C, unless otherwise specified.) PARAMETER TEST CONDITIONS BAT Operating Voltage Range MIN TYP 2.6 BAT UVLO Threshold BAT Voltage Rising BAT UVLO Hysteresis BAT Voltage Falling 80 BAT Rising 0.1 BAT Falling 5 BAT UVLO Delay 2.2 nRST Delay No Load BAT Supply Current 2.35 MAX UNIT 5.5 V 2.5 V mV ms 65 ms REG, LDO1, LDO2 and LDO3 Enabled with No Load and CHGR Disabled 0.26 0.5 mA REG, All LDOs Enabled and CHGR Disabled. 0.45 0.75 mA 1.25 1.26 V REF Output Voltage 1.24 Reference PSRR CREF = 0.01µF 75 dB ODx Output On Resistance 100mA Sink Current 4 Ω ODx Output Leakage Current VODx = VBAT 10 Logic High Input Voltage 1.4 µA V Logic Low Input Voltage 0.4 V 0.3 V 1 µA Logic Low Output Voltage nON, nRST, ISINK = 5mA Logic Leakage Current VnON = VnRST = VCHG_IN = 4.2V Thermal Shutdown Temperature Temperature rising 160 °C Thermal Shutdown Hysteresis Temperature falling 20 °C Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. -8- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SYSTEM MANAGEMENT I2C INTERFACE ELECTRICAL CHARACTERISTICS PARAMETER TEST CONDITIONS MIN SCL, SDA Low Input Voltage SCL, SDA High Input Voltage TYP MAX UNIT 0.4 V 1.4 SCL, SDA Leakage Current VCHG_IN = 4.2V SDA Low Output Voltage IOL = 5mA SCL Clock Period, tSCL fSCL clock freq = 400kHz V 1 µA 0.3 V 2.5 µs SDA Data In Setup Time to SCL High, tSU 100 ns SDA Data Out Hold Time after SCL Low, tHD 300 ns SDA Data Low Setup Time to SCL Low, tST Start Condition 100 ns SDA Data High Hold Time after Clock High, tSP Stop Condition 100 ns Figure 1: I2C Serial Bus Timing Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. -9- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SYSTEM MANAGEMENT SYSTEM MANAGEMENT REGISTER DESCRIPTIONS Table 1: Global Register Map OUTPUT ADDRESS DATA (DEFAULT VALUES) HEX A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 CHGR 08h 0 0 0 0 1 0 0 0 0 0 0 0 R V V V CHGR 09h 0 0 0 0 1 0 0 1 0 0 R R R R R R CHGR 0Ah 0 0 0 0 1 0 1 0 R R R R R R R R CHGR 0Bh 0 0 0 0 1 0 1 1 R R R R R R R 0 LDO3 0Ch 0 0 0 0 1 1 0 0 0 R 1 V V V V V LDO5 0Dh 0 0 0 0 1 1 0 1 1 R 0 V V V V V LDO7 07h 0 0 0 0 0 1 1 1 R V V V V V V V LDO7 0Eh 0 0 0 0 1 1 1 0 0 R 1 R R R R R LDO1 0Fh 0 0 0 0 1 1 1 1 0 R 1 V V V V V LDO4 10h 0 0 0 1 0 0 0 0 1 R 0 V V V V V LDO6 11h 0 0 0 1 0 0 0 1 1 R 0 V V V V V LDO8 12h 0 0 0 1 0 0 1 0 0 R 1 V V V V V LDO2 13h 0 0 0 1 0 0 1 1 0 R 1 V V V V V REG 14h 0 0 0 1 0 1 0 0 R V V V V V V V REG 15h 0 0 0 1 0 1 0 1 R R R R R R R 0 REG 16h 0 0 0 1 0 1 1 0 R R R R R R R R REG 17h 0 0 0 1 0 1 1 1 R R R R R R R 1 KEY: R: Read-Only bit. No Default Assigned. V: Default Values Depend on Voltage Option. Default Values May Vary. Note: Addresses other than those specified in Table 1 may be used for factory settings. Do not access any registers other than those specified in Table 1. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 10 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SYSTEM MANAGEMENT FUNCTIONAL DESCRIPTIONS The ACT5830 offers a wide array of system management functions that allow it to be configured for optimal performance in a wide range of applications. Once the power-up routine is completed, the remaining LDOs can be enabled/disabled via either the I2C interface or the TCXO_EN (LDO4), RX_EN (LDO5), TX_EN (LDO6), and PWR_HOLD (REG and LDO1) pins. I²C Serial Interface This start-up procedure requires that the pushbutton be held until the microprocessor assumes control of PWR_HOLD, providing protection against inadvertent momentary assertions of the pushbutton. If desired, longer “push-and-hold” times can be easily implemented by simply adding an additional delay before assuming control of PWR_HOLD. If the microprocessor is unable to complete its power-up routine successfully before the user lets go of the push-button, the ACT5830 will automatically shut itself down. At the core of the ACT5830’s flexible architecture is an I2C interface that permits optional programming capability to enhance overall system performance. Use standard I2C write-byte commands to program the ACT5830 and read-byte commands to read the IC’s status. Figure 1: I2C Serial Bus Timing provides a standard timing diagram for the I2C protocol. The ACT5830 always operates as a slave device, with address 1010101. System Startup & Shutdown The ACT5830 features a flexible enable architecture that allows it to support a variety of push-button enable/disable schemes. Although other startup routines are possible, a typical startup and shutdown process would proceed as follows (referring to Figure 2): System startup is initiated whenever one of the following conditions occurs: 1) The user presses the push-button, asserting PWR_ON high, Once a successful power-up routine is completed, the user can initiate a shutdown process by pressing the push-button a second time. Upon detecting a second assertion of PWR_ON (by depressing the push-button), the ACT5830 asserts nON to interrupt the microprocessor which initiates an interrupt service routine that will reveal that the user pressed the push-button. If HF_PWR and CHG_OK are both low, the microprocessor then initiates a power-down routine, the final step of which will be to de-assert PWR_HOLD, disabling REG and LDO1. 2) A valid supply (>4V) is connected to the charger input (CHG_IN), or 3) a headset is connected, asserting HF_PWR high. The ACT5830 begins its system startup procedure by enabling REG, LDO2 and LDO3, then LDO1 are enabled when VBUCK or VOUT2 reaches 87% of its final value. nRST is asserted low when VOUT1 reaches 87% of its final value, holding the microprocessor in reset for a user-selectable reset period of 65msec. If (VBUCK or VOUT2) and VOUT1 are within 13% of their regulation voltages when the reset timer expires, the ACT5830 de-asserts nRST so that the microprocessor can begin its power up sequence. Once the power-up routine is successfully completed, the microprocessor asserts PWR_HOLD high to keep the ACT5830 enabled after the push-button is released by the user. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 11 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SYSTEM MANAGEMENT Figure 2: Startup and Shutdown Sequence CHG_DETECT OR HF_PWR PWR_ON (PUSH-BUTTON) REG, LDO2, LDO3 ENABLE VBUCK, OUT2, OUT3 87% of VREG or VOUT2 LDO1 ENABLE OUT1 87% of VOUT1 RESET TIMER ENABLE nRST 65ms TCXO_EN, RX_EN, TX_EN OUT4, OUT5, OUT6 I2C PROGRAMMING PWR_HOLD nON Open Drain Outputs Thermal Overload Protection The ACT5830 includes two n-channel open drain outputs (OD1 and OD2) that can be used for driving external loads such as WLEDs or a vibrator motor, as shown in the functional diagram. Each of the OD output are enabled when either it's respective ODIx pin in driven to a logic high. The ACT5830 integrates thermal overload protection circuitry to prevent damage resulting from excessive thermal stress that may be encountered under fault conditions, for example. This circuitry disables all regulators if the ACT5830 die temperature exceeds 160°C, and prevents the regulators nACOK Output from being enabled until the die temperature drops by 20°C (typ), after which a normal startup routine may commence. The ACT5830's nACOK output provides a logic-level indication of the status of the voltage at CHG_IN. nACOK is an open-drain output which sinks current whenever VCHG_IN > 4V. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 12 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 STEP-DOWN DC/DC CONVERTER ELECTRICAL CHARACTERISTICS (VVP = 3.6V, TA = 25°C, unless otherwise specified.) PARAMETER TEST CONDITIONS VP Operating Voltage Range MIN 3.1 VP UVLO Threshold Input Voltage Rising VP UVLO Hysteresis Input Voltage Falling 2.9 Output Voltage Regulation Accuracy REG/ON[ ] = [0], VVP = 4.2V 1 µA c VNOM VREG ≥ 20% of VNOM V 0.1 -1.2% Current Limit 3.1 µA VNOM ≥ 1.3V, IOUT = 10mA IOUT = 10mA to 350mA V 200 VNOM Load Regulation 5.5 110 -2.4% VVP = Max(VNOM + 1V, 3.2V) to 5.5V UNIT mV VNOM < 1.3V, IOUT = 10mA Line Regulation Oscillator Frequency 3 MAX 80 Standby Supply Current Shutdown Supply Current TYP +1.8% +1.8% V 0.15 %/V 0.0017 %/mA 0.45 0.6 A 1.35 1.6 1.85 MHz VREG = 0V 530 PMOS On-Resistance ISW = -100mA 0.45 0.75 Ω NMOS On-Resistance ISW = 100mA 0.3 0.5 Ω SW Leakage Current VVP = 5.5V, VSW = 5.5V or 0V 1 µA kHz Power Good Threshold 94 %VNOM Minimum On-Time 70 ns c: VNOM refers to the nominal output voltage level for VREG as defined by the Ordering Information section. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 13 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 STEP-DOWN DC/DC CONVERTER REGISTER DESCRIPTIONS Note: See Table 1 for default register settings. Table 2: Control Register Map DATA ADDRESS D7 D6 R VRANGE 15h R R R R 16h R R R R 17h R R R R 14h D5 D4 D3 D2 D1 D0 R R R MODE R R R R R R OK ON VSET R: Read-Only bits. Default Values May Vary. Table 3: Control Register Bit Descriptions ADDRESS NAME BIT ACCESS FUNCTION 14h VSET [5:0] R/W REG Output Voltage Selection 14h VRANGE REG Voltage Range Selection DESCRIPTION See Table 4 0 Min VOUT = 1.1V 1 Min VOUT = 1.25V [6] R/W [7] R [0] R/W 15h [7:1] R READ ONLY 16h [7:0] R READ ONLY 14h 15h MODE READ ONLY Mode Selection 0 PWM/PFM 1 Forced PWM 0 REG Disable 1 REG Enable 0 Output is not OK 1 Output is OK 17h ON [0] R REG Enable 17h OK [1] R REG Power-OK 17h [2] R READ ONLY 17h [7:3] R READ ONLY Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 14 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 STEP-DOWN DC/DC CONVERTER REGISTER DESCRIPTIONS CONT’D Table 4: REG/VSET[ ] Output Voltage Setting REG/VSET[5:4] REG/VSET [3:0] REG/VRANGE[ ] = [0] REG/VRANGE[ ] = [1] 00 01 10 11 00 01 10 11 0000 N/A N/A 1.455 1.860 1.250 2.050 2.850 3.650 0001 N/A N/A 1.480 1.890 1.300 2.100 2.900 3.700 0010 N/A 1.100 1.505 1.915 1.350 2.150 2.950 3.750 0011 N/A 1.125 1.530 1.940 1.400 2.200 3.000 3.800 0100 N/A 1.150 1.555 1.965 1.450 2.250 3.050 3.850 0101 N/A 1.175 1.585 1.990 1.500 2.300 3.100 3.900 0110 N/A 1.200 1.610 2.015 1.550 2.350 3.150 3.950 0111 N/A 1.225 1.635 2.040 1.600 2.400 3.200 4.000 1000 N/A 1.255 1.660 2.065 1.650 2.450 3.250 4.050 1001 N/A 1.280 1.685 2.090 1.700 2.500 3.300 4.100 1010 N/A 1.305 1.710 2.115 1.750 2.550 3.350 4.150 1011 N/A 1.330 1.735 2.140 1.800 2.600 3.400 4.200 1100 N/A 1.355 1.760 2.165 1.850 2.650 3.450 4.250 1101 N/A 1.380 1.785 2.190 1.900 2.700 3.500 4.300 1110 N/A 1.405 1.810 2.200 1.950 2.750 3.550 4.350 1111 N/A 1.430 1.835 2.245 2.000 2.800 3.600 4.400 (N/A): Not Available Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 15 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 STEP-DOWN DC/DC CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (VINx = 3.6V, COUTx = 1µF, TA = 25°C unless otherwise specified.) REG Load Regulation REG Efficiency vs. Load Efficiency (%) 4.0V 80 Load Regulation Error (%) 3.6V 85 75 70 65 60 55 ACT5830-002 90 0.2 ACT5830-001 95 0.0 -0.2 3.6V 4.2V -0.4 -0.6 -0.8 50 1 10 100 1000 0 50 100 Output Current (mA) 1.804 550 500 1.802 1.800 1.798 1.796 350 300 150 100 1.790 1.788 50 0 40 400 60 NMOS 250 200 1.792 20 PMOS 450 400 1.794 0 350 REG MOSFET Resistance RDSON (mΩ) VREG Voltage (V) 1.806 -20 300 85 2.5 3.0 3.5 4.0 4.5 5.0 Temperature (°C) VP1 Voltage (V) REG Load Transient Response REG Load Transient Response CH2 5.5 ACT5830-006 ACT5830-005 CH1 CH1 ACT5830-004 1.808 -40 250 600 ACT5830-003 IOUT1 = 35mA 1.810 200 Output Current (mA) VREG Regulation Voltage 1.812 150 CH2 0mA 0mA CH1: VOUT1, 50mV/div (AC Coupled) CH2: IOUT1, 200mA/div TIME: 200µs/div Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. CH1: VOUT1, 50mV/div (AC Coupled) CH2: IOUT1, 200mA/div TIME: 200µs/div - 16 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 STEP-DOWN DC/DC CONVERTER FUNCTIONAL DESCRIPTIONS General Description REG is a fixed-frequency, current-mode, synchronous PWM step-down converters that achieves a peak efficiency of up to 97%. REG is capable of supplying up to 350mA of output current and operates with a fixed frequency of 1.6MHz, minimizing noise in sensitive applications and allowing the use of small external components. REG is available with a variety of standard and custom output voltages, and may be software-controlled via the I2C interface by systems that require advanced power management functions. Program the output voltage via the I2C serial interface by writing to the REG/VSET[ ] register. Programmable Operating Mode By default, REG operates in fixed-frequency PWM mode at medium to heavy loads, then transitions to a proprietary power-saving mode at light loads in order to save power. In applications where low noise is critical, force fixed-frequency PWM operation across the entire load current range, at the expense of light-load efficiency, by setting the REG/MODE[ ] bit to [1]. 100% Duty Cycle Operation Power-OK REG is capable of operating at up to 100% duty cycle. During 100% duty-cycle operation, the highside power MOSFET is held on continuously, providing a direct connection from the input to the output (through the inductor), ensuring the lowest possible dropout voltage in battery-powered applications. REG features a power-OK status bit that can be read by the system microprocessor. If the output voltage is lower than the power-OK threshold, typically 6% below the programmed regulation voltage, REG/OK[ ] will clear to 0. Synchronous Rectification REG features an integrated n-channel synchronous rectifier, which maximizes efficiency and minimizes the total solution size and cost by eliminating the need for an external rectifier. Enabling and Disabling REG Enable/disable functionality is typically implemented as part of a controlled enable/disable scheme utilizing nMSTR and other system control features of the ACT5830. REG is automatically enabled whenever either of the following conditions are met: Soft-Start REG includes internal soft-start circuitry, and enabled its output voltage tracks an internal 80µs softstart ramp so that it powers up in a monotonic manner that is independent of loading. Compensation REG utilizes current-mode control and a proprietary internal compensation scheme to simultaneously simplify external component selection and optimize transient performance over its full operating range. No compensation design is required, simply follow a few simple guidelines described below when choosing external components. 1) HF_PWR is asserted high, or Input Capacitor Selection 2) PWR_ON is asserted high, or The input capacitor reduces peak currents and noise induced upon the voltage source. A 2.2µF ceramic input capacitor is recommended for most applications. 3) PWR_HOLD is asserted high. When none of these conditions are true, or if REG/ON[ ] bit is set to [0], REG is disabled, and its quiescent supply current drops to less than 1µA. Programming the Output Voltage By default, REG powers up and regulates to its default output voltage. Once the system is enabled, REG’s output voltage may be programmed to a different value, typically in order to reduce the power consumption of a microprocessor in standby mode. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. Output Capacitor Selection For most applications, a 10µF ceramic output capacitor is recommended. Although REG was designed to take advantage of the benefits of ceramic capacitors, namely small size and very-low ESR, low-ESR tantalum capacitors can provide acceptable results as well. - 17 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 STEP-DOWN DC/DC CONVERTER FUNCTIONAL DESCRIPTIONS CONT’D Inductor Selection REG utilizes current-mode control and a proprietary internal compensation scheme to simultaneously simplify external component selection and optimize transient performance over its full operating range. REG was optimized for operation with a 3.3µH inductor, although inductors in the 2.2µH to 4.7µH range can be used. Choose an inductor with a low DC-resistance, and avoid inductor saturation by choosing inductors with DC ratings that exceed the maximum output current of the application by at least 30%. PCB Layout Considerations High switching frequencies and large peak currents make PC board layout an important part of stepdown DC/DC converter design. A good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. Stepdown DC/DC exhibits discontinuous input current, so the input capacitors should be placed as close as possible to the IC, and avoiding the use of vias if possible. The inductor, input filter capacitor, and output filter capacitor should be connected as close together as possible, with short, direct, and wide traces. The ground nodes for each regulator's power loop should be connected at a single point in a star-ground configuration, and this point should be connected to the backside ground plane with multiple vias. The output node should be connected to the VBUCK pin through the shortest possible route, while keeping sufficient distance from switching nodes to prevent noise injection. Finally, the exposed pad should be directly connected to the backside ground plane using multiple vias to achieve low electrical and thermal resistance. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 18 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LOW-DROPOUT LINEAR REGULATORS REGISTER DESCRIPTIONS Note: See Table 1 for default register settings. Table 5: LDO Control Register Map DATA ADDRESS 07h D7 D6 D5 R VRANGE7 D4 D3 D2 D1 D0 R R VSET7 0Fh DIS1 OK1 ON1 VSET1 13h DIS2 OK2 ON2 VSET2 0Eh DIS7 OK7 ON7 12h DIS8 OK8 ON8 VSET8 0Ch DIS3 OK3 ON3 VSET3 10h DIS4 OK4 ON4 VSET4 0Dh DIS5 OK5 ON5 VSET5 11h DIS6 OK6 ON6 VSET6 R R R Table 6: LDO Control Register Bit Descriptions ADDRESS NAME BIT ACCESS FUNCTION DESCRIPTION 07h VSET7 [5:0] W/R LDO7 Output Voltage Selection See Table 8 07h VRANGE7 [6] W/R REG Voltage Range Selection [7] R 07h VSET1 [4:0] W/R LDO1 Output Voltage Selection 0Fh ON1 [5] W/R LDO1 Enable 0Fh OK1 [6] R LDO1 Power-OK 0Fh DIS1 [7] W/R LDO1 Output Discharge Enable 13h VSET2 [4:0] W/R LDO2 Output Voltage Selection 13h ON2 [5] W/R LDO2 Enable 13h OK2 [6] R LDO2 Power-OK DIS2 [7] Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. W/R Min VOUT = 0.645V 1 Min VOUT = 1.25V READ ONLY 0Fh 13h 0 LDO2 Output Discharge Enable - 19 - See Table 7 0 LDO1 Disable 1 LDO1 Enable 0 Output Out of Regulation 1 Output In Regulation 0 Output High-Z In Shutdown 1 Output Discharge Enabled See Table 7 0 LDO2 Disable 1 LDO2 Enable 0 Output Out of Regulation 1 Output In Regulation 0 Output High-Z In Shutdown 1 Output Discharge Enabled www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LOW-DROPOUT LINEAR REGULATORS REGISTER DESCRIPTIONS CONT’D Table 6: LDO Control Register Bit Descriptions (Cont’d) ADDRESS NAME BIT ACCESS FUNCTION DESCRIPTION 12h VSET8 [4:0] W/R LDO8 Output Voltage Selection See Table 7 12h ON8 [5] W/R LDO8 Enable 12h OK8 [6] R LDO8 Power-OK 12h DIS3 [7] W/R LDO8 Output Discharge Enable 0Ch VSET3 [4:0] W/R LDO3 Output Voltage Selection 0Ch ON3 [5] W/R LDO3 Enable 0Ch OK3 [6] R LDO3 Power-Ok 0Ch DIS3 [7] W/R LDO3 Output Discharge Enable 10h VSET4 [4:0] W/R LDO4 Output Voltage Selection 10h ON4 [5] W/R LDO4 Enable 10h OK4 [6] R LDO4 Power-OK 10h DIS4 [7] W/R LDO4 Output Discharge Enable 0Dh VSET5 [4:0] W/R LDO5 Output Voltage Selection 0Dh ON5 [5] W/R LDO5 Enable 0Dh OK5 [6] R LDO5 Power-OK 0Dh DIS5 [7] W/R LDO5 Output Discharge Enable Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 20 - 0 LDO8 Disable 1 LDO8 Enable 0 Output Out of Regulation 1 Output In Regulation 0 Output High-Z In Shutdown 1 Output Discharge Enabled See Table 7 0 LDO3 Disable 1 LDO3 Enable 0 Output Out of Regulation 1 Output In Regulation 0 Output High-Z In Shutdown 1 Output Discharge Enabled See Table 7 0 LDO4 Disable 1 LDO4 Enable 0 Output Out of Regulation 1 Output In Regulation 0 Output High-Z In Shutdown 1 Output Discharge Enabled See Table 7 0 LDO5 Disable 1 LDO5 Enable 0 Output Out of Regulation 1 Output In Regulation 0 Output High-Z In Shutdown 1 Output Discharge Enabled www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LOW-DROPOUT LINEAR REGULATORS REGISTER DESCRIPTIONS CONT’D Table 6: LDO Control Register Bit Descriptions (Cont’d) ADDRESS NAME BIT ACCESS FUNCTION 11h VSET6 [4:0] W/R LDO6 Output Voltage Selection 11h ON6 [5] W/R LDO6 Enable 11h OK6 [6] R LDO6 Power-OK 11h DIS6 [7] W/R LDO6 Output Discharge Enable [4:0] R 0Eh ON7 [5] W/R LDO7 Enable 0Eh OK7 [6] R LDO7 Power-OK 0Eh DIS7 [7] W/R LDO7 Output Discharge Enable ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. See Table 7 0 LDO6 Disable 1 LDO6 Enable 0 Output Out of Regulation 1 Output In Regulation 0 Output High-Z In Shutdown 1 Output Discharge Enabled READ ONLY 0Eh Innovative PowerTM DESCRIPTION - 21 - 0 LDO7 Disable 1 LDO7 Enable 0 Output Out of Regulation 1 Output In Regulation 0 Output High-Z In Shutdown 1 Output Discharge Enabled www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LOW-DROPOUT LINEAR REGULATORS REGISTER DESCRIPTIONS CONT’D Table 7: LDO1234568/VSET[ ] Output Voltage Settings LDOx/VSETx[2:0] LDOx/VSETx[4:3] 00 01 10 11 000 1.4 2.15 2.55 3.0 001 1.5 2.20 2.60 3.1 010 1.6 2.25 2.65 3.2 011 1.7 2.30 2.70 3.3 100 1.8 2.35 2.75 3.4 101 1.9 2.40 2.80 3.5 110 2.0 2.45 2.85 3.6 111 2.1 2.50 2.90 3.7 Table 8: LDO7/VSET[ ] Output Voltage Settings LDO7/VSET[5:4] LDO7/VSET [3:0] LDO7/VRANGE[ ] = [0] LDO7/VRANGE[ ] = [1] 00 01 10 11 00 01 10 11 0000 0.645 1.050 1.455 1.860 1.250 2.050 2.850 3.650 0001 0.670 1.075 1.480 1.890 1.300 2.100 2.900 3.700 0010 0.695 1.100 1.505 1.915 1.350 2.150 2.950 N/A 0011 0.720 1.125 1.530 1.940 1.400 2.200 3.000 N/A 0100 0.745 1.150 1.555 1.965 1.450 2.250 3.050 N/A 0101 0.770 1.175 1.585 1.990 1.500 2.300 3.100 N/A 0110 0.795 1.200 1.610 2.015 1.550 2.350 3.150 N/A 0111 0.820 1.225 1.635 2.040 1.600 2.400 3.200 N/A 1000 0.845 1.255 1.660 2.065 1.650 2.450 3.250 N/A 1001 0.870 1.280 1.685 2.090 1.700 2.500 3.300 N/A 1010 0.895 1.305 1.710 2.115 1.750 2.550 3.350 N/A 1011 0.920 1.330 1.735 2.140 1.800 2.600 3.400 N/A 1100 0.950 1.355 1.760 2.165 1.850 2.650 3.450 N/A 1101 0.975 1.380 1.785 2.190 1.900 2.700 3.500 N/A 1110 1.000 1.405 1.810 2.200 1.950 2.750 3.550 N/A 1111 1.025 1.430 1.835 2.245 2.000 2.800 3.600 N/A (N/A): Not Available Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 22 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LOW-DROPOUT LINEAR REGULATORS TYPICAL PERFORMANCE CHARACTERISTICS (VINx = 3.6V, COUTx = 1µF, TA = 25°C unless otherwise specified.) Power Supply Rejection Ratio Dropout Voltage (mV) 60 LDO5 50 40 30 20 LDO1 LDO3 150 100 50 0 0.1 1 10 0 100 50 100 150 200 250 Frequency (kHz) Load Current (mA) LDO Load Regulation LDO Enable LDO5 LDO8 -0.5% 300 350 ACT5830-010 ACT5830-009 0.0% VOUT (V) LDO8 200 ACT5830-008 COUT = 1µF ILOAD = 150mA LDO5 70 PSRR (dB) Dropout Voltage vs. Load Current 250 ACT5830-007 80 CH1 CH2 LDO3 CH3 LDO1 -1.0% CH4 -1.5% 0 50 100 150 200 250 300 CH1: PWR_ON, 2V/div CH2: LDO1, 2V/div CH3: LDO2, 1V/div CH4: REG, 1V/div TIME: 200µs/div 350 IOUT (mA) LDO Disable LDO Output Voltage Noise CH2 ACT5830-012 ACT5830-011 CH1 CH1 CH3 CH4 LDO1, 2 CH1: VOUTx, 1mV/div TIME: 10ms/div CH1: PWR_ON, 2V/div CH2: LDO1, 2V/div CH3: LDO2, 1V/div CH4: REG, 1V/div TIME: 2ms/div Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 23 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LOW-DROPOUT LINEAR REGULATORS FUNCTIONAL DESCRIPTIONS General Description Capacitor Selection The ACT5830 features eight high performance, lowdropout, low-noise and low quiescent current LDOs with high PSRR. The input capacitor reduces peak currents and noise at the voltage source. Connect a low ESR bulk capacitor (>1µF suggested) to the input. Select this bulk capacitor to meet the input ripple requirements and voltage rating, rather than capacitor size. Programming Output Voltages (VSET) All LDOs feature independently-programmable output voltages that are set via the I2C serial interface, increasing the ACT5830 flexibility while reducing total solution size and cost. Set the output voltage by writing to the LDOx/VSET[ _ ] register. See Table 7: LDO1234568/VSET[4:0] and Table 8: LDO7/VSET[_] Output Voltage Settings for a detailed description of voltage programming options. Enabling and Disabling LDOs For information regarding enabling and disabling the LDOs during the startup and shutdown sequence section. Once the startup routine is completed the remaining LDOs can be enabled/disabled via either the I2C interface or the TCXO_EN (LDO4), RX_EN (LDO5), TX_EN (LDO6), and PWR_HOLD (LDO1, LDO2, LDO3, LDO7, and LDO8). Reference Bypass Pin The ACT5830 contains a conference bypass pin which filters noise from the reference, providing a low-noise voltage reference to the LDOs. Bypass REF to G with a 0.01µF ceramic capacitor. Compensation and Stability PCB Layout Considerations The ACT5830’s LDOs provide good DC, AC, and noise performance over a wide range of operating conditions, and are relatively insensitive to layout considerations. When designing a PCB, however, careful layout is necessary to prevent other circuitry from degrading LDO performance. A good design places input and output capacitors as close to the LDO inputs and output as possible, and utilizes a star-ground configuration for all regulators to prevent noise-coupling through ground. Output traces should be routed to avoid close proximity to noisy nodes, particularly the SW nodes of the DC/DC. REFBP is a filtered reference noise, and internally has a direct connection to the linear regulator controller. Any noise injected onto REFBP will directly affect the outputs of the linear regulators, and therefore special care should be taken to ensure that no noise is injected to the outputs via REFBP. As with the LDO output capacitors, the REFBP by pass capacitor should be placed as close to the IC as possible, with short, direct connections to the starground. Avoid the use of vias whenever possible. Noisy nodes, such as from the DC/DC, should be routed as far away from REFBP as possible. The LDOs need an output capacitor for stability. This capacitor should be connected as close to the OUT and G pins as possible to maximize device’s performance. To ensure best performance for the device, the output capacitor should have a minimum capacitance of 1µF, and ESR value between 10mΩ and 500mΩ. High quality ceramic capacitors such as X7R and X5R dielectric types are strongly recommended. See the Capacitor Selection sections for more information. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 24 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LDO1 ELECTRICAL CHARACTERISTICS (VIN1 = 3.6V, COUT1 = 1µF, TA = 25°C unless otherwise specified.) PARAMETER TEST CONDITIONS Input Supply Range VIN1 Input Rising UVLO Hysteresis VIN1 Input Falling 2.9 5.5 V 3.1 V V -1.2 0 2 TA = -40°C to 85°C -2.5 0 3 Load Regulation Error IOUT1 = 1mA to 300mA Dropout Voltage2 UNIT TA = 25°C VIN1 = Max (VNOM1 + 0.5V, 3.1V) to 5.5V Supply Current per Output 3 MAX 0.1 Line Regulation Error Power Supply Rejection Ratio TYP 3.1 Input Under Voltage Lockout Output Voltage Accuracy MIN 0 mV -0.004 %/mA f = 1kHz, IOUT1 = 300mA, COUT1 = 1µF 60 f = 10kHz, IOUT1 = 300mA, COUT1 = 1µF 50 LDO1 Enabled 20 LDO1 Disabled 0 IOUT1 = 150mA 100 dB µA Output Current Current Limit VOUT1 = 95% of Regulation Voltage Current Limit Short Circuit Foldback VOUT1 = 0V % 330 200 mV 300 mA 580 mA 0.45 x ILIM Internal Soft-Start 100 µs Power Good Flag High Threshold VOUT1, Hysteresis = -1% 89 % Output Noise COUT1 = 10µF, f = 10Hz to 100kHz 40 µVRMS 1 Stable COUT1 20 µF c: VNOM refers to the nominal output voltage level for LDO1 as defined by the Ordering Information section. 2: Dropout Voltage is defined as the different voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 25 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LDO2 ELECTRICAL CHARACTERISTICS (VIN2 = 3.6V, COUT2 = 1µF, TA = 25°C unless otherwise specified.) PARAMETER TEST CONDITIONS Input Supply Range VIN2 Input Rising UVLO Hysteresis VIN2 Input Falling 2.9 V 3.1 V V 0 2 TA = -40°C to 85°C -2.5 0 3 IOUT2 = 1mA to 300mA mV -0.004 %/mA f = 1kHz, IOUT2 = 300mA, COUT2 = 1µF 60 f = 10kHz, IOUT2 = 300mA, COUT2 = 1µF 50 LDO2 Enabled 20 LDO2 Disabled 0 IOUT2 = 150mA 100 VOUT2 = 95% of Regulation Voltage 330 Current Limit Short Circuit Foldback VOUT2 = 0V % 0 dB µA Output Current Current Limit 5.5 -1.2 Load Regulation Error Dropout Voltage2 UNIT TA = 25°C VIN2 = Max (VNOM1 + 0.5V, 3.1V) to 5.5V Supply Current per Output 3 MAX 0.1 Line Regulation Error Power Supply Rejection Ratio TYP 3.1 Input Under Voltage Lockout Output Voltage Accuracy MIN 200 mV 300 mA 580 mA 0.45 x ILIM Internal Soft-Start 100 µs Power Good Flag High Threshold VOUT2, Hysteresis = -1% 89 % Output Noise COUT2 = 10µF, f = 10Hz to 100kHz 40 µVRMS Stable COUT2 1 20 µF c: VNOM refers to the nominal output voltage level for LDO2 as defined by the Ordering Information section. 2: Dropout Voltage is defined as the different voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 26 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LDO3 ELECTRICAL CHARACTERISTICS (VIN1 = 3.6V, COUT3 = 1µF, TA = 25°C unless otherwise specified.) PARAMETER TEST CONDITIONS Input Supply Range VIN1 Input Rising UVLO Hysteresis VIN1 Input Falling 2.9 5.5 V 3.1 V V -1.2 0 2 TA = -40°C to 85°C -2.5 0 3 Load Regulation Error IOUT3 = 1mA to 100mA Dropout Voltage2 UNIT TA = 25°C VIN3 = Max (VNOM1 + 0.5V, 3.1V) to 5.5V Supply Current per Output 3 MAX 0.1 Line Regulation Error Power Supply Rejection Ratio TYP 3.1 Input Under Voltage Lockout Output Voltage Accuracy MIN 0 mV -0.004 %/mA f = 1kHz, IOUT3 = 100mA, COUT3 = 1µF 70 f = 10kHz, IOUT3 = 100mA, COUT3 = 1µF 60 LDO3 Enabled 40 LDO3 Disabled 0 IOUT3 = 50mA dB µA 100 Output Current Current Limit VOUT3 = 95% of Regulation Voltage Current Limit Short Circuit Foldback VOUT3 = 0V 115 % 200 mV 100 mA 180 mA 0.45 x ILIM Internal Soft-Start 100 µs Power Good Flag High Threshold VOUT3, Hysteresis = -1% 89 % Output Noise COUT3 = 10µF, f = 10Hz to 100kHz 40 µVRMS Stable COUT3 1 20 µF c: VNOM refers to the nominal output voltage level for LDO3 as defined by the Ordering Information section. 2: Dropout Voltage is defined as the different voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 27 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LDO4 ELECTRICAL CHARACTERISTICS (VIN2 = 3.6V, COUT4 = 1µF, TA = 25°C unless otherwise specified.) PARAMETER TEST CONDITIONS Input Supply Range VIN2 Input Rising UVLO Hysteresis VIN2 Input Falling 2.9 5.5 V 3.1 V V -1.2 0 2 TA = -40°C to 85°C -2.5 0 3 Load Regulation Error IOUT4 = 1mA to 100mA Dropout Voltage2 UNIT TA = 25°C VIN4 = Max (VNOM1 + 0.5V, 3.1V) to 5.5V Supply Current per Output 3 MAX 0.1 Line Regulation Error Power Supply Rejection Ratio TYP 3.1 Input Under Voltage Lockout Output Voltage Accuracy MIN 0 mV -0.004 %/mA f = 1kHz, IOUT4 = 100mA, COUT4 = 1µF 70 f = 10kHz, IOUT4 = 100mA, COUT4 = 1µF 60 LDO4 Enabled 40 LDO4 Disabled 0 IOUT4 = 50mA dB µA 100 Output Current Current Limit VOUT4 = 95% of Regulation Voltage Current Limit Short Circuit Foldback VOUT4 = 0V 115 % 200 mV 100 mA 180 mA 0.45 x ILIM Internal Soft-Start 100 µs Power Good Flag High Threshold VOUT4, Hysteresis = -1% 89 % Output Noise COUT4 = 10µF, f = 10Hz to 100kHz 40 µVRMS Stable COUT4 1 20 µF c: VNOM refers to the nominal output voltage level for LDO4 as defined by the Ordering Information section. 2: Dropout Voltage is defined as the different voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 28 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LDO5 ELECTRICAL CHARACTERISTICS (VIN1 = 3.6V, COUT5 = 1µF, TA = 25°C unless otherwise specified.) PARAMETER TEST CONDITIONS Input Supply Range VIN1 Input Rising UVLO Hysteresis VIN1 Input Falling 2.9 V 3.1 V V 0 2 TA = -40°C to 85°C -2.5 0 3 IOUT5 = 1mA to 150mA mV -0.004 %/mA f = 1kHz, IOUT5 = 150mA, COUT5 = 1µF 70 f = 10kHz, IOUT5 = 150mA, COUT5 = 1µF 60 LDO5 Enabled 40 LDO5 Disabled 0 IOUT5 = 80mA dB µA 100 VOUT5 = 95% of Regulation Voltage 165 Current Limit Short Circuit Foldback VOUT5 = 0V % 0 Output Current Current Limit 5.5 -1.2 Load Regulation Error Dropout Voltage2 UNIT TA = 25°C VIN5 = Max (VNOM1 + 0.5V, 3.1V) to 5.5V Supply Current per Output 3 MAX 0.1 Line Regulation Error Power Supply Rejection Ratio TYP 3.1 Input Under Voltage Lockout Output Voltage Accuracy MIN 200 mV 150 mA 260 mA 0.45 x ILIM Internal Soft-Start 100 µs Power Good Flag High Threshold VOUT5, Hysteresis = -1% 89 % Output Noise COUT5 = 10µF, f = 10Hz to 100kHz 40 µVRMS Stable COUT5 1 20 µF c: VNOM refers to the nominal output voltage level for LDO5 as defined by the Ordering Information section. 2: Dropout Voltage is defined as the different voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 29 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LDO6 ELECTRICAL CHARACTERISTICS (VIN2 = 3.6V, COUT6 = 1µF, TA = 25°C unless otherwise specified.) PARAMETER TEST CONDITIONS Input Supply Range VIN2 Input Rising UVLO Hysteresis VIN2 Input Falling 2.9 V 3.1 V V 0 2 TA = -40°C to 85°C -2.5 0 3 IOUT6 = 1mA to 150mA mV -0.004 %/mA f = 1kHz, IOUT6 = 150mA, COUT6 = 1µF 70 f = 10kHz, IOUT6 = 150mA, COUT6 = 1µF 60 LDO6 Enabled 40 LDO6 Disabled 0 IOUT6 = 80mA dB µA 100 VOUT6 = 95% of Regulation Voltage 165 Current Limit Short Circuit Foldback VOUT6 = 0V % 0 Output Current Current Limit 5.5 -1.2 Load Regulation Error Dropout Voltage2 UNIT TA = 25°C VIN6 = Max (VNOM1 + 0.5V, 3.1V) to 5.5V Supply Current per Output 3 MAX 0.1 Line Regulation Error Power Supply Rejection Ratio TYP 3.1 Input Under Voltage Lockout Output Voltage Accuracy MIN 200 mV 150 mA 260 mA 0.45 x ILIM Internal Soft-Start 100 µs Power Good Flag High Threshold VOUT6, Hysteresis = -1% 89 % Output Noise COUT6 = 10µF, f = 10Hz to 100kHz 40 µVRMS Stable COUT6 1 20 µF c: VNOM refers to the nominal output voltage level for LDO6 as defined by the Ordering Information section. 2: Dropout Voltage is defined as the different voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 30 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LDO7 ELECTRICAL CHARACTERISTICS (VIN1 = 3.6V, COUT7 = 1µF, TA = 25°C unless otherwise specified.) PARAMETER TEST CONDITIONS Input Supply Range VIN1 Input Rising UVLO Hysteresis VIN1 Input Falling TA = 25°C Output Voltage Accuracy TA = -40°C to 85°C 2.9 UNIT 5.5 V 3.1 V V VNOM < 1.3V, IOUT = 10mA -2.4 0 2 VNOM ≥ 1.3V, IOUT = 10mA -1.2 0 2 VNOM < 1.3V, IOUT = 10mA -5 0 3 VNOM ≥ 1.3V, IOUT = 10mA -2.5 0 3 VIN7 = Max (VNOM1 + 0.5V, 3.1V) to 5.5V Load Regulation Error IOUT7 = 1mA to 250mA Dropout Voltage2 3 MAX 0.1 Line Regulation Error Supply Current per Output TYP 3.1 Input Under Voltage Lockout Power Supply Rejection Ratio MIN 0 mV -0.004 %/mA f = 1kHz, IOUT7 = 250mA, COUT7 = 1µF 60 f = 10kHz, IOUT7 = 250mA, COUT7 = 1µF 50 LDO7 Enabled 20 LDO7 Disabled 0 IOUT7 = 100mA 100 dB µA Output Current Current Limit VOUT7 = 95% of Regulation Voltage Current Limit Short Circuit Foldback VOUT7 = 0V 275 % 200 mV 250 mA 410 mA 0.45 x ILIM Internal Soft-Start 100 µs Power Good Flag High Threshold VOUT7, Hysteresis = -1% 89 % Output Noise COUT7 = 10µF, f = 10Hz to 100kHz 40 µVRMS Stable COUT7 1 20 µF c: VNOM refers to the nominal output voltage level for LDO7 as defined by the Ordering Information section. 2: Dropout Voltage is defined as the different voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 31 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 LDO8 ELECTRICAL CHARACTERISTICS (VIN2 = 3.6V, COUT8 = 1µF, TA = 25°C unless otherwise specified.) PARAMETER TEST CONDITIONS Input Supply Range VIN2 Input Rising UVLO Hysteresis VIN2 Input Falling 2.9 5.5 V 3.1 V V -1.2 0 2 TA = -40°C to 85°C -2.5 0 3 Load Regulation Error IOUT8 = 1mA to 250mA Dropout Voltage2 UNIT TA = 25°C VIN8 = Max (VNOM1 + 0.5V, 3.1V) to 5.5V Supply Current per Output 3 MAX 0.1 Line Regulation Error Power Supply Rejection Ratio TYP 3.1 Input Under Voltage Lockout Output Voltage Accuracy MIN 0 mV -0.004 %/mA f = 1kHz, IOUT8 = 250mA, COUT8 = 1µF 60 f = 10kHz, IOUT8 = 250mA, COUT8 = 1µF 50 LDO8 Enabled 20 LDO8 Disabled 0 IOUT8 = 100mA 100 dB µA Output Current Current Limit VOUT8 = 95% of Regulation Voltage Current Limit Short Circuit Foldback VOUT8 = 0V 275 % 200 mV 250 mA 410 mA 0.45 x ILIM Internal Soft-Start 100 µs Power Good Flag High Threshold VOUT8, Hysteresis = -1% 89 % Output Noise COUT8 = 10µF, f = 10Hz to 100kHz 40 µVRMS Stable COUT8 1 20 µF c: VNOM refers to the nominal output voltage level for LDO8 as defined by the Ordering Information section. 2: Dropout Voltage is defined as the different voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 32 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) ELECTRICAL CHARACTERISTICS (VCHG_IN = 5V, VBAT = 3.6V, VSET[ ] = [0101], ISET[ ] = [0101], TA = 25°C, unless otherwise specified.) PARAMETER TEST CONDITIONS CHG_IN Operating Range TYP 4.2 UVLO Threshold CHG_IN Voltage Rising UVLO Hysteresis CHG_IN Voltage Falling Battery Termination Voltage Line Regulation MIN 3.75 4 MAX UNIT 6 V 4.25 V 500 4.179 VCHG_IN = 4.5V to 5.5V, IBAT = 10mA 4.200 mV 4.221 0.2 PMOS On Resistance V %/V 0.3 0.5 Ω 500 550 mA Charge Current VBAT = 3.8V VICHG Voltage VVICHG /IBAT Precondition Charge Current VBAT = 2.8V Precondition Threshold Voltage VBAT Voltage Rising Precondition Threshold Hysteresis VBAT Voltage Falling 150 mV End-of-Charge Current Threshold VBAT = 4.1V 50 mA 32 ms 200 mV 450 2.3 mV/mA 35 50 65 mA 2.75 2.9 3.0 V End-of-Charge Qualification Period Charge Restart Threshold VSET[ ] - VBAT, VBAT Falling BATID High Input Voltage VBATID Voltage Rising BATID Low Input Voltage VBATID Voltage Falling 2 V BATID Leakage Current VCHG_IN = 4.5V 1 µA Thermal Regulation Threshold BAT Reserve Leakage Current CHG_IN Supply Current Precondition Timeout Period Total Charging Timeout Period Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. 2.5 V 105 °C SLEEP, SUSPEND, or TIMER-FAULT state 0.4 5 µA VnENCHG > 1.4V 65 100 µA SLEEP, SUSPEND, or TIMER-FAULT state 200 500 µA PRECONDITION, FAST-CHARGE, or TOP-OFF state 0.8 1.2 mA TIMOSET[ ] = [00] 60 TIMOSET[ ] = [01] No timer TIMOSET[ ] = [10] 30 min TIMOSET[ ] = [11] 45 min TIMOSET[ ] = [00] 3.0 hr TIMOSET[ ] = [01] No timer TIMOSET[ ] = [10] 1.5 hr TIMOSET[ ] = [11] 2.2 hr - 33 - min www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) Figure 3: Battery Charger Algorithm Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 34 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) Li+ BATTERY CHARGER REGISTER DESCRIPTIONS Note: See Table 1 for default register settings. Table 8: Battery Charger (CHGR) Control Register Map DATA ADDRESS D7 D6 08h D5 D4 D3 ISET 09h TIMOSET D2 D1 D0 VSET R R BATFLT TIMOFLT R CHGRSTAT VINPOK 0Ah R R R R R R R R 0Bh R R R R R R CHGROK SUSCHG R: Read-Only bits. Default Values May Vary. Table 9: Battery Charger (CHGR) Control Register Bit Descriptions ADDRESS NAME BIT ACCESS FUNCTION DESCRIPTION 08h VSET [2:0] R/W Charge Termination Voltage Selection See Table 11 [3] R 08h READ ONLY 08h ISET [7:4] R/W Maximum Charge Current Selection 09h VINPOK [0] R Input Supply Power-OK 09h CHGRSTAT [1] R Charging Status [2] R 09h TIMOFLT [3] R Timeout Fault 09h BATFLT [4] R Battery Removed Fault [5] R [7:6] R/W [7:0] R 09h TIMOSET 0Ah Input Power is OK 0 Not Charging 1 Charging 0 No Timeout Fault 1 Timeout Fault 0 Battery Not Removed 1 Battery Removed See Table 12 READ ONLY [0] R/W Suspend Charging 0Bh CHGROK [1] R Charge Status [7:2] R ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. 1 Charge Timeout Select SUSCHG Innovative PowerTM Input Power is not OK READ ONLY 0Bh 0Bh 0 READ ONLY 09h 09h See Table 10 0 Charging Enabled 1 Charging Disabled 0 Charging Error Occurred 1 Charging OK READ ONLY - 35 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) Li+ BATTERY CHARGE REGISTER DESCRIPTIONS CONT’D Table 10: Table 11: CHGR Charge Current Settings Charge Termination Voltage Settings CHGR/ISET[3:0] FAST CHARGE CURRENT SETTINGS (mA) CHGR/VSET[3:0] CHARGE TERMINATION VOLTAGE (V) 0000 100 000 4.10 0001 300 001 4.12 0010 350 010 4.14 0011 400 011 4.16 0100 450 (default) 100 4.18 0101 500 101 4.20 (default) 0110 550 110 4.22 0111 600 111 4.24 1000 650 1001 700 1010 750 1011 800 1100 850 1101 900 1110 950 1111 1000 Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 36 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) TYPICAL PERFORMANCE CHARACTERISTICS (COUTx = 1µF X7R, VBAT = VINx = VOUTx + 0.5V, TA = 25°C, unless otherwise specified.) Battery Termination Voltage vs. Temperature 2000 1750 VVICHG (mV) 4.25 ACT5830-014 4.28 VBAT (V) VICHG Voltage vs. IBAT 2250 ACT5830-013 4.31 4.22 4.19 4.16 1500 1250 1000 750 500 4.13 VCHG_IN = 5V VBATID = 2.5V ISET[3:0] = [1111] 250 ISET[3:0] = [1111] 4.10 -40 -20 0 20 40 60 80 100 0 0 120 200 400 Temperature (°C) 800 1000 IBAT (mA) MOSFET Resistance vs. Temperature Precondition Threshold Voltage vs. Temperature VBAT Rising 320 315 RDSON (mΩ) 3.0 ACT5830-016 325 ACT5830-015 3.1 VPRECONDITION (V) 600 2.9 2.8 VBAT Falling 310 305 300 295 290 2.7 285 2.6 -40 280 -20 0 20 40 60 80 100 -40 120 -20 0 20 40 60 80 100 120 Temperature (°C) Temperature (°C) BAT Reverse Leakage Current vs. Temperature ACT5830-017 5 IBAT (µA) 4 3 VCHG_IN = 0V or Floating VBAT = 5V 2 -40 -20 0 20 40 60 80 100 120 Temperature (°C) Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 37 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) FUNCTIONAL DESCRIPTIONS General Description CC/CV Regulation Loop The ACT5830's internal battery charger is an intelligent, stand-alone CC/CV (constantcurrent/constant-voltage), linear-mode single-cell charger for Lithium-based cell-chemistries. This device incorporates current and voltage sense circuitry, an internal power MOSFET, thermalregulation circuitry, a complete state-machine to implement charge safety features, and circuitry that eliminates the reverse-blocking diode required by conventional charger designs. The ACT5830 battery charger operates independently of the regulators, and is automatically enabled whenever a valid input supply is available. At the core of the ACT5830's battery charger is a CC/CV regulation loop, which regulates either current or voltage as necessary to ensure fast and safe charging of the battery. The ACT5830's battery charger features softwareprogrammable fast-charge current, charge termination voltage, charge safety timeout period. Programming the Charge Current (ISET[_]) The ACT5830's battery charger can accept input supplies in the 4.3V to 6V range, making it compatible with lower-voltage inputs such as 5-6V wallcubes and USB ports. The battery charger, along with LDO1, LDO2, and LDO3, is enabled and initiates a charging cycle whenever an input supply is present. Enabling/Disabling the Charger The ACT5830 is enabled when the voltage applied to CHG_IN is greater than the voltage at BAT and is greater than 4.0V, and nENCHG is asserted low. The charger is disabled whenever nENCHG is high, independent of the voltages at battery and CHG_IN. The charger may also be disabled via the I2C interface. In a normal charge cycle, this loop regulates the current to the value set in the CHGR/ISET register. Charging continues at this current until the battery cell voltage reaches the the programmed termination voltage, as defined in the CHGR/VSET register. At this point the CV loop takes over, and charge current is allowed to decrease as necessary to maintain charging at the termination voltage. In order to accommodate both USB and ACpowered inputs with a minimum of external components, the ACT5830 features a I2C-programmable fast-charge current that requires no external current-setting components. The CHGR/ISET register sets ISET to any value greater than [0000] to program the maximum charge current to values in the 300mA to 1A via software. See for a detailed list of programmable charge currents. Note that the actual charging current may be lower than the programmed fast-charge current, due to the ACT5830's thermal regulation loop. See the section for more information. Measuring the Charge Current For more information about enabling and disabling the charger, see the System Startup & Shutdown section. In order to ease monitoring of the charge current, the ACT5830 generates a voltage at VICHG that is proportional to the charge current. The gain is typically 2.47mV/mA, and this voltage can be easily read by a system ADC. VICHG is high-impedance in shutdown. Operation Without a battery Thermal Regulation The ACT5830's charger is designed to operate with or without a battery connected. When a battery is connected, a normal charging cycle is performed as described below. If no battery is present, however, the charger will regulate the voltage at BAT to the voltage programmed by CHGR/VSET[_] to power the system. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. The ACT5830 features an internal thermal feedback loop that reduces the charging current as necessary to ensure that the die temperature does not rise beyond the thermal regulation threshold of 115°C. This feature protects the ACT5830 against excessing JUNCTION temperature, and allows the ACT5830 to be used in aggressive thermal designs without risk of damage. Note that attention to good thermal design is still required to achieve the fastest possible charge time. - 38 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) FUNCTIONAL DESCRIPTIONS CONT’D TOP-OFF State Charge Safety Timer While monitoring the charge cycle, the ACT5830 utilizes a charge safety timer to help identify damaged cells and to ensure that the cell is charged safely. Three timeout options of 60 minutes, 30 minutes, and 45minutes are available, as programmed by the CHGR/TIMOSET register, and a timerdisable option is also available for systems that do not require the ACT5830 to control charge timeouts. The bit assignments for each timeout period are set as follows: Table 12: TIMOSET[ ] Timeout Period Options TIMOSET PRECONDITION TOTAL CHARGING TIMEOUT TIMEOUT [1:0 ] 0 0 60 mins (default) 3.0 hours (default) 0 1 TIMER DISABLED TIMER DISABLED 1 0 30 mins 1.5 hours 1 1 45 mins 2.2 hours In the TOP-OFF state, the cell is charged in constant-voltage (CV) mode. With the charge current limited by the internal chemistry of the cell, decreases as charging continues. During a normal charging cycle charging proceeds until the charge current decreases beyond the End-Of-Charge (EOC) threshold, defined as 10% of ISET. When this happens, the state machine terminates the charge cycle and jumps to the SLEEP state. SLEEP State In SLEEP mode the ACT5830 presents a highimpedance to the battery, allowing the cell to “relax” and minimizing battery leakage current. The ACT5830 continues to monitor the cell voltage, however, so that it can re-initiate charging cycles as necessary to ensure that the cell remains fully charged. Under normal operation, the state machine initiates a new charging cycle by jumping to the FAST-CHARGE state when VBAT drops below the Charge Termination Threshold (programmed by VSET) by more than the Charge Restart Threshold of 200mV (typ). SUSPEND State CHGR State-Machine PRECONDITION State A new charging cycle begins with the PRECONDITION state. In this state, the cell is charged at a reduced current of 10% of ISET, the programmed fast charge current. During a normal charge cycle, charging continues at this rate until VBAT reaches the Precondition Threshold Voltage of 2.9V (typ), at which point the charging state machine jumps to its FAST-CHARGE state. If VBAT does not reach the Precondition Threshold Voltage before the charge timeout period expires, then a damaged cell is detected and the state machine jumps to the TIMEOUT-FAULT State. FAST-CHARGE State In FAST-CHARGE mode, the charger operates in constant-current (CC) mode and charges the cell at the current programmed by CHGR/ISET. During a normal charge cycle fast-charge continues until VBAT reaches the termination voltage programmed by VSET, at which point the state machine jumps to the TOPOFF state. The ACT5830 features a user-selectable suspendcharge mode (SUSCHG), which disables the charger but keeps other circuitry functional. Charging continues in the SUSPEND state until CHGR/SUSPEND is cleared, at which point the charge timer is reset and the state machine jumps to the PRECHARGE state. Suspend charge by setting CHGR/SUSCHG = [1]. Permit charging by clearing CHGR/SUSCHG to [0]. TIMEOUT-FAULT State In order to prevent continued operation with a damaged ce ll, there is no direct path to resume charging once a Timeout Fault occurs. In order to resume charging, the state machine must jump to the SUSPEND state as a result of any of the following events: microprocessor sets CHGR/SUSCHG to [1], microprocessor pulls nENCHG high, the input supply is removed or the input suppl voltage drops below the UVLO threshold (4V), or the battery is removed. Once any of these events Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 39 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 SINGLE-CELL Li+ BATTERY CHARGER (CHGR) FUNCTIONAL DESCRIPTIONS CONT’D occur, the state machine jumps to the SUSPEND state and charging can resume as defined by Figure 4. user can prevent this operation by either: pull nENCHG high, or setting SUSCHG = [1]. NO BAT State The ACT5830 charger has been designed so that it will provide system power when there is no battery present. If the battery is not present at any time while a valid input voltage (>4V) is applied to CHG_IN, the ACT5830 will enable the charger and regulate the output at the voltage programmed by CHGR/VSET[ ], simulating a battery-present condition. The output current of the charger in this state is default to 1000mA to ensure full operation of the phone. When operating in this state, the charge timers are disabled but the thermal regulation loop is active. It is important for the application designer to consider both the power available from the charger as well as the thermal design in order to ensure proper system operation in this state. The If the battery is reconnected while operating in the NO BAT state, the state machine resets the charge timers and jumps to the PRECONDITION state. Reverse Battery The ACT5830 includes internal circuitry that eliminates the need for series blocking diodes, reducing solution size and cost as well as dropout voltage relative to conventional battery chargers. When the input supply is removed, when VIN goes below the ACT5830's under voltage-lockout (UVLO) voltage, or when VIN drops below VBAT, the ACT5830 automatically goes into SUSPEND mode and reconfigures its power switch to minimize current drain from the battery. Figure 4: Charger State Diagram ANY STATE ANY STATE V BATID > 2.5V AND V CHG _IN > UVLO AND CHGR/SUSCHG[ ] = [0] V CHG_IN < V BAT OR V CHG_IN < UVLO OR CHGR/SUSCHG[ ] = [1] LDO-MODE SUSPEND V BA TI D < 2. BATTERY PRESENT AND V CHG_IN > V BAT AND V CHG_IN > UVLO AND CHGR/SUSCHG[ ] = [0] 0V T > TIMOSET[ ] AND V BAT < 2.9V TIMEOUT-FAULT PRECONDITION V BAT > 2.9V Charge Timers Cleared FAST-CHARGE V BAT = VSET[ ] T > TIMOSET[ ] TOP-OFF Charge Timers not Cleared or I BAT > ISET[ ]/10 I BAT < ISET[ ]/10 or T > TIMOSET[ ] DELAY T > 32ms SLEEP V BAT < VSET[ ] – 200mV Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 40 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT5830 Rev PrB, 05-Mar-08 PACKAGE OUTLINE AND DIMENSIONS PACKAGE OUTLINE TQFN55-40 PACKAGE OUTLINE AND DIMENSIONS D D/2 SYMBOL E/2 MAX MIN MAX A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.000 0.002 0.200 REF 0.008 REF b 0.150 0.250 0.006 0.010 D 4.900 5.100 0.193 0.201 E 4.900 5.100 0.193 0.201 D2 3.450 3.750 0.136 0.148 E2 3.450 3.750 0.136 0.148 e L A DIMENSION IN INCHES MIN A3 E DIMENSION IN MILLIMETERS R 0.400 BSC 0.300 0.500 0.300 0.016 BSC 0.012 0.020 0.012 A1 A3 D2 L b e E2 R Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. I2CTM is a trademark of Philips Electronics. - 41 - www.active-semi.com Copyright © 2008 Active-Semi, Inc.