ACT8332 Rev0, 14-Mar-08 Three Channel Integrated Power Management IC for Handheld Portable Equipment FEATURES GENERAL DESCRIPTION • Multiple Patents Pending • Three Integrated Regulators The patent-pending ACT8332 is a complete, cost effective, highly-efficient ActivePMUTM power management solution that is ideal for a wide range of portable handheld equipment. This device integrates one PWM step-down DC/DC converter and two low noise, low dropout linear regulators (LDOs) in a single, thin, space-saving package. This device is ideal for a wide range of portable handheld equipment that can benefit from the advantages of ActivePMU technology but does not require a high level of integration. − 350mA PWM Step-Down DC/DC − 360mA Low Noise LDO − 360mA Low Noise LDO • Independent Enable/Disable Control • Minimal External Components • 3×3mm, Thin-DFN (TDFN33-10) Package − Only 0.75mm Height − RoHS Compliant REG1 is a fixed-frequency, current-mode PWM step-down DC/DC converter that is optimized for high efficiency and is capable of supplying up to 350mA output current. REG1’s output is available in a variety of factory-preset output voltage options, and an adjustable output voltage mode is also available. REG2, REG3 are low noise, high PSRR linear regulators that are capable of supplying up to 360mA, and 360mA, respectively. APPLICATIONS • Portable Devices and PDAs • MP3/MP4 Players • Wireless Handhelds • GPS Receivers, etc. The ACT8332 is available in a tiny 3mm × 3mm 10-pin Thin-DFN package that is just 0.75mm thin. SYSTEM BLOCK DIAGRAM REG1 Step-Down DC/DC Battery ON1 ON3 System Control REG2 LDO REG3 ACT8332 PMU LDO TM Active Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. -1- OUT1 Adjustable, or 1.2V to 3.3V Up to 350mA OUT2 1.4V to 3.7V Up to 360mA Pb Pb-free OUT3 1.4V to 3.7V Up to 360mA www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 FUNCTIONAL BLOCK DIAGRAM Active-Semi VP1 To Battery ACT8332 ON1 REG1 UVLO ON3 SW1 FB1 GP1 INL GA Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. OUT1 To Battery or OUT1 REG2 LDO OUT2 REG3 LDO OUT3 -2- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 ORDERING INFORMATIONcd PART NUMBER VOUT1 VOUT2 VOUT3 PACKAGE PINS TEMPERATURE RANGE ACT8332NDAQB-T Adjustable 2.85V 2.5V TDFN33-10 10 -40°C to +85°C REG1 OUTPUT VOLTAGE CODES A C P J D E F I Q G H Adjustable 1.2V 1.3V 1.4V 1.5V 1.8V 2.5V 2.8V 2.85V 3.0V 3.3V REG2 OUTPUT VOLTAGE CODES J D L E F I Q G H 1.4V 1.5V 1.7V 1.8V 2.5V 2.8V 2.85V 3.0V 3.3V REG3 OUTPUT VOLTAGE CODES E G K M B H I L R 1.4V 1.5V 1.7V 1.8V 2.5V 2.8V 2.85V 3.0V 3.3V c: Output voltage options detailed in this table represent standard voltage options, and are available for samples or production orders. Additional output voltage options, as detailed in the Output Voltage Codes table, are available for production subject to minimum order quantities. Contact Active-Semi for more information regarding semi-custom output voltage combinations. d: All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS (Restriction of Hazardous Substances) standards. PIN CONFIGURATION TOP VIEW VP1 1 10 FB1 SW1 2 9 ON3 GP1 3 8 ON1 OUT2 4 7 GA INL 5 6 OUT3 Active-Semi ACT8332 Thin - DFN (TDFN 33-10) Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. -3- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 PIN DESCRIPTIONS PIN NAME DESCRIPTION 1 VP1 Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as possible to the IC. 2 SW1 Switching node Output for REG1. Connect this pin to the switching end of the inductor. 3 GP1 Power Ground for REG1. Connect GA, GP1 together at a single point as close to the IC as possible. 4 OUT2 Output voltage for REG2. Capable of delivering up to 360mA of output current. Output has high impedance when disabled. 5 INL 6 OUT3 7 GA 8 ON1 Enable control input for REG1, REG2. Drive ON1 to the VP1 or a logic high for normal operation, drive to GA or a logic low to disable REG1, REG2 9 ON3 Enable control input for REG3. Drive ON3 to the INL or a logic high for normal operation, drive to GA or a logic low to disable REG3 10 FB1 Output Feedback Sense. For fixed output voltage options REG1, connect this pin directly to the output node to connect the internal feedback network to the output voltage. For adjustable output voltage Options REG1. The voltage at this pin is regulated to 0.625V. Connect this pin to the center point of the output voltage feedback network between OUT1 and GA to set the output voltage. EP EP Exposed Pad. Must be soldered to ground on PCB Power input for REG2, REG3. Bypass to GA with a high quality ceramic capacitor placed as close as possible to the IC. Output voltage for REG3. Capable of delivering up to 360mA of output current. Output has high impedance when disabled. Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1 together at a single point as close to the IC as possible. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. -4- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 ABSOLUTE MAXIMUM RATINGSc PARAMETER VALUE UNIT SW1 to GP1, INL, VP1, FB1, OUT2, OUT3, ON1, ON3 to GA -0.3 to +6 V SW1 to VP1 -6 to +0.3 V -0.3 to +0.3 V 33 °C/W -40 to 85 °C Junction Temperature 125 °C Storage Temperature -55 to 150 °C 300 °C GP1 to GA Junction to Ambient Thermal Resistance (θJA) Operating Temperature Range Lead Temperature (Soldering, 10 sec) c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may affect device reliability. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. -5- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 STEP-DOWN DC/DC CONVERTER ELECTRICAL CHARACTERISTICS (REG1) (VVP1 = 3.6V, TA = 25°C, unless otherwise specified.) PARAMETER TEST CONDITIONS VP1 Operating Voltage Range MIN 3.1 VP1 UVLO Threshold Input Voltage Rising VP1 UVLO Hysteresis Input Voltage Falling 2.9 ON1 = GA, VVP1 = 4.2V Adjustable Output Option Regulation Voltage Output Voltage Regulation Accuracy UNIT 5.5 V 3.1 V mV 130 200 µA 0.1 1 µA 0.625 V VNOM1 < 1.3V, IOUT1 = 10mA -2.4% VNOM1c +1.8% VNOM1 ≥ 1.3V, IOUT1 = 10mA -1.2% VNOM1 +1.8% Line Regulation VVP1 = Max(VNOM1 + 1V, 3.2V) to 5.5V Load Regulation IOUT1 = 10mA to 350mA Current Limit Oscillator Frequency 3 MAX 90 Standby Supply Current Shutdown Supply Current TYP VOUT1 ≥ 20% of VNOM1 0.15 %/V 0.0017 %/mA 0.45 0.6 A 1.35 1.6 VOUT1 = 0V 1.85 530 ON1 Logic High Input Voltage VINL = 3.1V to 5.5V, VVP1 = 3.1V to 5.5V, TA = -40°C to 85°C ON1 Logic Low Input Voltage VINL = 3.1V to 5.5V, VVP1 = 3.1V to 5.5V, TA = -40°C to 85°C PMOS On-Resistance ISW1 = -100mA NMOS On-Resistance ISW1 = 100mA SW1 Leakage Current VVP1 = 5.5V, VSW1 = 5.5V or 0V V MHz kHz 1.4 V 0.4 V 0.52 0.88 Ω 0.27 0.46 Ω 1 µA Power Good Threshold 94 %VNOM1 Minimum On-Time 70 ns Thermal Shutdown Temperature Temperature Rising 160 °C Thermal Shutdown Hysteresis Temperature Falling 20 °C c: VNOM1 refers to the nominal output voltage level for VOUT1 as defined by the Ordering Information section. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. -6- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 STEP-DOWN DC/DC CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (ACT8332NDAQB, VVP1 = 3.6V, L = 3.3µH, CVP1 = 2.2µF, COUT1 = 10µF, TA = 25°C, unless otherwise specified.) REG1 Efficiency vs. Load Current REG1 Transient Peak Inductor Current Efficiency (%) 90 3.6V 80 650 4.2V Peak Inductor Current (mA) 3.2V 70 60 ACT8332-002 VOUT1 = 1.8V ACT8332-001 100 630 610 590 570 550 50 0.1 1 10 100 3.0 1000 3.5 4.0 Output Current (mA) REG1 MOSFET Resistance Load Regulation Error (%) RDSON (mΩ) 400 NMOS 200 100 0 0.0 -0.2 4.0 4.5 5.0 3.6V 4.2V -0.4 -0.6 -0.8 -1.0 3.5 ACT8332-004 0.2 ACT8332-003 PMOS 3.0 5.5 REG1 Load Regulation 500 2.5 5.0 VP1 Voltage (V) 600 300 4.5 5.5 0 50 100 150 200 250 300 350 400 Output Current (mA) VP1 Voltage (V) OUT1 Regulation Voltage ACT8332-005 1.812 IOUT1 = 35mA OUT1 Voltage (V) 1.808 1.804 1.800 1.796 1.792 1.788 -40 -20 0 20 40 60 85 Temperature (°C) Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. -7- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 STEP-DOWN DC/DC CONVERTER FUNCTIONAL DESCRIPTION General Description Input Capacitor Selection REG1 is a fixed-frequency, current-mode, synchronous PWM step-down converters that achieves a peak efficiency of up to 97%. REG1 is capable of supplying up to 350mA of output current and operates with a fixed frequency of 1.6MHz, minimizing noise in sensitive applications and allowing the use of small external components. REG1 is available with a variety of standard and custom output voltages, as well as an adjustable output voltage option. The input capacitor reduces peak currents and noise induced upon the voltage source. A 2.2µF ceramic input capacitor is recommended for most applications. Output Capacitor Selection For most applications, a 10µF ceramic output capacitor is recommended. Although REG1 was designed to take advantage of the benefits of ceramic capacitors, namely small size and very-low ESR, low-ESR tantalum capacitors can provide acceptable results as well. 100% Duty Cycle Operation REG1 is capable of operating at up to 100% duty cycle. During 100% duty-cycle operation, the high-side power MOSFET is held on continuously, providing a direct connection from the input to the output (through the inductor), ensuring the lowest possible dropout voltage in battery-powered applications. Inductor Selection REG1 utilizes current-mode control and a proprietary internal compensation scheme to simultaneously simplify external component selection and optimize transient performance over its full operating range. REG1 was optimized for operation with a 3.3µH inductor, although inductors in the 2.2µH to 4.7µH range can be used. Choose an inductor with a low DC-resistance, and avoid inductor saturation by choosing inductors with DC ratings that exceed the maximum output current of the application by at least 30%. Synchronous Rectification REG1 features an integrated n-channel synchronous rectifier, which maximizes efficiency and minimizes the total solution size and cost by eliminating the need for an external rectifier. Enabling and Disabling REG1 Thermal Shutdown REG1 is enabled or disabled using ON1. Drive ON1 to a logic-high to enable REG1. Drive ON1 to a logic-low to disable REG1, reducing supply current to less than 1µA The ACT8332 integrates thermal shutdown protection circuitry to prevent damage resulting from excessive thermal stress, as may be encountered under fault conditions. This circuitry disables all regulators if the ACT8332 die temperature exceeds 160°C, and prevents the regulators from being enabled until the IC temperature drops by 20°C (typ). Soft-Start REG1 includes internal soft-start circuitry, and enabled its output voltage tracks an internal 80µs softstart ramp so that it powers up in a monotonic manner that is independent of loading. Output Voltage Programming Figure 4 shows the feedback network necessary to set the output voltage when using the adjustable output voltage option. Select components as follows: Set RFB2 = 51KΩ, then calculate RFB1 using the following equation: Compensation REG1 utilizes current-mode control and a proprietary internal compensation scheme to simultaneously simplify external component selection and optimize transient performance over its full operating range. No compensation design is required, simply follow a few simple guidelines described below when choosing external components. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. ⎛V ⎞ RFB1 = RFB2 ⎜⎜ OUT1 − 1 ⎟⎟ ⎝ VFB1 ⎠ (1) Where VFB1 is 0.625V -8- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 STEP-DOWN DC/DC CONVERTER Figure 4: Output Voltage Programming OUT1 ACT8332 CFF RFB1 FB RFB2 Finally choose CFF using the following equation: C FF = 2.2 × 10 −6 R FB1 (2) where RFB1 = 47kΩ, use 47pF. PCB Layout Considerations High switching frequencies and large peak currents make PC board layout an important part of stepdown DC/DC converter design. A good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. Step-down DC/DCs exhibit discontinuous input current, so the input capacitors should be placed as close as possible to the IC, and avoiding the use of vias if possible. The inductor, input filter capacitor, and output filter capacitor should be connected as close together as possible, with short, direct, and wide traces. The ground nodes for each regulator's power loops should be connected at a single point in a starground configuration, and this point should be connected to the backside ground plane with multiple vias. For fixed output voltage options, connect the output node directly to the FB1 pin. For adjustable output voltage options, connect the feedback resistors and feed-forward capacitor to the FB1 pin through the shortest possible route. In both cases, the feedback path should be routed to maintain sufficient distance from switching nodes to prevent noise injection. Finally, the exposed pad should be directly connected to the backside ground plane using multiple vias to achieve low electrical and thermal resistance. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. -9- www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 LOW-DROPOUT LINEAR REGULATORS ELECTRICAL CHARACTERISTICS (REG2, REG3) (VINL = 3.6V, COUT = 1µF, TA = 25°C, unless otherwise specified.) PARAMETER TEST CONDITIONS INL Operating Voltage Range VINL Input Rising UVLO Hysteresis VINL Input Falling 2.9 V 3.1 V V VNOM1 +2 TA = -40°C to 85°C -2.5 VNOM +3 IOUT = 1mA to 360mA mV -0.004 %/mA 70 f = 10kHz, IOUT = 360mA, COUT = 1µF 60 REG2 or REG3 Enabled 85 REG2 and REG3 Enabled 125 REG2 and REG3 Disabled 1.5 ON1, ON3 Logic Low Input Voltage VINL = 3.1V to 5.5V, TA = -40°C to 85°C Dropout Voltage IOUT = 160mA, VOUT > 3.1V dB µA 1.4 V 100 Output Current VOUT = 95% of regulation voltage 0.4 V 200 mV 360 mA 400 Internal Soft-Start % 0 f = 1kHz, IOUT = 360mA, COUT = 1µF ON1, ON3 Logic High Input Voltage VINL = 3.1V to 5.5V, TA = -40°C to 85°C Current Limite 5.5 -1.2 Load Regulation Error 2 UNIT TA = 25°C VINL = Max(VOUT + 0.5V, 3.6V) to 5.5V Supply Current 3 MAX 0.1 Line Regulation Error Power Supply Rejection Ratio TYP 3.1 INL UVLO Threshold Output Voltage Accuracy MIN mA 100 µs Power Good Flag High Threshold VOUT, hysteresis = -4% 89 % Output Noise COUT = 10µF, f = 10Hz to 100kHz 40 µVRMS Stable COUT Range 1 20 µF Discharge Resistor in Shutdown LDO Disabled 1000 Ω Thermal Shutdown Temperature Temperature Rising 160 °C Thermal Shutdown Hysteresis Temperature Falling 20 °C c: VNOM refers to the nominal output voltage level for VOUT2 or VOUT3 as defined by the Ordering Information section. d: Dropout Voltage is defined as the differential voltage between input and output when the output voltage drops 100mV below the regulation voltage at 1V differential voltage. e: LDO current limit is defined as the output current at which the output voltage drops to 95% of the respective regulation voltage. Under heavy overload conditions the output current limit folds back by 30% (typ) Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. - 10 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 LOW-DROPOUT LINEAR REGULATORS TYPICAL PERFORMANCE CHARACTERISTICS (ACT8332NDAQB, VINL = 5V, TA = 25°C, unless otherwise specified.) Load Regulation Dropout Voltage vs. Output Current 0.3 0.2 Dropout Voltage (mV) Output Voltage (%) 0.4 0.1 0.0 -0.1 -0.2 -0.3 200 175 150 100 75 50 0 25 0 50 75 100 125 150 175 200 225 250 300 360 0 50 100 150 200 250 Load Current (mA) Output Current (mA) Output Voltage Deviation vs. Temperature LDO Output Voltage Noise ILOAD = 0mA 0.3 0.2 300 360 ACT8332-009 ACT8332-008 Output Voltage Deviation (%) 3.1V 3.3V 3.6V 25 -0.5 0.4 REG2, REG3 125 -0.4 0.5 ACT8332-007 225 ACT8332-006 0.5 0.1 CH1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 -40 -15 10 35 CH1: VOUTx, 200µV/div (AC COUPLED) TIME: 200ms/div 85 60 Temperature (°C) Region of Stable COUT ESR vs. Output Current ACT8332-010 ESR (Ω) 1 0.1 Stable ESR 0.01 0 50 100 150 200 250 300 360 Output Current (mA) Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. - 11 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 LOW-DROPOUT LINEAR REGULATORS FUNCTIONAL DESCRIPTION General Description REG2 and REG3 are low-noise, low-dropout linear regulators (LDOs) that are optimized for low-noise and high-PSRR operation, achieving more than 60dB PSRR at frequencies up to 10kHz. A good design places input and output capacitors as close to the LDO inputs and output as possible, and utilizes a star-ground configuration for all regulators to prevent noise-coupling through ground. Output traces should be routed to avoid close proximity to noisy nodes, particularly the SW nodes of the DC/DCs. Output Current Capability REG2 and REG3 each supply 360mA of load current. Excellent performance is achieved over each regulator's entire load current ranges. Output Current Limit In order to ensure safe operation under over-load conditions, each LDO features current-limit circuitry with current fold-back. The current-limit circuitry limits the current that can be drawn from the output, providing protection in over-load conditions. For additional protection under extreme over current conditions, current-fold-back protection reduces the current-limit by approximately 30% under extreme overload conditions. Enabling and Disabling the LDOs REG2 and REG3 is enabled or disabled using ON1 and ON3. Drive ON1 and ON3 to a logic-high to enable REG2 and REG3. Drive ON1 and ON3 to a logic-low to disable REG2 and REG3, reducing supply current to less than 1µA. Output Capacitor Selection REG2 and REG3 each require only a small ceramic capacitor for stability. For best performance, each output capacitor should be connected directly between the OUT2 and OUT3 and G pins as possible, with a short and direct connection. To ensure best performance for the device, the output capacitor should have a minimum capacitance of 1µF, and ESR value between 10mΩ and 200mΩ. High quality ceramic capacitors such as X7R and X5R dielectric types are strongly recommended. PCB Layout Considerations The ACT8332’s LDOs provide good DC, AC, and noise performance over a wide range of operating conditions, and are relatively insensitive to layout considerations. When designing a PCB, however, careful layout is necessary to prevent other circuitry from degrading LDO performance. Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. - 12 - www.active-semi.com Copyright © 2008 Active-Semi, Inc. ACT8332 Rev0, 14-Mar-08 PACKAGE INFORMATION PACKAGE OUTLINE TDFN33-10 PACKAGE OUTLINE AND DIMENSIONS D SYMBOL E A3 A A1 D2 DIMENSION IN MILLIMETERS DIMENSION IN INCHES MIN MAX MIN MAX A 0.700 0.800 0.028 0.031 A1 0.000 0.050 0.0000 0.002 A3 0.153 0.253 0.006 0.010 D 2.900 3.100 0.114 0.122 E 2.900 3.100 0.114 0.122 D2 2.350 2.450 0.093 0.096 E2 1.650 1.750 0.065 0.069 b 0.200 0.320 0.008 0.012 e L 0.500 TYP 0.300 0.500 0.020 TYP 0.012 0.020 E2 L e b Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use as critical components in lifesupport devices or systems. Active-Semi, Inc. does not assume any liability arising out of the use of any product or circuit described in this datasheet, nor does it convey any patent license. Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact email@example.com or visit http://www.active-semi.com. For other inquiries, please send to: 1270 Oakmead Parkway, Suite 310, Sunnyvale, California 94085-4044, USA Innovative PowerTM ActivePMUTM is a trademark of Active-Semi. - 13 - www.active-semi.com Copyright © 2008 Active-Semi, Inc.