A1442 Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection Features and Benefits Description ▪ ▪ ▪ ▪ The A1442 is a full-bridge motor driver designed to drive low-voltage, brushless dc motors. Commutation of the motor is achieved by use of a single Hall element sensor to detect the rotational position of an alternating-pole ring magnet. A highdensity CMOS semiconductor process allows the integration of all the necessary electronics. This includes the Hall element sensor, the motor control circuitry, and the full output bridge. Low-voltage design techniques have been employed to achieve full device functionality down to low VDD values. This fully integrated single chip solution provides enhanced reliability (including reverse battery protection and output short circuit protection) and eliminates the need for any external support components. ▪ ▪ ▪ ▪ ▪ ▪ ▪ Low voltage operation ¯¯L ¯¯E ¯¯E ¯¯ Reverse voltage protection on VDD and S P pins Output short circuit and thermal shutdown protections Soft switching algorithm to reduce audible switching noise and EMI interference Unidirectional working mode provides motor rotation in one direction Hall chopper stabilization technique for precise signal response over operating range Sleep mode pin allowing external logic signal enable/ disable to reduce average power consumption Antistall feature guarantees continuous rotation Low current consumption sleep mode Single-chip solution for high reliability Miniature MLP/DFN package Package: 6 pin MLP/DFN (suffix EW) 1.5 mm × 2 mm, 0.40 mm maximum overall height The A1442 employs a soft-switching algorithm to reduce audible switching noise and EMI interference. A micropower sleep mode can be enabled by an external signal, to reduce current consumption for battery management in portable electronic devices. This feature allows the removal of a FET transistor for switching the device on and off. The A1442 is optimized for vibration motor applications in cellular phones, pagers, electronic toothbrushes, hand-held video game controllers, and low power fan motors. The small package outline and low profile make this device ideally suited for use in applications where printed circuit board area and component headroom are at a premium. It is available in a lead (Pb) free, 6 pin MLP/DFN microleadframe package, with an exposed pad for enhanced thermal dissipation. Approximate scale Functional Block Diagram VDD Output Full Bridge Reverse Battery SLEEP 0.1 μF Power and Sleep Mode Control Active Braking Control Stall Detection Hall Element Q1 Q3 Drive Logic and Soft Start Control VOUT1 VOUT2 Q2 Amp M Q4 Thermal Shutdown Protection GND A1442-DSS Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection A1442 Selection Guide Part Number A1442EEWLT-P Package* Packing MLP/DFN 1.5 mm × 2 mm, 0.4 mm maximum overall height 3000 pieces / 7 in. reel *Contact Allegro for additional packing options Absolute Maximum Ratings Characteristic Symbol Forward Supply Voltage VDD Notes Reverse Supply Voltage VRDD Output Voltage VOUT VDD > 0 V Reverse Output Voltage VROUT VDD > 0 V ¯S¯¯L¯¯E¯¯E¯¯P¯ Input Voltage VIN Peak Output Current IOUTpk Operating Ambient Temperature Units 5.0 V –5.0 V 0 to VDD + 0.3 V –0.3 V 0 to VDD + 0.3 V ±400 mA < 1 ms TA Rating –40 to 85 ºC Junction Temperature TJ(max) 165 ºC StorageTemperature Tstg –65 to 165 ºC Pin-out Diagram Range E Terminal List Table Pin VDD 1 SLEEP 2 NC 3 6 VOUT2 PAD 5 VOUT1 4 GND Name 1 VDD 2 ¯S¯¯L¯¯E¯¯E¯¯P¯ 3 NC Function Supply voltage Toggle sleep/enabled modes No connection 4 GND 5 VOUT1 Ground First output 6 VOUT2 Second output Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection A1442 OPERATING CHARACTERISTICS valid over the full VDD and TA range unless otherwise noted Characteristic Symbol Supply Voltage1 VDD Supply Current IDD(ON) Total Output On Resistance2,3 RDS(on) Reverse Battery Current Sleep Input Threshold IRDD Test Conditions Min. Typ. Max. Units 2.0 – 4.2 V VIN >VINHI, , TA = 25°C, no load – 4 6 mA VIN < VINLO , TA = 25°C – – 10 μA VDD = 2 V, IOUT = 70 mA, TA = 25°C – 3.9 – Ω VDD = 3 V, IOUT = 70 mA, TA = 25°C – 2.6 – Ω VDD = 4 V, IOUT = 70 mA, TA = 25°C – 2.2 – Ω VRDD = –4.2 V – – –10 mA Operating, TJ < TJ(max); CBYP = 0.1 μF VINHI 0.7×VDD – VINLO – – V 0.2×VDD V Sleep Input Current IIN VIN = 3.0 V – 1.0 5 μA Reverse Sleep Current IRIN VRIN = –4.2 V – – –10 mA tRS – 120 – ms tS(CHOP) – 80 – μs Restart Delay4 Hall Chopping Settling Time Magnetic Switchpoints2 BOP – 35 75 G BRP –75 -35 – G BHYS – 70 – G B < BRP – LOW – V B > BOP – HIGH – V B < BRP – HIGH – V B > BOP – LOW – 1 A bypass capacitor of 0.1 μF is required between VDD and GND for proper device operation through the full specified voltage range. V VOUT1 Output Polarity VOUT2 2 Extended V DD range affects RDS(on) and Bx. 3 Total On Resistance equals either R Q1 + R DS(on) DS(on)Q4 or RDS(on)Q2 + RDS(on)Q3. 4 The Restart Delay is the time the outputs are on or off when the device is attempting a restart. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 A1442 Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection Functional Description Soft Switching The A1442 device includes a soft-switching algorithm that controls the output switching slew rate for both output pins. As a result the A1442 device is ideal for use in applications requiring low audible switching noise and low EMI interference. ¯¯L ¯¯E ¯¯E ¯¯P pin accepts an external signal that Sleep Mode The S enables sleep mode. In sleep mode, the current consumption is reduced to an extremely low level, conserving battery power in portable electronics. Antistall Algorithm If a stall condition occurs, the device will execute an antistall algorithm. Device Start-up The start-up behavior of the device output is determined by the applied magnetic field, as specified in the Operating Characteristics table. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 4 Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection A1442 Application Information Two typical application circuits are shown in figures 4 and 5. The ¯¯L ¯¯E ¯¯E ¯¯P pin controlled first application circuit shows the device S by the user. Figure 5 illustrates an application circuit where the ¯¯L ¯¯E ¯¯ ¯¯P pin are connected together. device VDD and S E A bypass capacitor of 0.1 μF is required between VDD and GND for proper device operation through the full specified supply voltage range. Note that: • No external diode is required for reverse battery protection because the protection is fully integrated into the IC. • Thermal shutdown is integrated also. VBATT + VDD System Logic Control CBYP VOUT1 A1442 SLEEP I/O VOUT2 M NC GND Figure 4. Application circuit showing user-controlled sleep/enable mode, while the A1442 remains powered at all times + VBATT VDD System Logic Control VOUT1 A1442 SLEEP I/O VOUT2 CBYP M NC GND Figure 4. Application circuit showing simultaneous user control of power supply and sleep mode. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 A1442 Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection Power Derating The device must be operated below the maximum junction temperature of the device, TJ(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating TJ. (Thermal data is also available on the Allegro MicroSystems Web site.) The package thermal resistance, RθJA, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the effective thermal conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, RθJC, is relatively small component of RθJA. Ambient air temperature, TA, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (power dissipation, PD) can be estimated. The following formulas represent the fundamental relationships used to estimate TJ at given levels of PD. Given: PD = VIN × IIN , (1) ΔT = PD × RθJA , and (2) TJ = TA + ΔT (3) For a load of 30 Ω, given common conditions such as: TA= 25°C, VDD = 3 V, IDD = 83 mA, VL = 2.43 V, IL = 81 mA and RθJA = 250 °C/W, then: PD = VDD × IDD – VLIL = 3 V × 83 mA – 2.43 V × 81 mA = 52.17 mW , ΔT = PD × RθJA = 52.17 mW × 250 °C/W = 13°C , and TJ = TA + ΔT = 25°C + 13°C = 38°C A worst-case estimate, PD(max), represents the maximum allowable power level, without exceeding TJ(max), at a selected RθJA and TA. VBATT + IDD IL VDD System Logic Control CBYP 0.1 μF I/O VOUT1 A1442 SLEEP VOUT2 M NC GND Figure 4. Typical application showing current paths Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 6 Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection A1442 Package EW, 6 pin MLP/DFN 1.50 E D 0.892 [.0351] 0.15 6 0.50 0.30 6 E 0.993 [.0391] 2.00 E 0.70 1.575 A 1 1 0.325 1.10 SEATING PLANE C PCB Layout Reference View 0.38 0.50 0.25 1 0.70 B 0.325 6 1.10 All dimensions nominal, not for tooling use (similar to JEDEC Type 1, MO-229”X2”BCD) Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown 1.25 A Terminal #1 mark area B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) C Reference land pattern layout (reference IPC7351 SON50P200X200X100-9M); All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances; when mounting on a multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5) D Active Area Depth E Hall element (not to scale); for location dimensions, U.S. Customary (in.) controlling, in brackets, metric dimensions (mm) for reference only Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 7 Low Voltage Full Bridge Brushless DC Motor Driver with Hall Commutation and Soft-Switching, and Reverse Battery, Short Circuit, and Thermal Shutdown Protection A1442 Packing Information P1 Round Sprocket Holes P0 Cover Tape T T1 ØD0 E1 P2 Pin #1 F W WC Carrier Tape Reel Label • • • • ⇒Unreel Direction ⇒ Embossed tape and reel 3000 pieces per 7 in. reel 40 min. trailer pockets 40 min. leader pockets B0 • Terminals inward • Pin 1 on leading device edge, sprocket hole side ØD1 A0 K0 Dimensions in mm, may vary with supplier Leader pockets are the first off the reel when the tape is unreeled for dispensing devices. Trailer pockets are the last pockets off the reel when unreeled for dispensing devices. ØN W1 W2 ØD ØC Carrier Tape D0: 1.50 P0: 4.00 P1: 4.00 P2: 2.00 W: 8.00 E1: 1.75 F: 3.5 T: 0.30 Cover Tape A0: 1.80 B0: 2.37 K0: 0.70 D1: 0.90 WC: 5.4 T1: 0.062 1. Pocket centerlines to cavity center, not to pocket detection hole. 2. A0 and B0 measured 0.3 mm above bottom of pocket. 3. Reference EIA 481. ØA B See Detail A Detail A Access hole and hub configuration may vary at supplier discretion within limits shown Cavity Centerline 20°Max Device Centerline Dimensions in mm, may vary with supplier Type A N B C D Plastic 7 in. 180 50 1.5 13 20 W1 (inside, at Hub) W2 (outside, at Hub) 8.4 14.4 Reference EIA 481 B0 20°Max Side or Front View A0 0.5 mm Max 0.5 mm Max Reference EIA 481 Copyright ©2006, 2007, Allegro MicroSystems, Inc. The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 8