AME ATPA02 K8 Timing Controller n General Description n Features l Provides a Complete Power Sequence The ATPA02G is a power sequence controller for AMD K8 processor. This part can mainly control the power supply relationships during power up, power down, entry and exit of any power management state in order to avoid damage to the device and ensure proper operation of the device. Controller l Supports DDR ACPI-STR Functions l Under-Voltage Fault Monitor l Package: SOP-16 l Green Package l All AME's Lead Free Products Meet RoHS Standards n Application l Motherboard l Desktop system n Pin Configuration Rev.A.03 VDD _GD 1 16 5VSB VLDT _SEN 2 15 VLDT_EN VDDA _SEN 3 14 VDDA _EN VDIMM _SEN 4 13 VDD_EN SB_PSON # 5 12 VDIMM _EN ACPI_S3 6 11 CPU_PWRGD ATX _PWRGD 7 10 RST_BTN # GND 8 9 ATX _PSON# 1 AME ATPA02 K8 Timing Controller n Function Block Diagram VDD _ GD VLDT _ SEN Detector VDDA _ SEN Detector VDIMM _WEN Detector Delay Logic PWR _ Sequence ATX_ PWRGD PWRGD ACPI _S3 SB _ PSON # Delay Logic Logic ATX_ PSON# RST _BTN# 2 Rev.A.03 AME ATPA02 K8 Timing Controller n Application Circuit 5VSB VDD Power_VDD Block VDD VDD_GD EN GND 5VSB VDIMM_SEN Power_VDIMM_SEN Block VDIMM_SEN VDDA_SEN 10u VDIMM_SEN VLDT_SEN EN GND VDDA_SEN 5VSB Power_VDDA_SEN Block VDDA_SEN VDD_EN VDD_GD VLDT_SEN VDIMM_EN EN GND VLDT_SEN Power_VLDT Block VDDA_SEN VDDA_EN VLDT_SEN VDIMM_SEN VLDT_EN EN 5VSB GND + 2.5V ATPA02 Enhanced K8 Power Sequence Controller K8 ATX Power ATX_PSON# PSON# ATX_PWRGD PWRGD CPU_PWRGD CPU_PWRGD 5VSB VCC5 South Bridge SB_PWRGD SB_PSON# SB_PSON# Rev.A.03 ACPI_S3 GND RST_BTN# ACPI_S3 1u 3 AME ATPA02 K8 Timing Controller n Pin Description Function IN t TTL level input IN a Analog input OD 70 Open-drain with 70mA sink current Pin No. Pin Name I/O Type Function 1 VDD_GD INt Active-High of this signal indicates VDD voltage is valid. This signal is usually connected to the power-good output of the PWM for CPU core voltage 2 VLDT_SEN INa This pin is used to detect the ClawHammer VLDT (1.2V) power or power-good signal. 3 VDDA_SEN INa This pin is used to detect the ClawHammer VDDA (2.5V) power or power-good signal. 4 VDIMM_SEN INa This pin is used to detect the VDIMM (2.5V/1.8V) power or power-good signal. 5 SB_PSON# INt Active low. This signal is connected to the PSON# signal from the SB or Super I/O to control the on/off of ATX power supply. 6 ACPI_S3 INt Active high. This signal indicates that the system is in S3 state. 7 ATX_PWRGD INt Active-High of this signal indicates all of the voltage from the ATX power supply is valid. 8 GND Ground 9 ATX_PSON# OD70 10 RST_BTN# INt 11 4 I/O Type CPU_PWRGD OD70 Active low. This pin is used to control the on/off of ATX power supply. Active-Low of this signal will turn on the ATX power supply. This pin is open-drain output and should be pulled-up via a resistor to 5VSB externally. Active low. This function is panel reset botton input with de-bounce circuit. Active high. This signal is connected to the Claw Hammer to indicate all system powers are valid. This pin is opendrain output and should be pulled-up externally via a resistor to 2.5V. Rev.A.03 AME ATPA02 K8 Timing Controller n Pin Description (Contd.) Pin No. Pin Name I/O Type Function 12 VDIMM_EN OD70 Active high. This pin is used to enable the function of the PWM for VDIMM voltage generation. 13 VDD_EN OD70 Active high. This pin is used to enable the function of the PWM for VDD voltage generation. 14 VDDA_EN OD70 Active high. This pin is used to enable the function of the VDDA power for ClawHammer. 15 VLDT_EN OD70 Active high. This pin is used to enable the function of the VLDT power for ClawHammer. 16 5VSB Power n Ordering Information Part Number Marking Package Operating Ambient Temperature Range ATPA02G ATPA02G yyww AB xxxxxxx ## SOP-16 - 30oC to +85oC Note: yy:year (last two digits) ww:week xxxxxxx:wafer lot number ##:wafer number (It is a representative if a string of wafer are used.) Rev.A.03 5 AME ATPA02 K8 Timing Controller n Time Sequence Enter S3 Power on t0 t1 t2 t3 t4 t5 t11 t6 t7 t8 t9 Exit S3 t0 t1 t3 t4 t5 Power off t11 t6 t7 t8 t9 t10 ACPI_S3 SB_PSON# ATX_PSON# ATX_PWRGD VDIMM_EN VDDA_EN VDD_EN VDD_GD VLDT_EN CPU_PWRGD n AC Timing Parameter Item Timing Description Min Typical Max t0 SB_PSON# falling to ATX_PSON# falling 1µs 3µs 6µs t1 ATX_PWRGD rising to VDIMM_EN rising 40µs 60µs 80µs t2 VDIMM_SEN rising to VDDA_EN rising 150ms 190ms 230ms t3 VDDA_SEN rising to VDD_EN rising 3ms 4ms 5ms t4 VDD_GD rising to VLDT_EN rising 3ms 4ms 5ms t5 VLDT_SEN rising to CPU_PWRGD rising 3ms 4ms 5ms t6 CPU_PWRGD falling to VLDT_EN falling 3ms 4ms 5ms t7 VLDT_SEN falling (0.85V) to VDD_EN falling 7ms 10ms 13ms t8 VDD_GD falling to VDDA_EN falling 315ms 400ms 485ms t9 VDDA_SEN falling to VDIMM_EN falling 7ms 10ms 13ms t10 VDIMM_SEN falling to ATX_PSON# rising 150ms 190ms 230ms t11 SB_PSON# rising to CPU_PWRGD falling 3ms 4ms 5ms Note:All specified timing is simulated at pull_up resistor 9K,w/o power capacitance. 6 Rev.A.03 AME ATPA02 K8 Timing Controller n Absolute Maximum Ratings Parameter Symbol Rating Unit Power Supply Vcc -0.5V to +7V V Input Voltage Vcc -0.5V to Vcc+0.5V V Output Voltage Vcc -0.5V to Vcc+0.5V V Note: Exceeding the absolute maximum rating may damage the device. n Recommended Operation Conditions Parameter Symbol Rating Unit Ambient Temperature Range TA - 30 to +85 o Storage Temperature Range TSTG - 55 to +125 o C C n Electrical Specifications VCC=5V,TA=25oC, unless otherwise specified. Parameter Trigger point for VDIMM_SEN Trigger point for VDDA_SEN Hysteresis for VDDA_SEN and VDIMM_SEN Trigger point for VLDT_SEN Hysteresis for VLDT_SEN Symbol VTRIG VTRIG, VDDA Min VTRIG,LDT Logic Low Level VIL Max Unit 1.85 V VCC =5V 1.75 V VCC =4.75V 1.65 V VCC =5.25V 2.3 V VCC =5V 2.2 V VCC =4.75V 2.1 V 100 mV VCC =5.25V 0.88 V VCC =5V 0.85 V VCC =4.75V 0.83 V 100 mV VHYST,LDT VIH Typ VCC =5.25V VHYST Logic High Level Rev.A.03 Conditions 2 V 0.8 V 7 AME ATPA02 K8 Timing Controller n Tape and Reel Dimension SOP-16 Carrier Tape, Number of Components Per Reel and Reel Size 8 Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size SOP-16 12.0±0.1 mm 4.0±0.1 mm 2500pcs 330±1 mm Rev.A.03 AME ATPA02 K8 Timing Controller n Package Dimension SOP-16 Top View SYMBOLS H 9 E 16 8 1 b e MILLIMETERS MIN MAX MIN MAX A 1.35 1.75 0.053 0.069 A1 0.10 0.25 0.004 0.010 b 0.40TYP 0.016TYP C 0.20TYP 0.008TYP e 1.27TYP 0.050TYP E 3.81 4.00 0.150 0.157 D 9.80 10.00 0.386 0.394 h Front View 0.38TYP 0.015TYP H 5.80 6.20 0.228 0.244 L 0.41 1.27 0.016 0.050 θ 0o 8o 0o 8o A D INCHES SEATING PLANE A1 0.004 max Side View C θ DETAL : A" A" L h Rev.A.03 9 www.ame.com.tw E-Mail: [email protected] Life Support Policy: These products of AME, Inc. are not authorized for use as critical components in life-support devices or systems, without the express written approval of the president of AME, Inc. AME, Inc. reserves the right to make changes in the circuitry and specifications of its devices and advises its customers to obtain the latest version of relevant information. AME, Inc. , November 2007 Document: ATT-DSATPA02-A.03 Corporate Headquarter AME, Inc. 2F, 302 Rui-Guang Road, Nei-Hu District Taipei 114, Taiwan. Tel : 886 2 2627-8687 Fax: 886 2 2659-2989