AMSCO AS1334-BTDT-30

Datasheet
AS1334
6 5 0 m A , U l t r a l o w R i p p l e St e p D o w n D C / D C C o n v e r t e r
1 General Description
2 Key Features
The AS1334 is a step-down DC-DC converter designed
to power portable applications from a single Li-Ion
battery. The device also achieves high-performance in
mobile phones and other applications requiring low
dropout voltage.
The AS1334 operates from an input voltage range of 2.7
to 5.5V while providing output voltages of 1.2, 1.5, 1.8,
2.5, 3.0 and 3.3V.
!
Output Voltage Ripple: 2mV
!
PWM Switching Frequency: 2MHz
!
Single Lithium-Ion Cell Operation
!
Output Voltage Range: 1.2V to 3.4V
(available in 100mV steps, see Ordering Information
on page 16)
Fixed Output Voltages:
- 1.2V, 1.5V, 1.8V, 2.5V, 3.0V, 3.3V
!
Fixed-frequency PWM operation minimizes RF
interference. Shutdown function turns the device off and
reduces battery consumption to 0.01µA (typ.).
The AS1334 is available in a TDFN(3x3) 8-pin package.
A high switching frequency (2 MHz) allows use of tiny
surface-mount components. Only three small external
surface-mount components, an inductor and two
ceramic capacitors are required.
!
Maximum Load Capability of 650mA
!
97% High Efficiency, 94% Average Efficiency
!
Current Overload Protection
!
Thermal Overload Protection
!
Power-OK
!
Soft Start
!
Low Dropout Voltage (140 mΩ Typ PFET)
!
TDFN(3x3) 8-pin
3 Applications
The AS1334 is an ideal solution to supply noise
sensitive applications as cellular phones, hand-held
radios, RF PC cards, battery powered RF devices, RFID
chipsets, A/D Converter, Sensors and OpAmps.
Figure 1. AS1334 - Typical Application Circuit
PVIN
VIN
SW
3.3 µH
VOUT
10 µF
VDD
FB
AS1334
10 µF
ON
OFF
EN
POK
PGND
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SGND
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AS1334
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Configuration
FB 1
8 PGND
POK 2
7 SW
AS1334
EN 3
VDD 4
6 PVIN
SGND 9
5 SGND
Pin Descriptions
Table 1. Pin Descriptions
Pin Name
FB
POK
EN
VDD
SGND
PVIN
SW
PGND
Pin Number
Description
1
Feedback Pin. Connect to the output at the output filter capacitor.
Power-OK.
0 = VOUT < 90% of VOUTNOM.
2
1 = VOUT > 90% of VOUTNOM.
Enable Input. Set this digital input high for normal operation. For shutdown,
3
set low.
+2.7V to +5.5V Power Supply Voltage. Analog Supply Input.
4
Analog and Control Ground.
5, 9
6
+2.7V to +5.5V Power Supply Voltage. Input to the internal PFET switch.
Switch Pin. Switch node connection to the internal PFET switch and NFET
synchronous rectifier. Connect to an inductor with a saturation current rating
7
that exceeds the maximum switch peak current limit specification of the
AS1334.
Power Ground.
8
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AS1334
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Electrical
Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
VDD, PVIN to SGND
-0.3
+7.0
V
PGND to SGND
-0.3
+0.3
V
POK, EN, FB
SGND - 0.3 VDD + 0.3
V
SW
PGND - 0.3 PVIN + 0.3
V
PVIN to VDD
-0.3
+0.3
V
Operating Temperature Range
-40
+85
°C
+150
ºC
+150
ºC
+260
ºC
2
kV
5.5
V
650
mA
+125
ºC
Junction Temperature (TJ-MAX)
Storage Temperature Range
-65
Maximum Lead Temperature
(Soldering, 10 sec)
Notes
7.0V max
ESD Rating
Human Body Model
HBM MIL-Std. 883E 3015.7 methods
Operating Ratings
Input Voltage Range
2.7
Recommended Load Current
Junction Temperature (TJ) Range
Ambient Temperature (TA) Range
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-40
-40
+85
Revision 1.04
ºC
In applications where high power
dissipation and/or poor package thermal
resistance is present, the maximum
ambient temperature may have to be
derated.
Maximum ambient temperature (TA-MAX)
is dependent on the maximum operating
junction temperature (TJ-MAX-OP =
125ºC), the maximum power dissipation
of the device in the application (PD-MAX),
and the junction-to ambient thermal
resistance of the part/package in the
application (θJA), as given by the
following
equation: TA-MAX = TJ-MAX-OP – (θJA ×
PD-MAX).
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AS1334
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
TA = TJ = -40ºC to +85ºC; PVIN = VDD = EN = 3.6V, unless otherwise noted. Typ. values are at TA=25°C.
Table 3. Electrical Characteristics
Symbol
VOUT
Parameter
Output Voltage
Conditions
PVIN = 3.6V
Shutdown supply current
EN = SW = 0V
IQ
DC bias current into VDD
FB = 0V, No Switching
Pin-Pin Resistance for PFET
RDSON(N)
Pin-Pin Resistance for NFET
ILIM,PFET
Switch peak current limit
Typ
Max Units
1.176
1.2
1.224
V
1.47
1.5
1.53
V
1.764
1.8
1.836
V
2.45
2.5
2.55
V
2.94
3.0
3.06
V
3.234
3.3
3.366
V
0.01
2
µA
1
1.4
mA
140
200
1
ISHDN
RDSON(P)
Min
2
ISW = 200mA; TA = +25°C
ISW = 200mA
230
ISW = -200mA; TA = +25°C
300
ISW = -200mA
415
485
935
mΩ
mΩ
1100
1200
mA
0.05
0.2
V
500
nA
93
%
POK Output
VOL
POK Output Low Voltage
POK sinking 0.1mA
POK Output High Leakage Current POK = 3.6V
POK Threshold
Rising edge, referenced to VOUT(NOM)
87
90
Enable Input
VIH,EN
Logic high input threshold
VIL,EN
Logic low input threshold
1.2
IPIN,ENABLE Pin pull down current
V
0.5
V
5
10
µA
2
2.2
MHz
Oscillator
FOSC
Internal oscillator frequency
1.8
1. Shutdown current includes leakage current of PFET.
2. IQ specified here is when the part is operating at 100% duty cycle.
System Characteristics
TA = 25ºC; PVIN = VDD = EN = 3.6V, unless otherwise noted. The following parameters are verified by characterisation
and are not production tested.
Table 4. System Characteristics
Symbol
T_ON
η
Parameter
Conditions
Min Typ Max
Units
Turn on time (from Enable low to
high transition)
EN = Low to High, VIN = 4.2V, COUT =
10µF, IOUT ≤ 1mA
210 350
µs
Efficiency (L = 3.3µH, DCR ≤
100mΩ)
VIN = 3.6V, IOUT = 400mA
96
%
VIN = 4.2V, IOUT = 10mA to 400mA
5
mVp-p
VOUT_ripple Ripple voltage, PWM mode1
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AS1334
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 4. System Characteristics
Symbol
Parameter
Conditions
Line_tr
Line transient response
VIN = 600mV perturbance, over Vin
range 3.4V to 5.5V; TRISE = TFALL =
10µs, VOUT = 3.0V, IOUT = 100mA
Load_tr
Load transient response
VIN = 4.2V, VOUT = 3.0V, transients up
to 100mA, TRISE = TFALL = 10µs
Min Typ Max
Units
50
mVpk
50
mVpk
1. Ripple voltage should measured at COUT electrode on good layout PC board and under condition using suggested inductors and capacitors.
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AS1334
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
Circuit in Figure 23 on page 11, PVIN = VDD = EN = 3.6V, L = 3.3µH (LPS4018-332ML_), CIN = COUT = 10µF
(GRM21BR61C106KA01) unless otherwise noted;
Figure 3. Quiescent Current vs. VIN
Figure 4. Shutdown Current vs. Temperature
0.55
0.3
Vi n=3.25V
Shutdown Current (µA)
Quiescent Current (mA)
Vi n=3.6V
0.5
0.45
0.4
0.25
Vi n=4.2V
Vi n=5.5V
0.2
0.15
0.1
0.05
- 45°C
+ 25°C
+ 85°C
0.35
2.5
3
3.5
4
4.5
5
0
-40
5.5
-15
10
Supply Voltage (V)
60
85
Figure 6. Output Voltage vs. Supply Voltage
4
3.06
3
3.04
2
Output Voltage (V)
Switching Frequency Variation (%)
Figure 5. Switching Frequency Variation vs. Temp.
1
0
-1
-2
3.02
3
2.98
2.96
Vi n=3.6V
-3
Vi n=4.2V
-15
10
35
60
Iout=650mA
85
2.94
3.25
Temperature (°C)
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Iout=50mA
Iout=300mA
Vi n=5.5V
-4
-40
35
Temperature (°C)
3.75
4.25
4.75
5.25
Supply Voltage (V)
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AS1334
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 8. Efficiency vs. Output Current
3.06
100
3.04
95
3.02
Efficiency (%)
Output Voltage (V)
Figure 7. Output Voltage vs. Temperature
3
2.98
90
85
80
Vi n=3.25V
Vi n=3.6V
Vi n=3.9V
2.96
75
Iout=50mA
Vi n=4.2V
Iout=300mA
Vi n=4.5V
Iout=650mA
2.94
-40
Vi n=5.5V
70
-15
10
35
60
85
0
Temperature (°C)
100
200
300
400
500
600
700
Output Current (mA)
Figure 9. Switch Peak Current Limit vs. Temperature;
closed loop
Figure 10. Load Transient Response; VOUT = 3.0V,
VIN = 4.2V
200mV/Div
1.1
1.05
IOUT
Vi n=2.7V
Vi n=3.6V
Vi n=5.5V
1
-40
-15
10
35
60
85
10µs/Div
100mA 400mA
200mA/Div
VOUT
1.15
IL
Peak Current Limit (A)
1.2
Temperature (°C)
VSW
500mA/DIV
VOUT
1V/Div
IL
EN
2V/Div 500mA/DIV 2V/Div
VSW
VOUT
IL
EN
50µs/Div
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2V/Div 5V/Div
Figure 12. Startup; VIN = 4.2V, VOUT = 3.0V,
IOUT<1mA, RLOAD=3.3kΩ
5V/Div
Figure 11. Startup; VIN = 3.6V, VOUT = 3.0V,
IOUT<1mA, RLOAD=3.3kΩ
50µs/Div
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AS1334
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
50µs/Div
5V/Div
2V/Div
2V/Div
200mA/Div
VSW
10mV/Div
IL
VOUT
100mA/Div
5mV/Div
2V/Div
Figure 18. VOUT Ripple in Skip Mode; VIN=3.31V,
VOUT=3.0V, RLOAD=5Ω
2V/Div
VSW
2A/Div
10µs/Div
Figure 17. Output Voltage Ripple;
VOUT = 3.0V, IOUT = 200mA
IL
2V/Div
VSW
VOUT
IL
VOUT
50mV/Div
IL
100mA/Div
VIN
1V/Div
Figure 16. Timed Current Limit Response;
VIN = 3.6V, VOUT=3.0V
50µs/Div
VOUT
2V/Div
50µs/Div
Figure 15. Line Transient Response; VIN=3.3V to
3.9V, IOUT=100mA, VOUT=3.0V
200ns/Div
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500mA/Div
VSW
VOUT
EN
IL
EN
IL
5V/Div
2V/Div
Figure 14. Shutdown Response; VIN=4.2V,
VOUT=3.0V, RLOAD=5Ω
2V/Div 500mA/Div
VOUT
VSW
Figure 13. Shutdown Response; VIN=3.6V,
VOUT=3.0V, RLOAD=5Ω
1µs/Div
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AS1334
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 20. RDSON (N-Chanel) vs. Temp.; ISW=-200mA
350
350
300
300
250
250
R DSON (m Ω )
R DSON (m Ω )
Figure 19. RDSON (P-Chanel) vs. Temp.; ISW=200mA
200
150
100
200
150
100
Vi n=2.7V
50
Vi n=2.7V
50
Vi n=3.6V
Vi n=3.6V
Vi n=5.5V
0
-40
-15
10
35
Vi n=5.5V
60
85
0
-40
Temperature (°C)
-15
10
35
60
85
Temperature (°C)
Figure 21. EN High Threshold vs. VIN
1.2
EN High Threshold (V)
1.15
1.1
1.05
1
0.95
0.9
- 45°C
0.85
+ 25°C
+ 90°C
0.8
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage (V)
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AS1334
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1334 is a simple, step-down DC-DC converter optimized for powering portable applications that require low
dropout voltages such as mobile phones, portable communicators, and similar battery powered RFID devices. Besides
being packed with numerous features like current overload protection, thermal overload shutdown and soft start,
AS1334 displays the following characteristics:
!
Its operation is based on current-mode buck architecture with synchronous rectification for high efficiency.
!
Allows the application to operate at maximum efficiency over a wide range of power levels from a single Li-Ion battery cell.
!
Provides for a maximum load capability of 650mA in PWM mode, wherein the maximum load range may vary
depending on input voltage, output voltage and the selected inductor.
!
Is ranked at an efficiency of around 96% for a 400mA load with a 3.6V input voltage.
Figure 22. AS1334 - Functional Block Diagram
POK
1.13V
PVIN
VDD
–
Oscillator
+
Current
Sense
Error
Amplifier
PWM
COMP
FB
Mosfet
Control
Logic
Soft Start
SW
Main Control
EN
Shutdown
Control
AS1334
SGND
PGND
The size of the external components is reduced by using a high switching frequency (2MHz). Figure 1 on page 1
demonstrates that only three external power components are required for implementation. Also, the system controller
should set EN low during power-up and other low supply voltage conditions. See Shutdown Mode on page 12.
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AS1334
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 23. Typical Operating System Circuit
PVIN
VIN
SW
3.3 µH
VOUT
2.7V to 5.5V
10 µF
VDD
FB
AS1334
10 µF
EN
System
Controller
POK
ON/OFF
PGND
SGND
Operating the AS1334
AS1334’s control block turns on the internal PFET (P-channel MOSFET) switch during the first part of each switching
cycle, thus allowing current to flow from the input through the inductor to the output filter capacitor and load. The
inductor limits the current to a ramp with a slope of around (VIN - VOUT) / L, by storing energy in a magnetic field.
During the second part of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and
then turns the NFET (N-channel MOSFET) synchronous rectifier on. As a result, the inductor’s magnetic field
collapses, generating a voltage that forces current from ground through the synchronous rectifier to the output filter
capacitor and load.
While the stored energy is transferred back into the circuit and depleted, the inductor current ramps down with a slope
around VOUT / L. The output filter capacitor stores charge when the inductor current is high, and releases it when low,
smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to
control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave
formed by the switch and synchronous rectifier at SW to a low-pass filter formed by the inductor and output filter
capacitor.
The output voltage is equal to the average voltage at the SW pin.
While in operation, the output voltage is regulated by switching at a constant frequency and then modulating the
energy per cycle to control power to the load. Energy per cycle is set by modulating the PFET switch on-time pulse
width to control the peak inductor current. This is done by comparing the signal from the current-sense amplifier with a
slope compensated error signal from the voltage-feedback error amplifier. At the beginning of each cycle, the clock
turns on the PFET switch, causing the inductor current to ramp up. When the current sense signal ramps past the error
amplifier signal, the PWM comparator turns off the PFET switch and turns on the NFET synchronous rectifier, ending
the first part of the cycle.
If an increase in load pulls the output down, the error amplifier output increases, which allows the inductor current to
ramp higher before the comparator turns off the PFET. This increases the average current sent to the output and
adjusts for the increase in the load. Before appearing at the PWM comparator, a slope compensation ramp from the
oscillator is subtracted from the error signal for stability of the current feedback loop. The minimum on time of PFET in
PWM mode is 50ns (typ.)
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AS1334
Datasheet - D e t a i l e d D e s c r i p t i o n
Internal Synchronous Rectifier
To reduce the rectifier forward voltage drop and the associated power loss, the AS1334 uses an internal NFET as a
synchronous rectifier. The big advantage of a synchronous rectification is the higher efficiency in a condition where the
output voltage is low compared to the voltage drop across an ordinary rectifier diode. During the inductor current down
slope in the second part of each cycle the synchronous rectifier is turned on. Before the next cycle the synchronous
rectifier is turned off.
There is no need for an external diode because the NFET is conducting through its intrinsic body diode during the
transient intervals before it turns on.
Power-OK
The POK output indicates if the output voltage is within 90% of the nominal voltage level. As long as the output voltage
is within regulation the open-drain POK output sinks current.
Shutdown Mode
If EN is set to high (>1.2V) the AS1334 is in normal operation mode. During power-up and when the power supply is
less than 2.7V minimum operating voltage, the chip should be turned off by setting EN low. In shutdown mode the
following blocks of the AS1334 are turned off, PFET switch, NFET synchronous rectifier, reference voltage source,
control and bias circuitry. The AS1334 is designed for compact portable applications, such as mobile phones where the
system controller controls operation mode for maximizing battery life and requirements for small package size
outweigh the additional size required for inclusion of UVLO (Under Voltage Lock-Out) circuitry.
Note: Setting the EN digital pin low (<0.5V) places the AS1334 in a 0.01µA (typ.) shutdown mode.
Thermal Overload Protection
To prevent the AS1334 from short-term misuse and overload conditions the chip includes a thermal overload
protection. To block the normal operation mode the device is turning the PFET and the NFET off in PWM mode as
soon as the junction temperature exceeds 150°C. To resume the normal operation the temperature has to drop below
140°C.
Note: Continuing operation in thermal overload conditions may damage the device and is considered bad practice.
Current Limiting For Protection
If in the PWM mode the cycle-by-cycle current limit of 1200mA (max.) is reached the current limit feature takes place
and protects the device and the external components. A timed current limiting mode is working when a load pulls the
output voltage down to approximately 0.375V. In this timed current limit mode the inductor current is forced to ramp
down to a safe value. This is achived by turning off the internal PFET switch and delaying the start of the next cycle for
3.5us. The synchronous rectifier is also turned off in the timed current limit mode.
The advantage of the timed current limit mode is to prevent the device from the loss of the current control.
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AS1334
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
Inductor Selection
For the external inductor, a 3.3µH inductor is recommended. Minimum inductor size is dependant on the desired efficiency and output current. Inductors with low core losses and small DCR at 2MHz are recommended.
Table 5. Recommended Inductor
Part Number
L
DCR
LPS4018-222ML_
2.2µH
0.070Ω
Current Rating Dimensions (L/W/T)
2.9A
3.9x3.9x1.7mm
LPS4018-332ML_
3.3µH
0.080Ω
2.4A
3.9x3.9x1.7mm
LPS4018-472ML_
4.7µH
0.125Ω
1.9A
3.9x3.9x1.7mm
Manufacturer
Coilcraft
www.coilcraft.com
Capacitor Selection
A 10µF capacitor is recommended for CIN as well as a 10µF for COUT. Small-sized X5R or X7R ceramic capacitors are
recommended as they retain capacitance over wide ranges of voltages and temperatures.
Input and Output Capacitor Selection
Low ESR input capacitors reduce input switching noise and reduce the peak current drawn from the battery. Also low
ESR capacitors should be used to minimize VOUT ripple. Multi-layer ceramic capacitors are recommended since they
have extremely low ESR and are available in small footprints.
For input decoupling the ceramic capacitor should be located as close to the device as practical. A 4.7µF input capacitor is sufficient for most applications. Larger values may be used without limitations.
A 2.2µF to 10µF output ceramic capacitor is sufficient for most applications. Larger values up to 22µF may be used to
obtain extremely low output voltage ripple and improve transient response.
Table 6. Recommended Input and Output Capacitor
Part Number
C
GRM188R60J475KE19
4.7µF
TC Code Rated Voltage
X5R
6.3V
Dimensions (L/W/T)
0603
GRM219R60J475KE19
4.7µF
X5R
6.3V
0805
GRM21BR61C475KA88
4.7µF
X5R
16V
0805
GRM31CR71E475KA88
4.7µF
X7R
25V
1206
GRM188R60J106ME47
10µF
X5R
6.3V
0603
GRM21BR60J106KE19
10µF
X5R
6.3V
0805
GRM21BR61A106KE19
10µF
X5R
10V
0805
GRM32DR71C106KA01
10µF
X7R
16V
1210
GRM21BR60J226ME39
22µF
X5R
6.3V
0805
GRM32ER71A226KE20
22µF
X7R
10V
1210
Manufacturer
Murata
www.murata.com
EN Pin Control
Drive the EN pin using the system controller to turn the AS1334 ON and OFF. Use a comparator, Schmidt trigger or
logic gate to drive the EN pin. Set EN high (>1.2V) for normal operation and low (<0.5V) for a 0.01µA (typ.) shutdown
mode. Set EN low to turn off the AS1334 during power-up and under voltage conditions when the power supply is less
than the 2.7V minimum operating voltage. The part is out of regulation when the input voltage is less than 2.7V.
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AS1334
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Layout Considerations
The AS1334 converts higher input voltage to lower output voltage with high efficiency. This is achieved with an
inductorbased switching topology. During the first half of the switching cycle, the internal PMOS switch turns on, the
input voltage is applied to the inductor, and the current flows from PVDD line to the output capacitor (C2) through the
inductor. During the second half cycle, the PMOS turns off and the internal NMOS turns on. The inductor current
continues to flow via the inductor from the device PGND line to the output capacitor (C2). Referring to Figure 24, the
AS1334 has two major current loops where pulse and ripple current flow. The loop shown in the left hand side is most
important, because pulse current shown in Figure 24 flows in this path. The right hand side is next. The current
waveform in this path is triangular, as shown in Figure 24. Pulse current has many high-frequency components due to
fast di/dt. Triangular ripple current also has wide high-frequency components. Board layout and circuit pattern design
of these two loops are the key factors for reducing noise radiation and stable operation. Other lines, such as from
battery to C1(+) and C2(+) to load, are almost DC current, so it is not necessary to take so much care. Only pattern
width (current capability) and DCR drop considerations are needed.
Figure 24. Current Loop
VIN
3.25V to 5.5V
i
fOSC = 2MHz
+ C1
VDD
PVIN
i
L1
- 10 µF
3.3 µH
VOUT
SW
EN
FB
PGND
C2
+
10 µF
-
SGND
POK
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Revision 1.04
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AS1334
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
The devices are available in a TDFN(3x3) 8-pin package.
Figure 25. TDFN(3x3) 8-pin Package
D2
SEE
DETAIL B
A
D
D2/2
B
aaa C 2x
E
E2
E2/2
L
PIN 1 INDEX AREA
(D/2 xE/2)
K
PIN 1 INDEX AREA
(D/2 xE/2)
aaa C
N N-1
2x
b
e
TOP VIEW
(ND-1) X e
e
BTM VIEW
Terminal Tip
ddd
bbb
C
C A B
DETAIL B
e/2
A3
ccc C
A
C
0.08 C
SIDE VIEW
A1
SEATING
PLANE
Datum A or B
EVEN TERMINAL SIDE
Symbol
A
A1
A3
L1
L2
aaa
bbb
ccc
ddd
eee
ggg
Min
0.70
0.00
Typ
0.75
0.02
0.20 REF
0.03
Max
0.80
0.05
0.15
0.13
0.15
0.10
0.10
0.05
0.08
0.10
Notes
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
Symbol
D BSC
E BSC
D2
E2
L
θ
K
b
e
N
ND
Min
1.60
1.35
0.30
0º
0.20
0.18
Typ
3.00
3.00
0.40
0.25
0.65
8
4
Max
2.50
1.75
0.50
14º
0.30
Notes
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2, 5
1, 2
1, 2, 5
Notes:
1. Figure 25 is shown for illustration only.
2. All dimensions are in millimeters; angles in degrees.
3. Dimensioning and tolerancing conform to ASME Y14.5 M-1994.
4. N is the total number of terminals.
5. The terminal #1 identifier and terminal numbering convention shall conform to JEDEC 95-1, SPP-012. Details of terminal #1 identifier are optional, but must be located within the zone indicated. The terminal #1 identifier may be either
a mold or marked feature.
6. Dimension b applies to metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip.
7. ND refers to the maximum number of terminals on side D.
8. Unilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals
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AS1334
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The device is available as the standard products shown in Table 7.
Table 7. Ordering Information
Ordering Code
Marking
Output
AS1334-BTDT-12
ASR2
1.2V
AS1334-BTDT-15
ASR3
1.5V
AS1334-BTDT-18
ASR4
1.8V
AS1334-BTDT-25
ASR5
2.5V
AS1334-BTDT-30
ASQY
3.0V
AS1334-BTDT-33
ASR6
3.3V
xxxx
xxxx
1
AS1334-BTDT-xx
Description
650mA, Ultra low Ripple Step Down
DC/DC Converter
650mA, Ultra low Ripple Step Down
DC/DC Converter
650mA, Ultra low Ripple Step Down
DC/DC Converter
650mA, Ultra low Ripple Step Down
DC/DC Converter
650mA, Ultra low Ripple Step Down
DC/DC Converter
650mA, Ultra low Ripple Step Down
DC/DC Converter
650mA, Ultra low Ripple Step Down
DC/DC Converter
Delivery Form
Package
Tape and Reel TDFN(3x3) 8-pin
Tape and Reel TDFN(3x3) 8-pin
Tape and Reel TDFN(3x3) 8-pin
Tape and Reel TDFN(3x3) 8-pin
Tape and Reel TDFN(3x3) 8-pin
Tape and Reel TDFN(3x3) 8-pin
Tape and Reel TDFN(3x3) 8-pin
1. Non-standard devices are available between 1.2V and 3.4V in 100mV steps. For more information and inquiries
contact http://www.austriamicrosystems.com/contact
Note: All products are RoHS compliant and Pb-free.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
For further information and requests, please contact us mailto:[email protected]
or find your local distributor at http://www.austriamicrosystems.com/distributor
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Revision 1.04
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AS1334
Datasheet
Copyrights
Copyright © 1997-2009, austriamicrosystems AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding
the information set forth herein or regarding the freedom of the described devices from patent infringement.
austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice.
Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring
extended temperature range, unusual environmental requirements, or high reliability applications, such as military,
medical life-support or life-sustaining equipment are specifically not recommended without additional processing by
austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show
deviations from the standard production flow, such as test flow or test location.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
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