AMSCO AS1359-BTTT-26

Datasheet
AS1358/AS1359
150mA/300mA, Ultra-Low-Noise, High-PSRR
Low Dropout Regulators
1 General Description
2 Key Features
The AS1358/AS1359 are ultra-low-noise, low-dropout
linear regulators specifically designed to deliver up to
150/300mA continuous output current, and can achieve
a low 140mV dropout for 300mA load current. The LDOs
are designed and optimized to work with low-cost, smallcapacitance ceramic capacitors.
The devices are available as the standard products
listed in Table 1.
Table 1. Standard Products
!
Preset Output Voltages: 1.5 to 4.5V (in 50mV steps)
!
Output Noise: 9µVRMS @ 100Hz to 100kHz
!
Power-Supply Rejection Ratio: 92dB @ 1kHz
!
Low Dropout: 140mV @ 300mA Load
!
Stable with 1µF Ceramic Capacitor for any Load
!
Guaranteed 150/300mA Output
Model
Load Current
Output Voltage
!
1.25V Internal Reference
AS1358
150mA
Preset – 1.5 to 4.5V
!
Extremely-Low Quiescent Current: 40µA
AS1359
300mA
Preset – 1.5 to 4.5V
!
Excellent Load/Line Transient
!
Overcurrent and Thermal Protection
!
TSOT23 5-pin Package
An integrated P-channel MOSFET pass transistor allows
the devices to maintain extremely low quiescent current
(40µA).
The AS1358/AS1359 uses an advanced architecture to
achieve ultra-low output voltage noise of 9µVRMS and a
power-supply rejection-ratio of better than 80dB (up to
10kHz).
The AS1358/AS1359 requires only 1µF output capacitor
for stability at any load. When the LDO is disabled, current consumption drops below 500nA.
The devices are available in a TSOT23 5-pin package.
3 Applications
The devices are ideal for mobile phones, wireless
phones, PDAs, handheld computers, mobile phone
base stations, Bluetooth portable radios and accessories, wireless LANs, digital cameras, personal audio
devices, and any other portable, battery-powered application.
Figure 1. Typical Application Circuit
Input
2V to 5.5V
1
Output
1.5V to 4.5V
5
OUT
IN
CIN
1µF
2
GND
On
Off
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AS1358/
AS1359
4
3
CBYPASS
10nF
BYPASS
SHDNN
Revision 1.04
COUT
1µF
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AS1358/AS1359
Datasheet - P i n o u t
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
IN 1
GND 2
5 OUT
AS1358/
AS1359
SHDNN 3
4 BYPASS
TSOT23 5-pin
Pin Descriptions
Table 2. Pin Descriptions
Pin Number
Pin Name
Description
Unregulated Input Supply.
1
IN
2
GND
3
SHDNN
Shutdown. Pull this pin low to disable the LDO.
4
BYPASS
Noise Bypass for Low-Noise Operation. Connect a 10nF capacitor from
this pin to OUT.
Note: This pin is shorted to GND in shutdown mode.
5
OUT
Regulated Output Voltage. Bypass this pin with a capacitor to GND. See
Capacitor Selection and Regulator Stability on page 11 for more details.
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Ground
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AS1358/AS1359
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 3 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Table 3. Absolute Maximum Ratings
Parameter
Min
Max
Units
IN to GND
-0.3
+7
V
OUT, SHDNN to GND
-0.3
IN +
0.3
V
BYPASS to GND
-0.3
OUT +
0.3
V
Output Short-Circuit Duration
Infinite
Thermal Resistance ΘJA
201.7
ºC/W
+85
ºC
Operating Temperature Range
-40
Junction Temperature
Storage Temperature Range
Package Body Temperature
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-65
+150
ºC
+150
ºC
+260
ºC
Revision 1.04
Comments
on PCB
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/JEDEC J-STD-020D “Moisture/Reflow
Sensitivity Classification for Non-Hermetic Solid
State Surface Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
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AS1358/AS1359
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
VIN = VOUT +0.5V, CIN = 1µF, COUT = 1µF, CBYPASS = 10nF, TAMB = -40 to +85ºC (unless otherwise specified). Typ values are at TAMB = +25ºC.
Table 4. Electrical Characteristics
Symbol
Parameter
Condition
VIN
Input Voltage Range
Output Voltage Accuracy
IOUT
Maximum Output Current
ILIMIT
Current Limit
Dropout Voltage
1
Min
Typ
Max
Unit
2
5.5
V
IOUT = 1mA, TAMB = +25ºC
-0.5
+0.5
IOUT = 100µA to 150mA, TAMB = +25ºC
(AS1358)
-0.75
+0.75
IOUT = 100µA to 300mA, TAMB = +25ºC
(AS1359)
-1.0
+1.0
IOUT = 100µA to 150mA, (AS1358)
-1.5
+1.5
IOUT = 100µA to 300mA, (AS1359)
-2.0
+2.0
AS1358
150
AS1359
300
%
mA
AS1358, OUT = 90% of nom., TAMB = +25ºC
270
AS1359, OUT = 90% of nom., TAMB = +25ºC
510
VOUT ≥ 3V, IOUT = 150mA
70
95
VOUT ≥ 3V, IOUT = 300mA, (AS1359 only)
140
200
mA
2.5V ≤ VOUT < 3V, IOUT = 150mA
90
120
2.5V ≤ VOUT < 3V, IOUT = 300mA,
(AS1359 only)
170
230
2.0V ≤ VOUT < 2.5V, IOUT = 150mA
140
190
2.0V ≤ VOUT < 2.5V, IOUT = 300mA,
(AS1359 only)
270
350
IOUT = 0.05mA
40
90
VIN = VOUTNOM - 0.1V, IOUT = 0mA
150
250
mV
µA
IQ
Quiescent Current
VLNR
Line Regulation
VIN = (VOUT +0.5V) to 5.5V, IOUT = 0.1mA
0.02
%/V
VLDR
Load Regulation
IOUT = 1 to 150/300mA
0.0005
%/mA
ISHDNN
Shutdown Supply Current
SHDNN = 0V
9
f = 1kHz, IOUT = 10mA
92
PSRR
Ripple Rejection
Output Noise Voltage (RMS)
f = 10kHz, IOUT = 10mA
80
f = 100kHz, IOUT = 10mA
62
f = 100Hz to 100kHz,
ILOAD = 0 to 150/300mA
9
500
nA
dB
µV
Shutdown
2
RLOAD = 50Ω
300
µs
SHDNN Logic Low Level
VIN = 2 to 5.5V
0.4
V
SHDNN Logic High Level
VIN = 2 to 5.5V
Shutdown Exit Delay
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1.5
V
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AS1358/AS1359
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Table 4. Electrical Characteristics (Continued)
Symbol
Parameter
Condition
Min
Typ
Max
Unit
Thermal Protection
TSHDNM
ΔTSHDN
M
Thermal Shutdown
Temperature
160
ºC
Thermal Shutdown
Hysteresis
15
ºC
1. Dropout is defined as VIN - VOUT when VOUT is 100mV below the value of VOUT for VIN = VOUT + 0.5V
2. Time needed for VOUT to reach 90% of final value.
Note: All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or
SQC (Statistical Quality Control) methods.
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AS1358/AS1359
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
7 Typical Operating Characteristics
VIN = VOUT + 0.5V, CIN = COUT = 1µF, CBYPASS = 10nF, TAMB = 25°C (unless otherwise specified).
Figure 3. Output Voltage vs. Input Voltage
Figure 4. Output Voltage Accuracy vs. Load Current
3.5
.
0.5
0.4
Output Voltage Deviation (%)
Output Voltage (V) .
3
IOUT = 150mA
2.5
IOUT = 300mA
2
1.5
1
0.5
0
0.3
0.2
0.1
Temp = -45°C
0
-0.1
Temp = 25°C
-0.2
Temp = 85°C
-0.3
-0.4
-0.5
0
1
2
3
4
5
6
0
50
Input Voltage (V)
100
150
200
250
300
Load Current (mA)
Figure 5. Output Voltage Accuracy vs. Temperature
Figure 6. Dropout Voltage vs. Load Current
1
.
140
Dropout Voltage (mV) .
Output Voltage Deviation (%)
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
100
Temp = 85°C
Temp = 25°C
80
60
Temp = -45°C
40
20
-0.8
-1
-40
120
0
-15
10
35
60
85
0
Temperature (°C)
50
100
150
200
250
300
Load Current (mA)
Figure 7. Dropout Voltage vs. Output Voltage
Dropout Voltage (mV) .
80
70
60
50
40
30
20
10
0
2
2.2
2.4
2.6
2.8
3
3.2
Output Voltage (V)
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AS1358/AS1359
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
Figure 8. Ground Pin Current vs. Input Voltage
Figure 9. Ground Pin Current vs. Load Current
80
100
IOUT= 300mA
75
IOUT = 150mA
50
IOUT = 0mA
25
.
125
75
Ground Pin Current (µA)
Ground Pin Current (µA)
.
150
70
65
60
55
50
45
40
35
0
0
1
2
3
4
5
0
6
50
100
150
200
250
300
Load Current (mA)
Input Voltage (V)
Figure 10. Ground Pin Current vs. Temperature
Figure 11. PSRR vs. Frequency; IOUT = 10mA
100
45
80
PSRR (dB)
Ground Pin Current (µA)
.
50
40
35
30
25
-40
60
40
20
-15
10
35
60
0
0.01
85
Temperature (°C)
Figure 12. Output Noise Spectral Density vs. Freq.
100
10000
Figure 13. Output Noise vs. Bypass Capacitance
10000
15
.
14
.
13
12
1000
Noise (µVrms)
Output Noise Density (nV/ Hz)
1
Frequency (kHz)
100
11
10
9
8
7
6
10
0.01
5
0.1
1
10
100
1
Frequency (kHz)
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10
100
Capacitance (nF)
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AS1358/AS1359
Datasheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s
200µs/Div
2V/Div
SHDNN
VOUT
20mV/DIV
VIN
VOUT
2V/Div
Figure 17. Enter & Exit Shutdown Delay
500mV/Div
Figure 16. Line Transient Response
200µs/Div
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20mA/Div
IOUT
VOUT
200µs/Div
20mV/DIV
20mA/Div
Figure 15. Load Transient Response near Dropout,
VIN = 3.4V, VOUT = 3.3V
20mV/DIV
VOUT
IOUT
Figure 14. Load Transient Response,
VIN = 3.8V, VOUT = 3.3V
200µs/Div
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AS1358/AS1359
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1358/AS1359 are ultra-low-noise, low-dropout, low-quiescent current linear-regulators specifically designed for
space-limited applications. The devices are available with preset output voltages from 1.5 to 4.5V in 50mV increments.
These devices can supply loads up to 150/300mA. As shown in Figure 18, the AS1358/AS1359 consist of an integrated bandgap core and noise bypass circuitry, error amplifier, P-channel MOSFET pass transistor, and internal feedback voltage-divider.
The output voltage is fed back through an internal resistor voltage-divider connected to pin OUT. An external bypass
capacitor connected to pin BYPASS reduces noise at the output. Additional blocks include a current limiter, thermal
sensor, and shutdown logic.
Internal Voltage Reference
The 1.25V bandgap reference is connected to the error amplifier’s inverting input. The error amplifier compares this
reference with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference
voltage, the pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output
voltage. If the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the
output.
Internal P-Channel Pass Transistor
The AS1358/AS1359 feature a 0.5Ω (typ) P-channel MOSFET pass transistor, which provides several advantages
over similar designs using a PNP pass transistor, including prolonged battery life. The P-channel MOSFET does not
require a base driver, thus quiescent current is dramatically reduced. The AS1358/AS1359 LDOs do not exhibit problems associated with typical PNP-based LDOs, and consume only 40µA of quiescent current in light load and 220µA in
dropout (see Typical Operating Characteristics on page 6).
Output Voltage
The AS1358/AS1359 deliver preset output voltages from 1.5 to 4.5V, in 50mV increments (see Ordering Information on
page 13).
Shutdown
The AS1358/AS1359 feature a low-power shutdown mode that reduces quiescent current to <200nA. Driving SHDNN
low disables the internal voltage reference, error amplifier, gate-drive circuitry, and P-channel MOSFET pass transistor
(see Figure 18), and the device output enters a high-impedance state.
Note: For normal operation connect pin SHDNN to pin IN.
Figure 18. AS1358/AS1359 Block Diagram
AS1358/AS1359
IN
SHDNN
Shutdown and
Power-Down
Control
-
Error
Amp
+
Thermal
Sensor
MOS
Driver w/
ILIMIT
OUT
1.25 Reference
and Noise Bypass
BYPASS
GND
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AS1358/AS1359
Datasheet - D e t a i l e d D e s c r i p t i o n
Current Limit
The AS1358/AS1359 include a current limiting circuitry to monitor and control the P-channel MOSFET pass transistor’s gate voltage, thus limiting the device output current to 270mA (AS1358) and 510mA (AS1359).
Note: See Table 4 on page 4 for the recommended min and max current limits. The output can be shorted to ground
indefinitely without causing damage to the device.
Thermal Protection
Integrated thermal protection circuitry limits total power dissipation in the AS1358/AS1359. When the junction temperature (TJ) exceeds +160ºC, the thermal sensor signals the shutdown logic, turning off the P-channel MOSFET pass
transistor and allowing the device to cool down. The thermal sensor turns the pass transistor on again after the
device’s junction temperature drops by 10ºC, resulting in a pulsed output during continuous thermal-overload conditions.
Note: Thermal protection is designed to protect the devices in the event of fault conditions. For continuous operation,
do not exceed the absolute maximum junction temperature rating of +150ºC.
Operating Region and Power Dissipation
The AS1358/AS1359 maximum power dissipation is dependant on the thermal resistance of the case and PCB, the
temperature difference between the die junction and TAMB, and airflow rate.
Power dissipation across the device is calculated as:
(EQ 1)
PD = IOUT (VIN - VOUT)
The maximum power dissipation is calculated:
PDMAX = (TJ - TAMB)/(θJC + θCA)
(EQ 2)
Where:
TJ - TAMB is the temperature difference between the AS1358/AS1359 die junction and the surrounding air;
θJC is the thermal resistance of the package;
θCA is the thermal resistance through the PC board/copper traces/other materials to the surrounding air.
Note: Pin GND of the AS1358/AS1359 provides the electrical connection to system ground and also serves as a heat
sink. Connect pin GND to the system ground using a large pad or ground plane.
Noise Reduction
The AS1358/AS1359 noise bypass circuitry dramatically reduces output noise, exhibiting 9µVRMS of output voltage
noise with CBYPASS = 0.01µF and COUT = 1µF. Use an external 0.01µF bypass capacitor between pin BYPASS and pin
OUT (see Figure 1 on page 1).
Note: Startup time is minimized by internal power-on circuitry which pre-charges CBYPASS.
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AS1358/AS1359
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
9 Application Information
Capacitor Selection and Regulator Stability
For normal operation, use a 1µF capacitor at pin IN and a 1µF capacitor at pin OUT. Larger input capacitor values and
lower ESR provide better noise rejection and line-transient response. Reduce output noise and improve load-transient
response, stability, and power-supply rejection by using large output capacitors.
Note: Some ceramic dielectrics exhibit large capacitance and ESR variation with temperature. With dielectrics such
as Z5U and Y5V, it may be necessary to use a 2.2µF or larger output capacitor to ensure stability at temperatures below -10°C. With X7R or X5R dielectrics, 1µF is sufficient at all operating temperatures.
Bypass Capacitor
Use a 0.01µF bypass capacitor at pin BYPASS for low-output voltage noise reduction. The leakage current going into
pin BYPASS should be less than 10nA. Increasing the capacitance slightly decreases the output noise. Values above
0.1µF and below 0.001µF are not recommended.
Noise, PSRR, and Transient Response
The AS1358/AS1359 are designed to deliver ultra-low noise and high PSRR, as well as low dropout and low quiescent
currents in battery-powered systems. The power-supply rejection is 92dB at 1kHz and 62dB at 100kHz. (see PSRR vs.
Frequency; IOUT = 10mA on page 7).
When operating from sources other than batteries, improved supply-noise rejection and transient response can be
achieved by increasing the values of the input and output capacitors, and through passive filtering techniques.
The Figure 16 and Figure 14 on page 8 show the AS1358/AS1359 line- and load-transient responses.
Dropout Voltage
The AS1358/AS1359 minimum dropout voltage determines the lowest usable supply voltage. In battery-powered systems, this determines the useful end-of-life battery voltage.
Since the AS1358/AS1359 use a P-channel MOSFET pass transistor, the dropout voltage is a function of drain-tosource on-resistance (RDS(ON)) multiplied by ILOAD (see Figure 6 on page 6).
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AS1358/AS1359
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
The devices are available in a TSOT23 5-pin package.
Figure 19. TSOT23 5-pin Package
Symbol
A
A1
A2
b
b1
c
Min
Typ
0.01
0.84
0.30
0.31
0.12
0.05
0.87
0.35
0.15
Max
1.00
0.10
0.90
0.45
0.39
0.20
c1
0.08
0.13
0.16
D
E
E1
e
e1
2.90BSC
2.80BSC
1.60BSC
0.95BSC
1.90BSC
Notes
3,4
3,4
3,4
Symbol
L
L1
L2
N
R
R1
θ
θ1
aaa
bbb
ccc
ddd
Min
0.30
Typ
0.40
0.60REF
0.25BSC
5
0.10
0.10
0º
Max
0.50
Notes
0.25
4º
8º
4º
10º
12º
Tolerances of Form and Position
0.15
0.25
0.10
0.20
Notes:
1. Dimensioning and tolerancing conform to ASME Y14.5M - 1994.
2. Dimensions are in millimeters.
3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall
not exceed 0.15mm per end. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.15mm per side. Dimensions D and E1 are determined at datum H.
4. The package top can be smaller than the package bottom. Dimensions D and E1 are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and interlead flash, but
include any mistmatches between the top of the package body and the bottom. D and E1 are determined at
datum H.
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AS1358/AS1359
Datasheet - O r d e r i n g I n f o r m a t i o n
11 Ordering Information
The devices are available as the standard products shown in Table 5.
Table 5. Ordering Information
Ordering Code
Marking
Output Current
Output Voltage
Delivery Form
Package
AS1358-BTTT-15
ASLI
150mA
1.5V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-18
ASLJ
150mA
1.8V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-25
ASLK
150mA
2.5V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-26
ASLL
150mA
2.6V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-27
ASLM
150mA
2.7V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-28
ASLN
150mA
2.8V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-285
ASLO
150mA
2.85V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-30
ASLP
150mA
3.0V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-33
ASLQ
150mA
3.3V
Tape and Reel TSOT23 5-pin
AS1358-BTTT-45
ASLR
150mA
4.5V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-15
ASLS
300mA
1.5V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-18
ASLT
300mA
1.8V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-25
ASLU
300mA
2.5V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-26
ASLV
300mA
2.6V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-27
ASLW
300mA
2.7V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-28
ASLX
300mA
2.8V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-285
ASLY
300mA
2.85V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-30
ASLZ
300mA
3.0V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-31
ASSA
300mA
3.1V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-33
ASL0
300mA
3.3V
Tape and Reel TSOT23 5-pin
AS1359-BTTT-45
ASL1
300mA
4.5V
Tape and Reel TSOT23 5-pin
Non-standard devices from 1.5V to 4.5V are available in 50mV steps. For more information and inquiries contact
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Note: All products are RoHS compliant and Pb-free.
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AS1358/AS1359
Datasheet
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Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring
extended temperature range, unusual environmental requirements, or high reliability applications, such as military,
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deviations from the standard production flow, such as test flow or test location.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the
technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
Tobelbaderstrasse 30
A-8141 Unterpremstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
www.austriamicrosystems.com
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