AMSCO AS5011

AS5011
Data Sheet
Low Power Integrated Hall IC for Human Interface Applications
3 Key Features
1 General Description
The AS5011 is a complete Hall Sensor IC for smart
navigation key applications to meet the low power
requirements and host SW integration challenges for
products such as cell phones and smart handheld
devices.
Due to the on chip processing engine, system
designers are not tasked with integrating complex SW
algorithms on their host processor thus leading to
rapid development cycles.
The AS5011 single-chip IC includes 4 integrated Hall
sensing elements for detecting up to ±2mm lateral
displacement, high resolution ADC, XY coordinate
and motion detection engine combined with a smart
power management controller.
The X and Y positions coordinates and magnetic field
information for each Hall sensor element is
transmitted over a 2-wire I²C compatible interface to
the host processor.
The AS5011 is available in a small 16-pin
5x5x0.55mm QFN package and specified over an
operating temperature of
-20 to +80°C.
Figure 1 Typical Arrangement of AS5011 and Axial
Magnet
2.7 to 3.6V operating voltage
Down to 1.8V peripheral supply voltage
Less than 200µA current consumption in Low
Power mode
Less than 50µA current consumption in Shutdown
mode
Lateral magnet movement radius up to 2mm
I²C interface up to 4MHz
Configurable interrupt output for motion detection
Three operating modes:
Shutdown mode
Low Power mode
Full Power mode
4 Applications
The AS5011 is ideal for small factor manual input
devices in battery operated equipment, such as
Mobile phones
MP3 players
PDA’s
GPS receivers
Gaming consoles
2 Benefits
Complete system-on-chip
High reliability due to non-contact sensing
Low power consumption
Figure 2 AS5011 Block Diagram
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Revision 3.10
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AS5011
Data Sheet
5 Package and pinout
Figure 3: QFN-16 package and pinout (TOP view)
Pin#
Symbol
Type
Description
1
SDA
DIO_OD
I²C bus data
2
SCL
DI
I²C bus clock
3
Sample
DI
Test pin. Connect to VSS
4
INTn
DO_OD
Interrupt output. Active LOW
5
tb0
AIO
Test pin. Leave unconnected
6
tb1
AIO
Test pin. Leave unconnected
7
tb2
AIO
Test pin. Leave unconnected
8
tb3
AIO
Test pin. Leave unconnected
9
Test coil
-
Test pin. Connect to VSS
10
VDDp
S
Peripheral power supply, 1.8 ~ 3.6V
11
ScanTest
DI
Test pin. Connect to VSS
12
VDD
S
Core power supply, 2.7 ~ 3.6V
13
VSS
S
Supply ground
14
Wakeup
DIO
Test pin. Leave unconnected
15
Extclk
DIO
Test pin. Leave unconnected
16
Kill
DIO
Test pin. Leave unconnected
Epad
-
-
Center pad not connected
QFN16
Table 1: AS5011 pinout in QFN-16 package
PIN Types:
S
...
DI
…
DO_OD ...
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supply pad
AIO
...
digital input
DIO_OD...
digital output open drain DIO
...
Revision 3.10
analog I/O
digital input / output open drain
digital input / output
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AS5011
Data Sheet
6
Operating the AS5011
6.1 Typical application
The AS5011 requires only a few external components in order to operate immediately when connected to the
host microcontroller.
Only 4 wires are needed for a simple application using a single power supply: two wires for power and two wires
for the I²C communication. A fifth connection can be added in order to send an interrupt to the host CPU when
the magnet is moving away from the center and to inform that a new valid coordinate can be read.
Figure 4: Electrical connection of AS5011 with microcontroller
6.2 XY coordinates interpretation
On Figure 5 the top view of the AS5011 is represented, with a round magnet (scaled) gliding over its surface. The
magnet can be placed under the sensor too, with the PCB between them.
•
Magnet on position 1:
The magnet is in its initial position, centered on the
sensor. The AS5011 is in Shutdown mode. X and Y
register values are (0,0)
•
Magnet on position 2:
The center of the magnet has been moved upon the
horizontal wakeup threshold Xp. An interrupt is sent
to the host microcontroller which sets the AS5011 to
Low Power mode. Wakeup thresholds are
programmable independently for the four directions.
•
Magnet on position 3:
The magnet is at the X and Y limit over the sensor
surface (2mm, 2mm) but still in range.
Figure 5: Position range of the magnet
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AS5011
Data Sheet
6.3 Magnet-chip surface airgap range
The relation between the magnet physical position and the resulting XY registers depends on the magnet
type/size/shape, and the airgap between the magnet and the top (or bottom) surface of the AS5011.
The measurements on Figure 6, Figure 6 Figure 8 have been processed with the AS5000-MA2H-1 d2x0.8mm
cylinder magnet, available on austriamicrosystems website. For those magnets, used in EasyPoint modules EP40
and EP50, the airgap range is typically 0~3mm.
The following diagrams show the relation between the X register value and the physical X coordinate (±2mm
horizontal displacement, 0mm is the center of the chip package) of the magnet at different airgaps. The resulting X
value range decreases when the airgap increases
The Y axis measurements are the same as the X axis ones.
80
40
Airgap 1500um
30
60
Airgap 500um
20
40
10
0
-2500
-2000
-1500
-1000
-500
0
500
1000
1500
2000
2500
X register
X register
20
0
-2.500
-20
-2.000 -1.500
-1.000
-500
0
500
1.000
1.500
2.000
2.500
-10
-20
-40
-30
-60
-40
-50
Magnet position (um)
-80
Magnet position (um)
Figure 6: X register / X displacement (500um airgap)
Figure 7: X register / X displacement (1500um airgap)
30
Airgap 2500um
20
X register
10
0
-2.500 -2.000 -1.500 -1.000
-500
0
500
1.000
1.500
2.000
2.500
-10
-20
-30
Magnet position (um)
Figure 8: X register / X displacement (2500um airgap)
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AS5011
Data Sheet
6.4 Power modes
The AS5011 can operate in three different power modes, depending on the power consumption requirements of the
whole system.
Power Mode
[0x76] Register Description
Sleep phase
Power state between wakeups in Shutdown and Low Power modes
RC clock and analog part OFF
Digital part in static mode
Shutdown mode
Default mode after power on
1001_x00x
<50µA current consumption
LP_Pulsed = 1
Wake up every 80ms from Sleep phase
LP_Active = 0
Hall elements in reduced power during wake up
LP_Continue =
RC clock ON
0
Interrupt LOW on INTn if the magnet is away from the center above the
INT_wup_en =
Xp Xn Yp Yn threshold values (1)
1
Low Power mode
<200µA current consumption
110x_100x
Wake up every 20ms from Sleep phase
LP_Pulsed = 1
Hall elements in high power during wake up for better accuracy
LP_Active = 1
RC clock ON
LP_Continue =
Interrupt LOW on INTn when XY coordinates are ready to be read (1)
0
INT_act_en = 1
Full Power mode
010x_y00x
<8mA current consumption
Continuous read
LP_Pulsed = 0
Hall elements in high power permanently
LP_Active = 1
RC clock ON
LP_Continue =
Interrupt LOW on INTn when XY coordinates are ready to be read (1)
If INT_act_en = 1, after reading the XY coordinate, the next sample is
0
INT_act_en = y stored and won’t be updated until the next read of XY with interrupt
release.
If INT_act_int_en = 0, the last converted XY coordinate is read in real
time.
(1) The interrupt will be released to HIGH by reading the X_res_int or Y_res_int registers, or by switching the
device into a different power mode.
Table 2: Overview of typical power modes
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AS5011
Data Sheet
6.4.1
Shutdown mode
LP_Pulsed = 1, LP_Active = 0, LP_Continue = 0, INT_wup_en = 1
[0x76] = 1001_x00x
This is the default operating mode when powering up the device, giving the lowest power consumption when the
whole system is in idle mode.
The analog part of the AS5011 is powered off (sleep mode). It is waked up every 80ms by an internal low power
logic, the hall sensors are read and the XY coordinate of the magnet is computed.
If the magnet position is above the threshold limits Xp, Xn, Yp, Yn, an interrupt will be generated on the INTn pin
and the device returns to sleep mode waiting for the next wake up after 80ms. As the host microcontroller receives
the interrupt, it can read the X and Y positions or configure the AS5011 to Low Power mode (see 6.4.2 below) in
order to track the magnet position until it returns to its initial position on the center.
INT_n remains LOW until X_int/Y_int have been read, or after a power mode change. The typical coordinates read
application after an interrupt is to read X first then Y_int.
6.4.2
Low Power mode
LP_Pulsed = 1, LP_Active = 1, LP_Continue = 0, INT_act_en = 1
[0x76] = 110x_100x
The Low Power mode is used to track the magnet coordinates when it has been moved from its initial center
position.
The AS5011 is in sleep mode and is waked up every 20ms. As soon as the XY position of the magnet is computed,
an interrupt is sent on the INTn pin to the microcontroller indicating that a valid coordinate is available, then the
sensor returns to sleep mode waiting for the next wake up after 20ms. INT_n remains LOW until X_int/Y_int have
been read, or after a power mode change. The typical coordinates read application after an interrupt is to read X
first then Y_int.
This mode generates a higher power consumption than the Shutdown mode because of the faster sampling rate
and the higher hall sensor current to provide an optimal accuracy of the coordinates.
When the microcontroller detects that the magnet has returned to the initial center position, it has to configure the
AS5011 back to Shutdown mode (see 6.4.1).
6.4.3
Full Power mode
LP_Pulsed = 0, LP_Active = 1, LP_Continue = 0
[0x76] = 010x_y00x
This mode allows the fastest coordinates reading. The sensor stays at its full capability, and never enters in sleep
mode.
The interrupt output goes LOW each time a new X and Y result has been computed and the valid data are ready to
be read by the host microcontroller. INT_n remains LOW until X_int/Y_int have been read, or after a power mode
change. The typical coordinates read application after an interrupt is to read X first then Y_int.
The INT_act_en bit (y):
•
If INT_act_en = 1, after reading the X_int or Y_int register, the next sampled XY coordinate is stored and
won’t be updated until the next read of X_int or Y_int.
•
If INT_act_en = 0, the last converted XY coordinate is read in real time.
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AS5011
Data Sheet
6.4.4
Switching the power modes
The following sequence example would be used for a typical mobile application (mobile phone, PDA, MP3 player):
Figure 9: Typical application sequence for mobile device
After a complete system power up, a soft reset should be applied by sending the I²C commands
[0x76] = 0x9A then [0x76] = 0x98.
If needed the host microcontroller writes the configuration once to the AS5011, for example the
inv_spinning register if the magnet is inverted (see 7.2) or the Xp Xn Yp Yn wakeup threshold values. The
cursor is normally centered X,Y = (0,0) as the magnet position 1 on Figure 5 . The AS5011 is in Shutdown
mode by default.
The cursor is moved by the user above the Yp threshold. An interrupt is generated and remains LOW
until an X_int/Y_int read or a power mode changing.
The microcontroller configures the AS5011 in Low Power mode ( [0x76] = 110x_100x ) for faster
reading. The interrupt is released to HIGH automatically by the power mode change.
Interrupts are generated automatically every 20ms when the XY coordinates are ready for reading.
The microcontroller reads the X register [0x41] then Y_int register [0x52] which releases INTn to HIGH.
During this phase, the cursor is still moving and stays out of the wakeup thresholds range.
If the microcontroller doesn’t read X_int or Y_int immediately after an interrupt, the INTn pin remains
LOW until the next read of X_int or Y_int. The last new converted (a new sample every 20ms) coordinate
will be transferred.
The cursor has been released by the user, and returns to the center of the AS5011 (magnet position
1 on Figure 5). The microcontroller will read X,Y = (0,0), and will configure the sensor to Shutdown mode
([0x76] = 1001_x00x).
Note:
Firmware application notes with source code example for AS5011 and EasyPoint modules are available on
www.austriamicrosystems.com website.
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Revision 3.10
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AS5011
Data Sheet
7 I²C interface
The AS5011 supports the 2-wire I²C protocol without “repeat start” as a slave device, the host CPU (master) has to
initiate the data transfers. The 7-bit device address of the AS5011 is ‘1000 000’.
The SDA signal is bidirectional and is used to read and write the serial data. The SCL signal is the clock generated
by the host CPU, to synchronize the SDA data in read and write mode. The maximum I²C clock frequency is 4MHz,
data are triggered on the rising edge of SCL.
7.1 Interface operation
For both read and write data transfers consist of three phases:
1. The master sends a START command by pulling down SDA while SCL remains high. Then the 7-bit device
address is sent followed by a read/write bit indicator. In READ mode (r/w = ‘1’), the slave has to send the
data from its selected register. In WRITE mode (r/w = ‘0’), the master writes the data in the selected
register. The slave has to acknowledge by sending ‘0’ after the r/w bit from the master.
2.
The slave register is selected by the second data sent by the master. The address has an 8-bit format. The
slave has to acknowledge by sending ‘0’ after the bit R0.
3.
The 8-bit data is transferred from/to the slave selected register, depending on the r/w bit. At the end of the
8-bit data transfer, the master (read mode) or the slave (write mode) acknowledges by sending ‘1’. The
transfer ends when the master sends a STOP command by sending a low to high transition while SCL
remains high.
The AS5011 does not send any acknowledge after the device address or register address (ACK remains High) in
the following cases:
- Wrong address
- Write access to a read-only register
Figure 10: I²C bus Read and Write operation
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AS5011
Data Sheet
7.2 I²C Registers
The following registers / functions are accessible over the serial I²C interface.
size
Acces
s
Address
LP_pulsed
LP_active
LP_continue
1
1
1
R/W
R/W
R/W
0x76
0x76
0x76
INT_wup_en
1
R/W
0x76
INT_act_en
1
R/W
0x76
ext_clk_en
1
R/W
0x76
soft_rst
1
R/W
0x76
data_valid
1
R
0x76
Test 7
Test 6
Test 5
Test 4
ext_sample_en
rc_bias_on
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
0x75
0x75
0x75
0x75
0x75
0x75
inv_spinning
1
R/W
0x75
pptrim_en
1
R/W
0x75
Xp
8
R/W
0x43
2’ comp
Xn
8
R/W
0x44
2’ comp
Yp
8
R/W
0x53
2’ comp
Yn
8
R/W
0x54
2’ comp
X
8
R
0x41
2’ comp
Y
8
R
0x42
2’ comp
X_res_int
Y_res_int
8
8
R
R
0x51
0x52
2’ comp
2’ comp
Register
Format
Reset Value
Bit
Description
Control Register 1
<7>
Low Power control register. See Table 2.
<6>
Low Power control register. See Table 2.
<5>
For test only. Must be 0.
Interrupt control register.
If set, the interrupt pin goes low in Shutdown mode when
1
<4>
the magnet has moved away from the center, above the
xp, xn, yp yn threshold values.
Interrupt control register.
If set, the interrupt pin goes LOW in Low Power mode
1
<3>
when a new XY value is ready for reading. Stores
coordinate until next read in full power mode,
0
<2>
For test only. Must be 0.
Soft Reset.
soft_rst = 0: normal mode
0
<1>
soft_rst = 1: all registers return to their respective reset
value
Data valid.
0
<0>
data_valid = 0: no valid XY coordinates
data_valid = 1: valid data are ready to be read
Control Register 2
0
<7>
For test only. Must be 0.
1
<6>
For test only. Must be 1.
0
<5>
For test only. Must be 0.
0
<4>
For test only. Must be 0.
0
<3>
For test only. Must be 0.
0
<2>
For test only. Must be 0.
Invert the channel voltage.
0
<1>
Set if the magnet polarity is reversed.
0
<0>
For test only. Must be 0.
Range and position values
0x28
Wakeup threshold on the positive X direction.
(40d)
0xD8
Wakeup threshold on the negative X direction.
(-40d)
0x28
Wakeup threshold on the positive Y direction.
(40d)
0xD8
Wakeup threshold on the negative Y direction.
(-40d)
X position. The zero value means the horizontal center
0x00
position on the AS5011.
Y position. The zero value means the vertical center
0x00
position on the AS5011.
0x00
X position. Releases INT_n to ‘1’
0x00
Y position. Releases INT_n to ‘1’
1
0
0
Table 3: I²C Registers
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Revision 3.10
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AS5011
Data Sheet
8 Device specifications
8.1 Absolute maximum ratings (non operating)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only. Functional operation of the device at these or any other conditions beyond those
indicated under “Operating Conditions” is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Parameter
Symbol
Min
Max
Unit
DC supply voltage
VDD
-0.3
5
V
Peripheral supply voltage
VDDp
-0.3
5
V
Note
VDD +0.3
Input pin voltage
Vin
-0.3
VDDp +0.3
V
Input pin voltage
Vin
-
3.6
V
Input current (latchup immunity)
Iscr
-100
100
mA
Electrostatic discharge
ESD
-
±1
Package Thermal Resistance
ΘJA
-
30
Norm: MIL 883 E method
3015
Velocity=0,
Multi Layer
°C/W
PCB; JEDEC Standard
Testboard
36
mW
125
°C
260
°C
85
%
Total power dissipation
Pt
Storage temperature
Tstrg
Package body temperature
Tbody
Humidity non-condensing
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-55
5
Revision 3.10
Norm: JEDEC 78
kV
Norm: IPC/JEDEC J-STD020C
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AS5011
Data Sheet
8.2 Operating conditions
(operating conditions: Tamb = -20 to +80°C, VDD = 3.3V)
Parameter
Symbol
Min
Core Supply voltage
VDD
Peripheral Supply voltage
VDDp
Current consumption on core
supply,
Typ
Max
Unit
2.7
3.6
V
1.8
VDD
+0.3
V
IDDs
50
µA
IDDl
200
µA
pulsed current IDDf during tconv
with period tP,A
IDDf
8
mA
continuous current pin VDD
µA
average current pin VDDp, 20ms
i²C polling, 47k pullup resistor on
SDA
pulsed current IDDf during tconv
with period tP,W
average current pin VDD
Low Power mode
Current consumption on core
supply,
open drain outputs : SCL, SDA,
INT/
average current pin VDD
Shutdown mode
Current consumption on core
supply,
Note
Full Power mode
Current consumption on IO supply
IDDp
1
Polling clock rate, Shutdown mode
tP,W
65.6
80
94.4
ms
internal
Polling clock rate, Low Power
mode
tP,A
16.4
20
23.6
ms
internal
Coordinate conversion time
tconv
330
380
455
µs
Full Power mode
lateral movement radius
dx
dy
±1.8
2
±2.3
mm
vertical magnetic field at magnet
centre, measured at the chip
surface
type of magnet
d
2
3
mm
cylindrical; axial magnetized
Hall array diameter
RH
magnetic field strength
BZ
30
120
mT
Tamb
-20
+80
°C
Ambient temperature range
2.2
mm
vertical magnetic field at magnet
center; measured at chip surface
Magnetic field measurement
resolution
11
bit
Internal
Resolution of XY displacement
8
bit
over 2*dx and 2*dy axis
100
nF
Ceramic capacitor VDD - VSS
100
nF
Ceramic capacitor VDDp - VSS
IC package
Power supply filtering capacitors
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QFN16
5x5x0.55mm
Revision 3.10
11 – 16
AS5011
Data Sheet
8.3
Digital IO pads DC/AC characteristics
Parameter
Symbol
Min
Max
Unit
Note
Inputs: SCL, SDA (receiver)
High level input voltage
0.7 *
VDDp
VIH
Low level input voltage
0.3 *
VDDp
VIL
Input leakage current
Capacitive load
V
0.25 *
VDDp
VDDp ≥ 2.7V
V
ILEAK
1
µA
CL
35
pF
VDDp < 2.7V
VDDp = 3.6V
Outputs: INTn, SDA (transmitter)
High level output voltage
VOH
Low level output voltage
VOL
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Open drain
Revision 3.10
VSS + 0.4
Leakage current 1 µA
V
-2mA
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AS5011
Data Sheet
9 Package Drawings
DIM
(mm)
A
A1
b
D
E
D1
E1
e
L
L1
MIN
NOM
0.50
0.55
0.152 REF
0.35
0.40
5.00 BSC
5.00 BSC
3.5
3.6
3.15
3.25
0.80 BSC
0.35
0.40
0.00
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MAX
0.60
0.45
3.7
3.35
0.45
0.10
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AS5011
Data Sheet
10 Recommended footprint
DIM
(mm)
C1
C2
E
X1
X2
Y1
Y2
Typ
4.8
4.8
0.8
0.45
3.7
0.9
3.7
RED: Top layer (AS5011 side)
BLUE: Bottom layer (mechanics side)
YELLOW: Top overlay
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Revision 3.10
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AS5011
Data Sheet
Table of contents
1
2
3
4
5
6
General Description........................................................................................................................................ 1
Benefits.......................................................................................................................................................... 1
Key Features.................................................................................................................................................. 1
Applications ................................................................................................................................................... 1
Package and pinout........................................................................................................................................ 2
Operating the AS5011 .................................................................................................................................... 3
6.1
Typical application ..................................................................................................................................... 3
6.2
XY coordinates interpretation ..................................................................................................................... 3
6.3
Magnet-chip surface airgap range.............................................................................................................. 4
6.4
Power modes............................................................................................................................................. 5
7
I²C interface ................................................................................................................................................... 8
7.1
Interface operation..................................................................................................................................... 8
7.2
I²C Registers.............................................................................................................................................. 9
8
Device specifications.................................................................................................................................... 10
8.1
Absolute maximum ratings (non operating) .............................................................................................. 10
8.2
Operating conditions ................................................................................................................................ 11
8.3
Digital IO pads DC/AC characteristics ...................................................................................................... 12
9
Package Drawings ....................................................................................................................................... 13
10
Recommended footprint ............................................................................................................................... 14
Table of contents .................................................................................................................................................. 15
Revision History .................................................................................................................................................... 15
Revision History
Revision
Date
3.10
November.3.2009
Description
•
Added recommended footprint
•
Added 0x75 register description
3.6
July. 3. 2009
•
Added AS5000-MA2H-1 Magnet reference
3.5
June. 8.2009
•
QFN 5x5x0.55mm package
•
I²C @ 4MHz max.
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Revision 3.10
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AS5011
Data Sheet
Copyrights
Copyright © 1997-2009, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions
appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by
description regarding the information set forth herein or regarding the freedom of the described devices from patent
infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and
without notice. Therefore, prior to designing this product into a system, it is necessary to check with
austriamicrosystems AG for current information. This product is intended for use in normal commercial
applications. Applications requiring extended temperature range, unusual environmental requirements, or high
reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not
recommended without additional processing by austriamicrosystems AG for each application.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited
to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special,
incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or
use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
A-8141 Schloss Premstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com/contact
www.austriamicrosystems.com
Revision 3.10
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