ANADIGICS ARA2017

ARA2017
Programmable Gain Amplifier
PRELIMINARY DATA SHEET - rev 1.0
features
• High Linearity, High Output Power Integrated
Amplifier with Programmable Gain Control
• Attenuation Range: 0-58 dB, Adjustable in
2 dB Increments via a 3-wire Serial Control
• 33 dB Gain (at Minimum Attenuation)
• Low Distortion Products at Output Power Levels
up to +64 dBmV
• Low Noise Figure and Output Noise
• Frequency range: 5-85 MHz
• 5 V Operation
• Materials set consistent with RoHS Directors.
Surface Mount Package
Applications
S29 Package
28-Pin QFN
5 mm x 5 mm x 1 mm
• DOCSIS 3.0 Data Cable Modems and E-MTAs
• CATV Set Top Boxes
PRODUCT DESCRIPTION
The ARA2017 is a highly linear, high output power,
programmable gain amplifier optimized for DOCSIS
3.0 cable modem and E-MTA applications. Using a
low noise input amplification stage and an ultra linear
output driver amplifier, the device generates extremely
low distortion products at the high output power levels
required by DOCSIS 3.0 signals. Its balanced circuit
design provides superior harmonic performance
and an integrated digitally-controlled, multiple-stage
precision step attenuator enables system solutions to
meet DOCSIS power step accuracy requirements.
The ARA2017 supports output power levels of +64
dBmV while minimizing harmonic, distortion, and
output noise levels. Its precision attenuator provides
up to 58 dB of attenuation in 2 dB increments. The
attenuator setting is programmed via a 3-wire serial
interface, as is the output stage current, a feature
which allows the device to be operated in reduced
power modes for extended backup battery life in
E-MTA applications. The ARA2017 is offered in a 28pin 5 mm x 5 mm x 1 mm QFN package.
Figure 1: Functional Block Diagram
07/2008
ARA2017
Figure 2: Pinout (X-Ray Top View)
Table 1: Pin Description
2
PIN
NAME
Amplifier A1 (+) Input
28
A1OUT+
Amplifier A1 (+) Output and
Supply
GND
Ground
27
ATTNIN+
Attentuator Input (+)
3
A1IN-
Amplifier A1 (-) Input
26
GND
Ground
4
GND
Ground
25
VATTN
Attenuator Supply
5
A1OUT-
Amplifier A1 (-) Output and Supply
24
GND
Ground
6
ATTNIN-
Attentuator Input (-)
23
7
N/C
No Connection
22
A2IN+
8
GND
Ground
21
A2OUT+
9
CLOCK
Clock
20
GND
Ground
10
DATA
Data
19
A2OUT-
Amplifier A2 (-) Output and Supply
11
ENBL
Enable
18
GND
Ground
12
N/C
No Connection (Reserved for
future use - leave floating)
17
A2IN-
Amplifier A2 (-) Input
13
TX_EN
Transmit Enable
16
14
VDD
Supply
15
PIN
NAME
1
A1IN+
2
DEScRIPTIoN
DEScRIPTIoN
ATTNOUT+ Attentuator Output (+)
Amplifier A2 (+) Input
Amplifier A2 (+) Output and
Supply
ATTNOUT- Attentuator Output (-)
N/C
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
No Connection
ARA2017
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PARAMETER
MIN
MAX
uNIT
coMMENTS
Supply: VDD (pins 5, 14, 19, 21, 28),
VATTN (pin 25)
0
+6
V
RF Power at Inputs (pins 1, 3)
-
+40
dBmV
Digital Interface (pins 9, 10, 11, 13)
-0.5
VDD+0.5
V
Storage Temperature
-55
+150
°C
differential into 200 V
Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under
these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability.
Table 3: Operating Ranges
PARAMETER
MIN
TYP
MAX
uNIT
5
-
85
MHz
Supply: VDD (pins 5, 14, 19, 21, 28)
+4.5
+5
+5.5
V
Digital Interface (pins 9, 10, 11, 13)
0
-
VDD
V
-20
+25
+85
°C
Operating Frequency (f)
Case Temperature (TC)
The device may be operated safely over these conditions; however, parametric performance is
guaranteed only over the conditions defined in the electrical specifications.
Table 4: Digital Interface Specifications
(VDD = +5.0 V)
PARAMETER
MIN
TYP
MAX
uNIT
Logic High Input Voltage: VIN,HIGH
+2.0
-
VDD
V
Logic Low Input Voltage: VIN,LOW
0
-
+0.8
V
Note:
1. Logic control levels apply to the 3-wire programming bus (pins 9, 10, 11) and the transmit
enable control (pin 13).
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
3
ARA2017
Table 5: Electrical Specifications
VDD = +5.0 V, TX Enabled, (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
uNIT
34
36
37
dB
0 dB attenuation setting
Gain Flatness
-
0.5
1.0
-
dB
5 to 42 MHz
5 to 85 MHz
Gain Variation over Temperature
-
-0.02
-
dB/°C
Gain Range with Attenuator
58
-
-
dB
Incremental Attenuator Step Size
1.5
2
2.5
dB
2nd Harmonic Distortion Level (2)
-
-67
-55
dBc
+64 dBmV into 75 V
3rd Harmonic Distortion Level (2)
-
-72
-55
dBc
+64 dBmV into 75 V
+88
+93
-
dBmV
1 dB Gain Compression (2)
-
+73
-
dBmV
Noise Figure
-
2.5
-
dB
Output Noise Power
Active / No Signal / Min. Atten. Set.
Active / No Signal / Max. Atten. Set.
-
-38.5
-53.8
-
dBmV
Isolation (85 MHz) in Tx disable mode
-
60
-
dB
Differential Input Impedance
-
200
-
V
between pins 1 and 3
(Tx enabled)
Differential Output Impedance
-
75
-
V
between pins 19 and 21
Output Impedance
-
75
-
V
with transformer
Output Return Loss
(75 Ohm characteristic impedance)
-
-15
-12
-
dB
Tx enabled
Tx disabled
Output Voltage Transient
Tx enable / Tx disable
-
50
7
-
mVp-p
Total Supply Current (2)
(pins 5, 14, 19, 21, 25, 28)
-
340
10.5
400
-
mA
Tx enabled (TX_EN high)
Tx disabled (TX_EN low)
Total Power Consumption
-
1.7
52.5
-
W
mW
Tx enabled (TX_EN high)
Tx disabled (TX_EN low)
Gain
3rd Order Output Intercept (2)
Notes:
1. As measured in ANADIGICS test fixture.
(2) Measured using the maximum current setting-see Application Information section.
4
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
coMMENTS
2 tone, +61 dBmV/tone
Full gain @ 0 dB attenuator
setting; Includes input balun
loss
Any 160 kHz bandwidth
from 5 to 85 MHz
0 dB attenuator setting
24 dB attenuator setting
DATA PLOTS
o
VDD =
36
ARA2017
figure ?: Gain vs frequency over Voltage
( Tc = 25 c )
Figure 3: Gain vs Frequency over Voltage
(TC = 25 8C)
+5V
+5.25V
+5.5V
+4.75V
+4.5V
Gain (dB)
35.5
35
34.5
34
33.5
33
0
20
40
60
80
100
120
frequency (Mhz)
figure ?: Gain vs Temperature
( VDc =4:+5V,
10MHz )
Figure
Gainf1
vs=Temperature
(VDC = +5V, F1 = 10 MHz)
Gain(dB)
NF dB
7
35
6
34
5
33
4
32
3
31
2
30
0
20
40
60
80
100
Nf(dB)
Gain dB
36
1
120
o
Temperature(case) c
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
5
ARA2017
figure ?: Nf vs frequency over Voltage
Figure 5: NF vs Frequency over Voltage
VDD =
4
+5V
+5.25V
+5.5V
+4.75V
+4.5V
Nf(dB)
3.5
3
2.5
2
o
Tc = +25 c
1.5
0
20
40
60
80
100
120
frequency (Mhz)
figure ?: output Power at 1dB Gain
compression (P1dB) vs. case Temperature
Figure 6: Output Power at 1dB Gain Compres( VDD = +5V, f1 = 10MHz )
sion (P1dB) vs. Case Temperature
(VDD = +5V, F1 = 10MHz)
77
76.5
P1dB(dBmV)
76
75.5
75
74.5
74
73.5
73
0
20
40
60
80
o
case Temperature ( c)
6
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
100
120
ARA2017
figure ?: output Power at 1dB Gain
compression
(P1dB)
vs Voltage
Figure
7: Output Power
at 1dB Gain
Compreso
vs =
Voltage
(sion
Tc =(P1dB)
25 c, f1
10MHz )
(TC = 25 8C, F1 = 10MHz)
77
76.5
P1dB (dBmV)
76
75.5
75
74.5
74
73.5
73
4.4
4.6
4.8
5
5.2
5.4
(Vdc)
figure ?: output Third Voltage
order Intercept
Point (oIP3)
5.6
vs. case Temperature
Figure 8: Output Third Order Intercept Point
(OIP3) vs. Case Temperature
95
94
93
oIP3(dBmV)
92
91
90
89
88
Vdd = +5Vdc
f1 = 10mHz, f2 = 11mHz
87
86
85
0
20
40
60
80
100
120
o
case Temperature( c)
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
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ARA2017
figure Figure
?: output
Third order Intercept Point (oIP3)
9: Output Third Order Intercept Point
vsvsVoltage
(OIP3)
Voltage
92
91
90
oIP3 (dBmV)
89
88
87
86
85
o
Tcase = +25 c
f1 = 10mHz, f2 = 11mHz
84
83
82
4.4
4.6
4.8
5
5.2
5.4
5.6
Voltage (Vdc)
figure ?: Attenuator Accuracy over frequency
o
Figure 10: Attenuator
over= Frequency
Tc =Accuracy
25 c, Vdc
+5V
(TC = 25 8C, VDC = +5V)
Measured Attenuation (dB)
35
ATTENUATOR SETTING =
2dB
4dB
8dB
16dB
32dB
30
25
20
15
10
5
0
10
20
30
40
50
60
frequency (MHz)
8
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
70
80
90
100
ARA2017
figure ?: Attenuator accuracy over Voltage
o
( Tc = +25Accuracy
c, f1 =over
10mHz
)
Figure 11:Attenuator
Voltage
(TC = +25 8C, F1 = 10MHz)
Measured Attenuation(dB)
35
ATTENUATOR SETTING =
2dB
4dB
8dB
4.9
5
16dB
32dB
30
25
20
15
10
5
0
4.5
4.6
4.7
4.8
5.1
5.2
5.3
5.4
5.5
Supply Voltage, Vdd (Vdc)
figure ?: Attenuator Accuracy over Temperature
Measured Attenuation(dB)
35
Figure 12: Attenuator
Temperature
( Vdc = Accuracy
+5V, f1 =over
10mHz
)
(VDC = +5V, F1 = 10MHz)
ATTENUATOR SETTING =
2dB
4dB
8dB
16dB
32dB
30
25
20
15
10
5
0
25
35
45
55
65
o
75
85
95
case Temperature ( c)
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
9
ARA2017
(2)
Figure 13: Test Circuit
NOTES:
1. Pin 12 is reserved for future use. Do not connect (leave floating).
(2) Input balun is used for evaluation test purposes only in 75 V system. Actual application does not require a 4:1 balun on
the input.
10
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
ARA2017
LOGIC PROGRAMMING
Programming Instructions
The programming word is set through a 10 bit shift
register via the data, clock and enable lines. The
data is entered in order with the most significant bit
(MSB) first and the least significant bit (LSB) last. The
enable line must be low for the duration of the data
entry, then set high to latch the shift register. The
rising edge of the clock pulse shifts each data value
into the register.
Table 6: Programming Register
DATA BIT
fuNcTIoN
9
8
7
Current
6
5
4
Gain
3
2
1
0
0
1
Notes:
1. Refer to Application Information section for Current and Gain bit settings.
2. Data bit 0 should always be set to “1”.
3. Data bit 1 is reserved for future use, and should be set to “0”.
Figure 14: Serial Data Input Timing
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
11
ARA2017
APPLICATION INFORMATION
Transmit Enable / Disable
Output Transformer
Gain/Attenuator Setting
The transformer also cancels even mode distortion
products and common mode signals, such as the
voltage transients that occur while enabling and
disabling the amplifiers. As a result, care must be
taken when selecting the transformer to be used at
the output. It must be capable of handling the RF and
DC power requirements without saturating the core,
and it must have adequate isolation and good phase
and amplitude balance. It also must operate over
the desired frequency and temperature range for the
intended application.
The ARA2017 can be switched on (TX enable) and off
(TX disable) via an asynchronous input TX_EN (pin
13). A logic high will turn the amplifier on. The gain
and current settings are retained during Tx disable
and do not need to be reloaded.
The gain of the ARA2017 can be controlled via the
3-wire bus. Data bits D2 through D6 set the gain/
attenuator level, with 00000 being the min gain setting,
and 11111 being the max gain setting. A new gain/
attenuator setting can be loaded while the PGA is on
(TX enable), but will not take effect until TX_EN has
been cycled off /on.
Output Stage Current Setting
The ARA2017 consists of 2 gain stages. The input
stage operates at a constant fixed current when TX
is enabled. The current in the output stage can be
controlled via the 3-wire bus. Data bits D7 – D9 set
the current. 111 will set the output stage to maximum
current for maximum linearity. The current can be
lowered for improved efficiency at lower output
power levels, or lower linearity requirements. 000 will
turn both stages off, the same as TX disable. A new
current setting can be loaded while the PGA is on (TX
Enable), but will not take effect until TX_EN has been
cycled off /on.
12
Matching the balanced output of the ARA2017 to a
single-ended 75  load is accomplished using a 1:1
turns ratio transformer. In addition to the balanced to
single-ended conversion, this transformer provides the
bias to the output amplifier stage via the center tap.
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
ARA2017
PACKAGE OUTLINE
Figure 15: S29 Package Outline - 28 Pin 5 mm x 5 mm x 1 mm QFN
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
13
ARA2017
Figure 16: Land Pattern
14
PRELIMINARY DATA SHEET - Rev 1.0
07/2008
ARA2017
ORDERING INFORMATION
oRDER
NuMBER
TEMPERATuRE
RANGE
PAcKAGE
DEScRIPTIoN
coMPoNENT PAcKAGING
ARA2017RS29P8
-20 oC to +85 oC
28 Pin QFN Package
5 mm x 5 mm x 1 mm
Tape and Reel, 2500 pieces per Reel
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers
to verify that the information they are using is current before placing orders.
warning
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product
in any such application without written consent is prohibited.
15
PRELIMINARY DATA SHEET - Rev 1.0
07/2008