ANADIGICS AWT6321

AWT6321
HELP2TM Dual-band Cellular/PCS CDMA
3.4 V Linear Power Amplifier Module
Data Sheet - Rev 2.2
FEATURES
• InGaP HBT Technology
• High Efficiency:
19 % @ +16 dBm
39 % @ +28 dBm
• Low Quiescent Current: 15 mA
• Internal Voltage Regulation
• Common VMODE Control Line
• Simplified VCC Bus PCB routing
• Reduced External Component Count
• Low Profile Surface Mount Package: 1 mm
• RoHS Compliant Package, 250 oC MSL-3
• Suitable for BC10 (806-824 MHz) band
applications
M28 Package
14 Pin 3 mm x 5 mm x 1 mm
Surface Mount Module
APPLICATIONS
• CDMA/EVDO & Cell & PCS Dual-band Wireless
Handsets and Data Devices
PRODUCT DESCRIPTION
The AWT6321 addresses the demand for increased
integration in dual-band handsets for North American
CDMA network deployments. The small footprint 3
mm x 5 mm x 1 mm surface mount RoHS compliant
package contains independent RF PA paths to ensure
optimal performance in both frequency bands, while
achieving a 25% PCB space savings compared with
solutions requiring two single-band PAs. The package
pinout was chosen to enable handset manufacturers
to easily route VCC to both power amplifiers and
simplify control with a common V MODE pin. The
device is manufactured on an advanced InGaP HBT
MMIC technology offering state-of-the-art reliability,
temperature stability, and ruggedness. The AWT6321
is part of ANADIGICS’ High-Efficiency-at-Low-Power
(HELP™) family of CDMA power amplifiers, which
deliver low quiescent currents and significantly
greater efficiency without a costly external DAC or
DC-DC converter. Through selectable bias modes, the
AWT6321 achieves optimal efficiency across different
output power levels, specifically at low- and midrange power levels where the PA typically operates,
thereby dramatically increasing handset talk-time and
standby-time. Its built-in voltage regulator eliminates
the need for external switches. The 3 mm x 5 mm x
1 mm surface mount package incorporates matching
networks optimized for output power, efficiency and
linearity in a 50 Ω system.
10/2008
Figure 1: Block Diagram
AWT6321
Figure 2: Pinout
Table 1: Pin Description
PIN
NAME
DESCRIPTION
1
VEN_CELL
Enable Voltage for Cell Band
2
RFIN_CELL
RF Input for Cell Band
3
VMODE
Mode Control Voltage for Cell
and PCS Bands
4
VBATT
Battery Voltage
5
N/C
No Connection
6
RFIN_PCS
RF Input for PCS Band
7
VEN_PCS
Enable Voltage for PCS Band
8
RFOUT_PCS
9
GND
Ground
10
GND
Ground
11
VCCA
Battery Voltage A
12
VCC
13
14
2
RF Output for PCS Band
Supply Voltage
RFOUT_CELL RF Output for Cell Band
GND
Ground
Data Sheet - Rev 2.2
10/2008
AWT6321
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PARAMETER
MIN
MAX
UNIT
Supply Voltage (VBATT, VCC, VCCA)
0
+5
V
Mode Control Voltage (VMODE)
0
+3.5
V
Enable Voltage (VEN_CELL, VEN_PCS)
0
+3.5
V
RF Input Power (PIN)
-
+10
dBm
-40
+150
°C
Storage Temperature (TSTG)
Stresses in excess of the absolute ratings may cause permanent damage.
Functional operation is not implied under these conditions. Exposure
to absolute ratings for extended periods of time may adversely affect
reliability.
Table 3: Operating Ranges
PARAMETER
MIN
TYP
MAX
UNIT
Operating Frequency (f)
824
1850
-
849
1915
MHz
Supply Voltage (VCC and VBATT)
+3.2
+3.4
+4.2
V
Enable Voltage (VEN)
+2.2
0
+2.4
-
+3.1
+0.5
V
PA "on"
PA "shut down"
Mode Control Voltage (VMODE)
+2.2
0
+2.4
-
+3.1
+0.5
V
Low Bias Mode
High Bias Mode
Cellular RF Output Power (POUT)
CDMA
+27.5
(1)
+28.0
-
dBm
PCS RF Output Power (POUT)
CDMA
+27.5
(1)
+28.0
-
dBm
-
+85
°C
Case Temperature (TC)
-30
COMMENTS
Cellular
PCS
The device may be operated safely over these conditions; however, parametric performance is guaranteed only
over the conditions defined in the electrical specifications.
Notes:
(1)For operation at VCC = +3.2 V, POUT is derated by 0.5 dB.
Data Sheet - Rev 2.2
10/2008
3
AWT6321
Table 4: Electrical Specifications - Cellular Band
(TC = +25 °C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 Ω system, IS-95 uplink waveform)
PARAMETER
MIN
TYP
MAX
UNIT
24.0
15.0
15.5
26.0
16.5
17.0
29.0
19.0
20.0
dB
-
-50
-53
-53
-46.5
-47
-47
dBc
-
-65
-60
-57
-57
dBc
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
36
18
39
22
-
%
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
Quiescent Current (Icq)
-
15
20
mA
VMODE = +2.4 V, Low Bias
Enable Current
-
0.4
0.8
mA
through VEN pin, VMODE = +2.4 V
Battery Current
-
2.5
5
mA
through VBATT pin, VMODE = +2.4 V
Mode Control Current
-
0.75
1.0
mA
through VMODE pin, VMODE = +2.4 V
Leakage Current
-
<1
5
A
VCC = +4.2 V, VEN = 0 V,
VMODE = 0 V
Noise in Receive Band
-
-133
-131
dBm/Hz
Harmonics
2fo
3fo, 4fo
-
-42
-50
-30
-30
dBc
Input Impedance
-
-
2:1
VSWR
Gain
Adjacent Channel Power
at 885 kHz offset (1)
Primary Channel BW = 1.23 MHZ
Adjacent Channel BW = 30 kHz
Adjacent Channel Power
at 1.98 MHz offset (1)
Primary Channel BW = 1.23 MHZ
Adjacent Channel BW = 30 kHz
Power-Added Efficiency (1)
Spurious Output Level
(all spurious outputs)
Load mismatch stress with no
permanent degradation or failure
-
-
-65
dBc
8:1
-
-
VSWR
Notes:
(1) PAE and ACP limit applies at 836.5 MHz.
4
Data Sheet - Rev 2.2
10/2008
COMMENTS
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
POUT = +17 dBm, VMODE = +2.4 V,
VCC = +3.7 V
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
POUT = +17 dBm, VMODE = +2.4 V,
VCC = +3.7 V
869 MHz to 894 MHz
POUT < +28 dBm
In-band Load VSWR < 5:1
Out-of-band Load VSWR < 10:1
Applies over all operating
conditions
Applies over all operating
conditions
AWT6321
Table 5: Electrical Specifications - PCS Band
(TC = +25 °C, VBATT = VCC = +3.4 V, VENABLE = +2.4 V, 50 Ω system, IS-95 uplink waveform)
PARAMETER
MIN
TYP
MAX
UNIT
Gain
25.0
12.5
13.0
27.0
14.5
15.5
30.0
17.0
18.0
dB
-
-50
-55
-51
-46.5
-47
-47
dBc
Adjacent Channel Power
at + 1.98 MHz offset
Primary Channel = 1.23 MHz
Adjacent Channel = 30 kHz
-
-56
-56
-53
-53
dBc
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
Adjacent Channel Power
at +2.25 MHz offset
Primary Channel BW =1.23 MHz
Adjacent Channel BW = 30 kHz
-
-63
-61
-57
-57
dBc
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
Power-Added Efficiency
35.5
15
39
17
-
%
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
Quiescent Current (Icq)
-
15
20
mA
through VCC pin, VMODE = +2.4 V
Enable Current
-
0.3
0.8
mA
through VEN pin, PA "on"
Mode Control Current
-
0.75
1.0
mA
through VMODE pin, VMODE = +2.4 V
Battery Current
-
3
5
mA
through VBATT pin, VMODE = +2.4 V
Leakage Current
-
<1
5
µA
VCC = +4.2 V, VEN = 0 V,
VMODE = 0 V
Noise in Receive Band
-
-134
-132
Harmonics
2fo
3fo, 4fo
-
-43
-55
-30
-30
dBc
Input Impedance
-
-
2:1
VSWR
Adjacent Channel Power
at +1.25 MHz offset
Primary Channel BW =1.23 MHz
Adjacent Channel BW = 30 kHz
Spurious Output Level
(all spurious outputs)
Load mismatch stress with no
permanent degradation or failure
COMMENTS
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
POUT = +18 dBm, VMODE = +2.4 V,
VCC = +3.7 V
POUT = +28 dBm, VMODE = 0 V
POUT = +16 dBm, VMODE = +2.4 V
POUT = +18 dBm, VMODE = +2.4 V,
VCC = +3.7 V
dBm/Hz 1930 MHz to 1990 MHz
-
-
-65
dBc
POUT < +28 dBm
In-band load VSWR < 5:1
Out-of-band load VSWR < 10:1
Applies over all operating ranges
8:1
-
-
VSWR
Applies over full operating range
Notes:
1. ACPRs and Efficiency limits at mid-band only.
Data Sheet - Rev 2.2
10/2008
5
AWT6321
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site:
http://www.anadigics.com
Shutdown Mode
The power amplifier may be placed in a shutdown
mode by applying logic low levels (see Operating
Ranges table) to the VENABLE and VMODE voltages.
Bias Modes
The power amplifier may be placed in either a Low Bias
mode or a High Bias mode by applying the appropriate
logic level (see Operating Ranges table) to the VMODE
voltages. The Bias Control table lists the recommended
modes of operation for various applications.
Table 6: Bias Control
POUT
LEVELS
BIAS
MODE
VENABLE
VMODE
VCC
VBATT
CDMA - low power
< +16 dBm
Low
+2.4 V
+2.4 V
3.2 - 4.2 V
> 3.2 V
CDMA - high power
> +16 dBm
High
+2.4 V
0V
3.2 - 4.2 V
> 3.2 V
Optional lower VCC in low power
mode
< +7 dBm
Low
+2.4 V
+2.4 V
1.5 V
> 3.2 V
-
Shutdown
0V
0V
3.2 - 4.2 V
> 3.2 V
APPLICATION
Shutdown
GND at slug (pad)
VEN_CELL
0.01 F
(1)
1
14 GND
Bias Control
(2)
RFIN_CELL
TRL1
VMODE
2
13
3
12
4
11
(2)
68 pF
TRL2
RFOUT_CELL
VCC
1000 pF
(3)
VBATT
TRL5
2.2 F
10 F
(1)
RFIN_PCS
N/C 5
10 GND
6
9 GND
(2)
TRL3
Bias Control
7
VEN_PCS
(2)
8
0.01 F
TRL4
15 pF
RFOUT_PCS
GND
Note:
(1) Add blocking cap if DC voltage is present on input pin.
(2) TRL should be short and of 50  characteristic impedance.
(3) TRL 5 should be as long as possible (minimum of 0.1  at 800 MHz) and capable of handling 1200 mA current.
Figure 3: Application Circuit
6
Data Sheet - Rev 2.2
10/2008
AWT6321
PACKAGE OUTLINE
Figure 4: Package Outline - 14 Pin 3 mm x 5 mm x 1 mm Surface Mount Module
Figure 5: Branding Specification
Data Sheet - Rev 2.2
10/2008
7
AWT6321
ORDERING INFORMATION
ORDER
NUMBER
TEMPERATURE
RANGE
PACKAGE
DESCRIPTION
COMPONENT PACKAGING
AWT6321RM28Q7
-20 °C to +85 °C
RoHS Compliant 14 Pin
3 mm x 5 mm x 1 mm
Surface Mount Module
Tape and Reel, 2500 pieces per Reel
AWT6321RM28P9
-20 °C to +85 °C
RoHS Compliant 14 Pin
3 mm x 5 mm x 1 mm
Surface Mount Module
Partial Tape and Reel
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: [email protected]
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers
to verify that the information they are using is current before placing orders.
warning
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product
in any such application without written consent is prohibited.
8
Data Sheet - Rev 2.2
10/2008