ANADIGICS AWU6604RM45P9

AWU6604
HELP3 Band 4 & 9 WCDMA
3.4 V / 28.25 dBm Linear PA Module
TM
Data Sheet - Rev 2.0
FEATURES
• HSPA Compliant
• InGaP HBT Technology
• Low Quiescent Current with only 2 Bias Modes
AWU6604
• Simpler Calibration
• High Efficiency: (R99 waveform)
39 % @ POUT = +28.25 dBm
21 % @ POUT = +16 dBm
• Low Quiescent Current: 9.0 mA
• Low Leakage Current in Shutdown Mode: <1 µA
• Internal Voltage Regulator
• Integrated “daisy chainable” directional couplers
with CPLIN and CPLOUT Ports
M45 Package
10 Pin 3 mm x 3 mm x 1 mm
Surface Mount Module
• Optimized for a 50 Ω System
• Low Profile Miniature Surface Mount Package
• RoHS Compliant Package, 260 oC MSL-3
APPLICATIONS
• WCDMA/HSPA AWS/UMTS1700-Band Wireless
Handsets and Data Devices
PRODUCT DESCRIPTION
The AWU6604 HELP3 TM PA is a 3rd generation
WCDMA product for UMTS handsets. This PA
incorporates ANADIGICS’ HELP3TM technology to
provide low power consumption without the need
for an external voltage regulator. A “daisy chainable”
directional coupler is integrated in the module thus
eliminating the need of external couplers. The
device is manufactured on an advanced InGaP HBT
MMIC technology offering state-of-the-art reliability,
temperature stability, and ruggedness. There are two
selectable bias modes that optimize efficiency for
different output power levels, and a shutdown mode
with low leakage current, which increases handset talk
and standby time. The self-contained 3 mm x 3 mm x
1 mm surface mount package incorporates matching
networks optimized for output power, efficiency, and
linearity in a 50 Ω system.
GNDatSlug(pad)
VBATT
1
RFIN
2
VMODE2 (N/C)
3
VMODE1
VEN
10
9
RFOUT
8
CPLIN
4
7
GND
5
6
CPLOUT
CPL
Bias Control
VoltageRegulation
Figure 1: Block Diagram
10/2009
VCC
AWU6604
VBATT
1
10
RFIN
2
9
RFOUT
VMODE2 (N/C)
3
8
CPLIN
VMODE1
4
7
GND
VEN
5
6
CPLOUT
Figure 2: Pinout (X-ray Top View)
Table 1: Pin Description
PIN
NAME
DESCRIPTION
1
VBATT
Battery Voltage
2
RFIN
RFInput
3
2
VMODE2 (N/C) No Connection
4
VMODE1
5
VEN
6
CPLOUT
7
GND
Ground
8
CPLIN
Coupler Input
9
RFOUT
RFOutput
10
VCC
Mode Control Voltage 1
PA Enable Voltage
Coupler Output
Supply Voltage
Data Sheet - Rev 2.0
10/2009
VCC
AWU6604
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PARAMETER
MIN
MAX
UNIT
SupplyVoltage(VCC)
0
+5
V
BatteryVoltage(VBATT)
0
+6
V
ControlVoltages(VMODE1,VENABLE)
0
+3.5
V
RFInputPower(PIN)
-
+10
dBm
-40
+150
°C
StorageTemperature(TSTG)
Stresses in excess of the absolute ratings may cause permanent damage.
Functional operation is not implied under these conditions. Exposure
to absolute ratings for extended periods of time may adversely affect
reliability.
Table 3: Operating Ranges
PARAMETER
MIN
TYP
MAX
UNIT
OperatingFrequency(f)
1710
-
1785
MHz
SupplyVoltage(VCC)
+3.2
+3.4
+4.2
V
POUT < +28.25 dBm
EnableVoltage(VENABLE)
+2.15
0
+2.4
0
+3.1
+0.5
V
PA "on"
PA "shut down"
ModeControlVoltage(VMODE1)
+2.15
0
+2.4
0
+3.1
+0.5
V
Low Bias Mode
High Bias Mode
27.75(1)
26.75(1)
15.5(1)
14.5(1)
28.25
27.25
16
15
28.25
27.25
16
15
dBm
-30
-
+90
°C
RFOutputPower(POUT)
R99WCDMA,HPM
HSPA(MPR=0),HPM
R99WCDMA,LPM
HSPA(MPR=0),LPM
CaseTemperature(TC)
COMMENTS
3GPPTS34.121-1,Rel8
Table C.11.1.3
The device may be operated safely over these conditions; however, parametric performance is guaranteed only
over the conditions defined in the electrical specifications.
Notes:
(1) For operation at Vcc = +3.2 V, Pout is derated by 0.5 dB.
Data Sheet - Rev 2.0
10/2009
3
AWU6604
Table 4: Electrical Specifications
(TC = +25 °C, VCC = +3.4 V, VBATT = +3.4 V, VENABLE = +2.4 V, 50 Ω system, R99 waveform)
PARAMETER
MIN
TYP
MAX
UNIT
Gain
24.5
11.5
27
14
29.5
16.5
dB
-
-42
-44
-38
-38
-
-55
-54
-48
-48
35
18
38.5
21
QuiescentCurrent(Icq)
Low Bias Mode
-
Mode Control Current
COMMENTS
POUT
VMODE1
+28.25 dBm
+16 dBm
0V
2.4 V
+28.25 dBm
+16 dBm
0V
2.4 V
dBc
+28.25 dBm
+16 dBm
0V
2.4 V
-
%
+28.25 dBm
+16 dBm
0V
2.4 V
9.0
14
mA
VMODE1 = +2.4 V
-
0.35
0.6
mA
through VMODEpin,VMODE1 = +2.4 V
Enable Current
-
0.35
0.6
mA
through VENABLE pin
BATT Current
-
2.5
5
mA
through VBATTpin,VMODE1 = +2.4 V
Leakage Current
-
<1
5
µA
VBATT=+4.2V,VCC=+4.2V,
VENABLE=0V,VMODE1=0V
NoiseinReceiveBand
-
-136
-145
-137
-134
-141
-135
Harmonics
2fo
3fo,4fo
-
-42
-46
-35
-35
dBc
Input Impedance
-
-
2:1
VSWR
CouplingFactor
-
20
-
dB
Directivity
-
19
-
dB
ACLR1at5MHzoffset(1)
ACLR2at10MHzoffset
Power-Added Efficiency (1)
SpuriousOutputLevel
(allspuriousoutputs)
Load mismatch stress with no
permanent degradation or failure
dBc
1845-1880MHz
dBm/Hz 2110-2155MHz
1574.4 - 1576.4 MHz
-
-
-70
dBc
POUT < +28.25 dBm
In-bandloadVSWR<5:1
Out-of-bandloadVSWR<10:1
Appliesoveralloperating
conditions
8:1
-
-
VSWR
Appliesoverfulloperatingrange
Notes:
(1) ACLR and Efficiency measured at 1747.5 MHz.
4
POUT < +28.25 dBm
Data Sheet - Rev 2.0
10/2009
AWU6604
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site:
http://www.anadigics.com
Shutdown Mode
The power amplifier may be placed in a shutdown
mode by applying logic low levels (see Operating
Ranges table) to the VENABLE and VMODE1 voltages.
Bias Modes
The power amplifier may be placed in either a Low Bias
mode or a High Bias mode by applying the appropriate
logic level (see Operating Ranges table) to VMODE1.
The Bias Control table lists the recommended modes
of operation for various applications. VMODE2 is not
necessary for this PA.
Two operating modes are available to optimize
current consumption. High Bias/High Power operating
mode is for POUT levels > 15 dBm. At around 16 dBm
output power, the PA should be “Mode Switched” to
Medium/Low power mode for lowest quiescent current
consumption.
Table 5: Bias Control (UMTS)
POUT
LEVELS
BIAS MODE
VENABLE
VMODE1
VCC
VBATT
UMTS - med/low power
(LowBiasMode)
< +16 dBm
Low
+2.4 V
+2.4 V
3.2 - 4.2 V
> 3.2 V
UMTS - high power
(HighBiasMode)
> +15 dBm
High
+2.4 V
0V
3.2 - 4.2 V
> 3.2 V
Optional lower VCC in low
power mode
< +6 dBm
Low
+2.4 V
+2.4 V
1.5 V
> 3.2 V
-
Shutdown
0V
0V
3.2 - 4.2 V
> 3.2 V
APPLICATION
Shutdown
Data Sheet - Rev 2.0
10/2009
5
AWU6604
CHARACTERIZATION DATA
(WCDMA Rel 99, VCC = 3.4 V, VEN = 2.4 V, T = 25 8C)
Figure 4: Current vs Output Power
Figure 3: Gain vs Output Power
550
30
500
25
450
Gain (dB)
Current (mA)
1747.5MHz
20
1710MHz
1747.5MHz
400
1710MHz
1785MHz
15
10
1785MHz
350
300
250
200
150
100
5
50
0
0
-10
-5
0
5
10
15
20
25
30
-10
-5
0
5
1710MHz
25
30
-45
1747.5MHz
-35
1785MHz
1710MHz
-50
-40
1747.5MHz
1785MHz
ACLR2 (dBc)
ACLR1 (dBc)
20
-40
-30
-45
-50
-55
-55
-60
-65
-70
-60
-75
-80
-65
-10
-5
0
5
10
15
20
25
30
-10
Figure 7: Efficiency vs Output Power
45
40
35
1710MHz
1747.5MHz
30
1785MHz
25
20
15
10
5
0
-10
-5
0
5
10
-5
0
5
10
Pout (dBm)
Pout (dBm)
PAE (%)
15
Figure 6: ACLR2 (10 MHz offset) vs Output
Figure 5: ACLR1 (5 MHz offset) vs Output Power
15
20
25
30
Pout (dBm)
6
10
Pout (dBm)
Pout (dBm)
Data Sheet - Rev 2.0
10/2009
15
20
25
30
AWU6604
CHARACTERIZATION DATA
(HSPA, Rel 8, VCC = 3.4 V, VEN = 2.4 V, T = 25 8C)
Figure 9: Current vs Output Power
Figure 8: Gain vs Output Power
30
550
500
25
450
1710MHz
1785MHz
Current (mA)
Gain (dB)
20
1710MHz
1747.5MHz
400
1747.5MHz
15
10
1785MHz
350
300
250
200
150
100
5
50
0
-10
-5
0
5
10
15
20
25
0
30
-10
-5
0
5
Pout (dBm)
15
20
25
30
Figure 11: ACLR2 (10 MHz offset) vs Output
Figure 10: ACLR1 (5 MHz offset) vs Output
-30
-40
1710MHz
-45
1747.5MHz
-35
1785MHz
1710MHz
-50
1747.5MHz
1785MHz
-40
ACLR2 (dBc)
ACLR1 (dBc)
10
Pout (dBm)
-45
-50
-55
-60
-65
-70
-55
-75
-60
-10
-5
0
5
10
15
20
25
30
-80
-10
Pout (dBm)
-5
0
5
10
15
20
25
30
Pout (dBm)
Figure 12: Efficiency vs Output Power
40
35
30
1710MHz
1747.5MHz
PAE (%)
25
1785MHz
20
15
10
5
0
-10
-5
0
5
10
15
20
25
30
Pout (dBm)
Data Sheet - Rev 2.0
10/2009
7
AWU6604
VBATT
VCC
C6
2.2µF
C1
33pF
C2
0.1µF
GND at slug
1
2
RFIN
VMODE1
VEN
10
VBATT
VCC
RFIN
RFOUT
9
3
VMODE2 (N/C) CPLIN
8
4
VMODE1
GND
7
5
VEN
CPLIN
CPLOUT 6
VCC
GND
GND
VBATT
Figure 13: Evaluation Circuit Schematic
RFIN
RFOUT
C3
C2
C1
C4
CPLOUT
VMODE1
VEN
GND
GND
VMODE2
C5
CPLIN
Figure 14: Evaluation Board Layout
8
Data Sheet - Rev 2.0
10/2009
C4
68pF
RFOUT
CPLOUT
C5
0.01µF
C6
C3
2.2µF ceramic
AWU6604
The AWU6604 power amplifier module is based on
ANADIGICS proprietary HELP3™ technology. The
PA is designed to operate up to 17 dBm in the low
power mode, thus eliminating the need for three gain
state, while still maintaining low quiescent current
and high efficiency in low and medium power levels.
The PA can still be operated as 3 gain state device
if the customer chooses to. The directional “daisy
chainable” coupler is integrated within the PA module,
therefore there is no need for external couplers.
AWU6604 requires only two calibration sweeps for
system calibration, thus saving calibration time.
Figure 16 shows one application example on mobile
board. C1 and C2 are RF bypass caps and should
be placed nearby pin 1 and pin 10. Bypass caps
C9 and C5 may not be needed. Also a “T” matching
topology is recommended at PA RFIN and RFOUT
ports to provide matching between input TX Filter and
Duplexer / Isolator.
Figure 15: PDF and Current
The AWU6604 has an integrated voltage regulator,
which eliminates the need for an external constant
voltage source. The PA is turn on/off is controlled
by VEN pin. A single VMODE control logic (VMODE1) is
needed to operate this device.
500
0.140
DG09 PDF
0.130
AWU6604 (mA)
0.120
450
400
0.110
350
0.100
DG09 PDF
The DG09 power distribution (figure 15) highlights
the need to improve the current consumption in low
and medium power level. The AWU6604 is designed
to operate up to 17 dBm in the low power mode with
very low quiescent current. Current consumption for
AWU6604 is also plotted in the figure 5.
33.7 mA Average Current over DG09 Profile
0.150
300
0.090
0.080
250
0.070
0.060
200
0.050
150
0.040
0.030
100
0.020
50
0.010
0.000
-60
AWU6601 Current (mA)
HELP3
0
-50
-40
-30
-20
-10
0
10
20
30
Antenna Power (dBm)
Figure 16: Typical Application Circuit
Data Sheet - Rev 2.0
10/2009
9
AWU6604
PACKAGE OUTLINE
Figure 17: M45 Package Outline - 10 Pin 3 mm x 3 mm x 1 mm Surface Mount Module
Pin 1 Identifier
Date Code
YY=Year; WW=Work week
6604R
Part Number
LLLLNN
YYWWCC
Lot Number
Country Code (CC)
Figure 18: Branding Specification - M45 Package
10
Data Sheet - Rev 2.0
10/2009
AWU6604
PCB AND STENCIL DESIGN GUIDELINE
Figure 19: Recommended PCB Layout Information
Data Sheet - Rev 2.0
10/2009
11
AWU6604
COMPONENT PACKAGING
Pin 1
Figure 20: Tape & Reel Packaging
Table 6: Tape & Reel Dimensions
12
PACKAGE TYPE
TAPE WIDTH
POCKET PITCH
REEL CAPACITY
MAX REEL DIA
3 mm x 3 mm x 1 mm
12 mm
4 mm
2500
7"
Data Sheet - Rev 2.0
10/2009
AWU6604
ORDERING INFORMATION
ORDER NUMBER
TEMPERATURE
RANGE
PACKAGE
DESCRIPTION
AWU6604RM45Q7
-30oCto+90oC
RoHSCompliant10Pin
3 mm x 3 mm x 1 mm TapeandReel,2500piecesperReel
Surface Mount Module
AWU6604RM45P9
-30oCto+90oC
RoHSCompliant10Pin
3 mm x 3 mm x 1 mm PartialTapeandReel
Surface Mount Module
COMPONENT PACKAGING
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.
The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers
to verify that the information they are using is current before placing orders.
warning
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product
in any such application without written consent is prohibited.
13
Data Sheet - Rev 2.0
10/2009