AOT12N50 / AOTF12N50 500V, 12A N-Channel MOSFET General Description Features The AOT12N50 & AOTF12N50 have been fabricated using an advanced high voltage MOSFET process that is designed to deliver high levels of performance and robustness in popular AC-DC applications. By providing low RDS(on), Ciss and Crss along with guaranteed avalanche capability these parts can be adopted quickly into new and existing offline power supply designs. Top View TO-220 VDS (V) =600V@150°C ID = 12A RDS(ON)< 0.52Ω (V GS = 10V) 100% UIS Tested! 100% R g Tested! D TO-220F G G D G S D S S Absolute Maximum Ratings TA=25°C unless otherwise noted AOT12N50 Parameter Symbol AOTF12N50 VDS Drain-Source Voltage 500 VGS Gate-Source Voltage ±30 Continuous Drain Current B Pulsed Drain Current TC=25°C TC=100°C C ID IDM 12 12* 7.6 7.6* Units V V A 48 Avalanche Current C IAR 5.5 A Repetitive avalanche energy C EAR 454 mJ Single pulsed avalanche energy Peak diode recovery dv/dt TC=25°C B Power Dissipation Derate above 25oC EAS dv/dt 908 5 mJ V/ns W Junction and Storage Temperature Range Maximum lead temperature for soldering purpose, 1/8" from case for 5 seconds Thermal Characteristics Parameter TJ, TSTG G PD Alpha & Omega Semiconductor, Ltd. A 50 1.7 0.4 TL Symbol RθJA A R θCS Maximum Case-to-Sink RθJC Maximum Junction-to-Case D,F * Drain current limited by maximum junction temperature. Maximum Junction-to-Ambient 208 -50 to 150 W/ oC °C 300 °C AOT12N50 65 AOTF12N50 65 Units 0.5 2.5 °C/W °C/W 0.6 °C/W www.aosmd.com AOT12N50/AOTF12N50 Electrical Characteristics (T J=25°C unless otherwise noted) Parameter Symbol STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage BVDSS Breakdown Voltage Temperature /∆TJ Coefficient IDSS Zero Gate Voltage Drain Current Conditions Min ID=250µA, VGS=0V, TJ=25°C 500 ID=250µA, VGS=0V, TJ=150°C 10 VDS=0V, VGS=±30V VDS=5V, ID=250µA RDS(ON) gFS Static Drain-Source On-Resistance Forward Transconductance VSD IS Diode Forward Voltage IS=1A, VGS=0V Maximum Body-Diode Continuous Current ISM Maximum Body-Diode Pulsed Current Reverse Transfer Capacitance Gate resistance SWITCHING PARAMETERS Qg Total Gate Charge Qgs Gate Source Charge Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf Turn-Off Fall Time trr Body Diode Reverse Recovery Time Qrr µA ±100 nA 3.9 4.5 V VGS=10V, ID=6A 0.36 0.52 VDS=40V, ID=6A 16 Ω S 1 V 12 A 48 A DYNAMIC PARAMETERS Ciss Input Capacitance Crss o V/ C 0.54 VDS=400V, TJ=125°C Gate-Body leakage current Rg V 1 Gate Threshold Voltage Units V VDS=500V, VGS=0V IGSS Output Capacitance Max 600 ID=250µA, VGS=0V VGS(th) Coss Typ 3.3 0.72 1089 1361 1633 pF VGS=0V, VDS=25V, f=1MHz 134 167 200 pF 10 12.6 15 pF VGS=0V, VDS=0V, f=1MHz 1.8 3.6 5 Ω 30.7 37 nC 7.6 9 nC 13.0 16 nC 29 35.0 ns 69 83.0 ns VGS=10V, VDS=400V, ID=12A VGS=10V, VDS=250V, ID=12A, RG=25Ω 82 98.0 ns 55.5 67.0 ns IF=12A,dI/dt=100A/µs,VDS=100V 231 277.0 Body Diode Reverse Recovery Charge IF=12A,dI/dt=100A/µs,VDS=100V 2.82 3.4 ns µC A: The value of R θJA is measured with the device in a still air environment with T A =25°C. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. 4.4 G. L=60mH, IAS=5.5A, VDD=50V, RG=25Ω, Starting TJ=25°C Rev 2. Dec 2008 THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Alpha & Omega Semiconductor, Ltd. www.aosmd.com AOT12N50/AOTF12N50 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 24 100 10V 20 10 6V 12 125°C ID(A) ID (A) 16 8 25°C 1 4 VGS=5V 0 0.1 0 5 10 15 20 25 30 2 VDS (Volts) Fig 1: On-Region Characteristics 4 6 8 10 VGS(Volts) Figure 2: Transfer Characteristics 0.8 Normalized On-Resistance 3 0.7 RDS(ON) (mΩ) -55°C VDS=40V 6.5V VGS=10V 0.6 0.5 0.4 0.3 2.5 VGS=10V ID=6A 2 1.5 1 0.5 0.2 0 4 8 12 16 20 24 0 -100 28 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage -50 0 1.2 100 150 200 1.0E+02 4.4 1.0E+01 125°C 1.1 1.0E+00 IS (A) BVDSS (Normalized) 50 Temperature (°C) Figure 4: On-Resistance vs. Junction Temperature 1 1.0E-01 25°C 1.0E-02 0.9 1.0E-03 0.8 -100 1.0E-04 -50 0 50 100 150 200 TJ (oC) Figure 5: Break Down vs. Junction Temperature Alpha & Omega Semiconductor, Ltd. 0.2 0.4 0.6 0.8 1.0 VSD (Volts) Figure 6: Body-Diode Characteristics www.aosmd.com AOT12N50/AOTF12N50 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 15 10000 VDS=400V ID=12A Ciss Capacitance (pF) VGS (Volts) 12 9 6 1000 Coss 100 3 Crss 0 10 5 10 15 20 25 30 35 40 Qg (nC) Figure 7: Gate-Charge Characteristics 100 RDS(ON) limited 0.1 1ms DC 0.1 10 VDS (Volts) Figure 8: Capacitance Characteristics 100 10µs 10ms 0.1s RDS(ON) limited 10 100µs 1 1 100 10µs 10 ID (Amps) 45 ID (Amps) 0 100µs 1 DC 0.1 TJ(Max)=150°C TC=25°C TJ(Max)=150°C TC=25°C 0.01 1ms 10ms 0.1s 1s 10s 0.01 1 10 100 1000 VDS (Volts) 1 10 100 1000 VDS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area for AOT10N60 (Note F) Figure 10: Maximum Forward Biased Safe Operating Area for AOTF10N60 (Note F) 14 Current rating ID(A) 12 10 8 6 4 2 0 0 25 50 75 100 125 150 TCASE (°C) Figure 11: Current De-rating (Note B) Alpha & Omega Semiconductor, Ltd. www.aosmd.com AOT12N50/AOTF12N50 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS ZθJC Normalized Transient Thermal Resistance 10 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse D=Ton/T TJ,PK=TA+PDM.ZθJC.RθJC RθJC=0.6°C/W 1 0.1 PD Ton Single Pulse 0.01 0.00001 0.0001 0.001 0.01 0.1 1 T 10 100 Pulse Width (s) Figure 12: Normalized Maximum Transient Thermal Impedance for AOT12N50 (Note F) ZθJC Normalized Transient Thermal Resistance 10 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse D=Ton/T TJ,PK=TA+PDM.ZθJC.RθJC RθJC=2.5°C/W 1 0.1 PD Ton Single Pulse 0.01 0.00001 0.0001 0.001 0.01 0.1 1 T 10 100 Pulse Width (s) Figure 13: Normalized Maximum Transient Thermal Impedance for AOTF12N50 (Note F) Alpha & Omega Semiconductor, Ltd. www.aosmd.com AOT12N50/AOTF12N50 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + VDC - VDC DUT Qgs Vds Qgd - Vgs Ig Charge Res istive Switching Test Circuit & Waveforms RL Vds Vds DUT Vgs Rg + VDC 90% Vdd - 10% Vgs Vgs t d(on) tr t d(off) t on tf t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L EAR= 1/2 LI Vds 2 AR BVDSS Vds Id + Vgs Vgs VDC Rg - Vdd I AR Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Qrr = - Idt Vds + DUT Vds - Isd Vgs L Vgs Ig Alpha & Omega Semiconductor, Ltd. Isd + VDC - IF trr dI/dt IRM Vdd Vdd Vds www.aosmd.com