UVEPROM SMJ27C040 Austin Semiconductor, Inc. FUNCTIONAL BLOCK DIAGRAM* EPROM 524,288 x 8 12 11 10 9 8 7 6 5 27 26 23 25 4 28 29 3 2 30 31 22 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 E\ 24 G\ 0 A 0 524,287 A A A A A A A A 13 14 15 17 18 19 20 21 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 18 [PWR DWN] & EN * This symbol is in accordance with ANSI/IEEE std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the J package. OPERATION The seven modes of operation are listed in Table 1. The read mode requires a single 5V supply. All inputs are TTL level except for VPP during programming (13V), and VH (12V)i on A9 for signature mode. TABLE 1. OPERATION MODES E\ G\ VPP FUNCTION VCC A9 Read VIL VIL VCC VCC X X Data Out Output Disable VIL VIH VCC VCC X X High-Z Standby VIH X VCC VCC X X High-Z Programming VIL VIH VPP VCC X X Data In Program Inhibit VIH VIH VPP VCC X X High-Z Verify VIH VIL VPP VCC X X Data Out Signature Mode VIL VIL VCC VCC VIH* VIL MFG Code 97 VIL Device Code 50 A0 DQ0-DQ7 * X can be VIL or VIH. iVH = 12V ± 0.5V SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 UVEPROM SMJ27C040 Austin Semiconductor, Inc. READ/OUTPUT DISABLE SNAP! PULSE PROGRAMMING When the outputs of two or more SMJ27C040s are connected in parallel on the same bus, the output of any particular device in the circuit can be read with no interference from competing outputs of the other devices. To read the output of a single device, a low level signal is applied to the E\ and G\ pins. All other devices in the circuit should have their outputs disabled by applying a high level signal to one of these pins. Output data is accessed at pins Q0-Q7. The SMJ27C040 is programmed by using the SNAP! Pulse programming algorithm. The programming sequence is shown in the SNAP! Pulse programming flow chart (Figure 1). The initial setup is VPP = 13V, VCC = 6.5V, E\ = V IH, and G\ = VIL. Once the initial location is selected, the data is presented in parallel (eight bits) on pins DQ1 through DQ8. Once addresses and data are stable, the programming mode is achieved when E\ is pulsed low (VIL) with a pulse duration of tW(PGM). Every location is programmed only once before going to interactive mode. LATCHUP IMMUNITY Latchup immunity on the SMJ27C040 is a minimum of 250mA on all inputs and outputs. This feature provides latchup immunity beyond any potential transients at the P.C. board level when the EPROM is interfaced to industry standard TTL or MOS logic devices. The input/output layout approach controls latchup without compromising performance or packing density. In the interactive mode, the word is verified at VPP = 13V, VCC= 6.5V, E\ = VIH, and G\ = VIL. If the correct data is not read, the programming is performed by pulling G\ high, then E\ low with a pulse duration of tW(PGM). This sequence of verification and programming is performed up to a maximum of 10 times. When the device is fully programmed, all bytes are verified with VCC = VPP = 5V ± 10%. POWER DOWN Active ICC supply current can be reduced from 70mA to 1mA for a high TTL input on E\ and to 100µA for a high CMOS input on E\. In this mode all outputs are in the highimpedance state. PROGRAM INHIBIT Programming can be inhibited by maintaining high level inputs on the E\ and G\ pins. ERASURE PROGRAM VERIFY Before programming, the SMJ27C040 EPROM is erased by exposing the chip through the transparent lid to a high intensity ultraviolet-light (wavelength 2537 Å). The recommended minimum exposure dose (UV intensity x exposure time) is 15-W .s/cm 2. A typical 12-mW/cm 2, filterless UV lamp erases the device in 21 minutes. The lamp should be located about 2.5cm above the chip during erasure. After erasure, all bits are in the high state. It should be noted that normal ambient light contains the correct wavelength for erasure. Therefore, when using the SMJ27C040, the window should be covered with an opaque label. After erasure (all bits in logic high state), logic lows are programmed into the desired locations. A programmed low can be erased only by ultraviolet light. Programmed bits can be verified with VPP = 13V when G\ = VIL, and E\ = VIH. SIGNATURE MODE The signature mode provides access to a binary code identifying the manufacturer and type. This mode is activated when A9 (pin 26) is forced to 12V. Two identifier bytes are accessed by toggling A0. All other addresses must be held low. The signature code for the SMJ27C040 is 9750. A0 low selects the manufacturer’s code 97 (Hex), and A0 high selects the device code 50 (Hex), as shown in Table 2. TABLE 2. SIGNATURE MODES IDENTIFIER* PINS DQ4 DQ3 A0 DQ7 DQ6 DQ5 DQ2 DQ1 DQ0 HEX MANUFACTURER CODE VIL 1 0 0 1 0 1 1 1 97 DEVICE CODE VIH 0 1 0 1 0 0 0 0 50 * E\ = G\ = VIL, A1 - A8 = VIL, A9 = VH, A10 - A18 = VIL, VPP = VCC. SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 3 UVEPROM SMJ27C040 Austin Semiconductor, Inc. FIGURE 1. SNAP! PULSE PROGRAMMING FLOW CHART START Address = First Location VCC = 6.5V ± 0.25V, VPP = 13V ± 0.25V Program Mode Program One Pulse = tW = 100µs Last Address? Increment Address No Yes Address = First Location X=0 Program One Pulse = tW = 100µs No Verify One Byte Increment Address Fail X = X+1 Interactive Mode Pass No X = 10? Last Address? Yes Yes Device Failed VCC = VPP = 5V ± 0.5V Compare All Bytes to Original Data Fail Final Verification Pass Device Passed SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 4 UVEPROM SMJ27C040 Austin Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS* Supply Voltage Range, VCC**...........................-0.6V to +7.0V Supply Voltage Range, Vpp**.........................-0.6V to +14.0V Input Voltage Range, All inputs except A9**..-0.6V to +6.5V A9.....-0.6V to +13.0V Output Voltage Range, with respect to VSS**..................................-0.6V to VCC +1 Minimum Operating Free-air Temperature.....................-55°C Maximum Operating Case Temperature.........................125°C Storage Temperature Range.............................-65°C to 150°C *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ** All voltage values are with respect to GND. RECOMMENDED OPERATING CONDITIONS MIN 4.5 6.25 VCC-0.6 12.75 2 1 VCC Supply Voltage Read Mode SNAP! Pulse programming algorithm VPP Supply Voltage Read Mode SNAP! Pulse programming algorithm VIH High-level input voltage VIL Low-level input voltage TA Operating free-air temperature TC Operating case temperature 2 TTL CMOS TTL CMOS TYP 5 6.5 13 VCC-0.2 -0.5 -0.5 -55 MAX 5.5 6.75 VCC+0.6 13.25 VCC+0.5 UNIT V V V V V VCC+0.5 0.8 0.2 V V V °C +125 °C NOTES: 1. VCC must be applied before or at the same time as VPP and removed after or at the same time as VPP. The deivce must not be inserted into or removed from the board when VPP or VCC is applied. 2. VPP can be connected to VCC directly (except in the program mode). VCC supply current in this case would be ICC + IPP. During programming, VPP must be maintained at 13V ± 0.25V. ELECTRICAL CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE TEST CONDITIONS MIN MAX UNIT VOH PARAMETER High-level output voltage IOH = -400µA VOL Low-level output voltage IOL = 2.1mA 0.4 V II Input current (leakage) VI = 0V to 5.5V ±1 µA IO Output current (leakage) VO = 0V to VCC ±1 µA VPP = VCC = 5.5V 10 µA VPP = 12.75V, TA -25°C 50 mA VCC = 5.5V, E\=VIH 1 mA 100 µA 50 mA IPP1 VPP supply current IPP2 VPP supply current (during program pulse) ICC1 VCC supply current (standby) 1 TTL-Input Level CMOS-Input Level VCC = 5.5V, E\=VCC 2.4 V E\=VIL, VCC=5.5V ICC2 VCC supply current (active) tcycle = minimum cycle time, 2 outputs open NOTES: 1. This parameter is only sampled and not 100% tested. 2. Minimum cycle time = maximum access time. SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 UVEPROM SMJ27C040 Austin Semiconductor, Inc. CAPACITANCE OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE, f = 1MHz (VCC = VPP = 5V ±0.5V)* PARAMETER Ci Input capacitance TEST CONDITIONS VI = 0V TYP** 4 MAX 8 UNIT pF Co Output capacitance VO = 0V 8 12 pF * Capacitance is sampled only at initial design and after any major change. ** All typical values are at TA = 25°C and nominal voltages. SWITCHING CHARACTERISTICS OVER RECOMMENDED RANGES OF SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE1,2 TEST PARAMETER ta(A) Access time from address ta(E) Access time from chip enable ten(G) tdis tv(A) CONDITIONS Output enable time from G\ Output disable time from G\ or E\, whichever MIN MAX MIN MAX (see Figure 2) Input tr < 20ns Input tf < 20ns 1 occurs first Output data valid time after change of -15 -12 2, 3 0 120 150 ns 120 150 ns 50 50 ns 50 ns 50 0 1 address, E\, or G\, whichever occurs first UNIT 0 0 ns NOTES: 1. Value calculated from 0.5V delta to measured output level. This parameter is only sampled and not 100% tested. 2. Common test conditions apply for tdis except during programming. 3. For all switching characteristics the input pulse levels are 0.4V to 2.4V. Timing measurements are made at 2V for logic high and 0.8V for logic low. (Figure 2) SWITCHING CHARACTERISTICS FOR PROGRAMMING: VCC = 6.5V and VPP = 13V (SNAP! Pulse), TA = 25°C tdis(G) PARAMETER Output disable time from G\ ten(G) Output enable time from G\ MIN 0 MAX 100 UNIT ns 150 ns TIMING REQUIREMENTS FOR PROGRAMMING th(A) Hold Time, Address th(D) Hold Time, Data tw(PGM) Pulse Duration, Program MIN 0 TYP MAX 2 SNAP! Pulse Programming Algorithm 95 UNIT µs µs 100 105 µs tsu(A) Setup Time, Address 2 µs tsu(E) Setup Time, E\ 2 µs tsu(G) Setup Time, G\ 2 µs tsu(D) Setup Time, Data 2 µs tsu(Vpp) Setup Time, VPP 2 µs tsu(Vcc) Setup Time, VCC 2 µs SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 6 UVEPROM Austin Semiconductor, Inc. SMJ27C040 PARAMETER MEASUREMENT INFORMATION 2.08V RL = 800Ω Output Under Test CL = 100 pF1 NOTES: 1. CL includes probe and fixture capacitance. FIGURE 2. OUTPUT LOAD CIRCUIT AND INPUT/OUTPUT WAVE FORMS FIGURE 3. READ-CYCLE TIMING SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 7 UVEPROM Austin Semiconductor, Inc. SMJ27C040 FIGURE 4. PROGRAM-CYCLE TIMING (SNAP! PULSE PROGRAMMING) * 13V VPP and 6.5V VCC for SNAP! Pulse programming. SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 8 UVEPROM SMJ27C040 Austin Semiconductor, Inc. MECHANICAL DEFINITION* ASI Case #114 (Package Designator J) SMD 5962-91752, Case Outline X D A L L1 b e b1 Pin 1 E b2 E1 SMD Specifications SYMBOL A b b1 b2 D E e E1 L1 L MIN --0.014 0.045 0.008 --0.510 MAX 0.225 0.026 0.065 0.018 1.680 0.620 0.100 BSC 0.600 BSC 0.125 0.015 0.200 0.070 NOTE: These dimensions are per the SMD. ASI's package dimensional limits may differ, but they will be within the SMD limits. *All measurements are in inches. SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 9 UVEPROM SMJ27C040 Austin Semiconductor, Inc. ORDERING INFORMATION EXAMPLE: SMJ27C040-15JM Speed ns SMJ27C040 -12 J * SMJ27C040 -15 J * *AVAILABLE PROCESSES M = Extended Temperature Range SMJ27C040 Rev. 1.0 9/01 Package Operating Type Temp. Device Number -55oC to +125oC Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 10 UVEPROM Austin Semiconductor, Inc. SMJ27C040 ASI TO DSCC PART NUMBER CROSS REFERENCE* ASI Package Designator J TI Part #** SMJ27C040-12JM SMJ27C040-15JM SMD Part # 5962-9175205MXA 5962-9175204MXA * ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD. ** Parts are listed on SMD under the old Texas Instruments part number. ASI purchased this product line in November of 1999. SMJ27C040 Rev. 1.0 9/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 11