SCLS557 − JANUARY 2004 D Controlled Baseline D D D D 2-V to 6-V VCC Operation D Inputs Accept Voltages to 6 V D Max tpd of 7.5 ns at 5 V − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† D OR PW PACKAGE (TOP VIEW) 1A 1B 2A 2B 2C 2Y GND † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 1C 1Y 3A 3B 3C 3Y description/ordering information The SN74AC11 device contains three independent 3-input AND gates. This device performs the Boolean function Y = A • B • C or Y = A + B + C in positive logic. ORDERING INFORMATION −40°C to 85°C ORDERABLE PART NUMBER PACKAGE‡ TA TOP-SIDE MARKING SOIC − D Tape and reel SN74AC11IDREP§ SAC11EP TSSOP − PW Tape and reel SN74AC11IPWREP SAC11EP ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. § Product Preview FUNCTION TABLE (each gate) INPUTS A B C OUTPUT Y H H H H L X X L X L X L X X L L Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated ! "#$ %!& % "! "! '! ! !( ! %% )*& % "!+ %! !!$* $%! !+ $$ "!!& POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCLS557 − JANUARY 2004 logic diagram, each gate (positive logic) 1A 1B 1C 2A 2B 2C 3A 3B 3C 1 2 13 12 3 4 5 6 11 10 9 8 1Y 2Y 3Y absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCLS557 − JANUARY 2004 recommended operating conditions (see Note 3) VCC Supply voltage VIH VCC = 3 V VCC = 4.5 V High-level input voltage 0.9 ∆t/∆v V 1.65 0 Low-level output current V V 1.35 0 High-level output current UNIT 3.85 Output voltage IOL 6 3.15 Input voltage IOH 2 VCC = 4.5 V VCC = 5.5 V Low-level input voltage VI VO MAX 2.1 VCC = 5.5 V VCC = 3 V VIL MIN VCC VCC VCC = 3 V VCC = 4.5 V −12 VCC = 5.5 V VCC = 3 V −24 VCC = 4.5 V VCC = 5.5 V 24 −24 V V mA 12 mA 24 Input transition rise or fall rate 8 ns/V TA Operating free-air temperature −40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −50 µA VOH IOH = −12 mA VCC TA = 25°C MIN TYP MAX MIN 3V 2.9 2.99 2.9 4.5 V 4.4 4.49 4.4 5.5 V 5.4 5.49 3V 2.56 2.46 MAX 5.4 V 4.5 V 3.86 3.76 IOH = −24 mA 5.5 V 4.86 4.76 IOH = −75 mA† 5.5 V 3V 0.002 0.1 0.1 IOL = 50 µA 4.5 V 0.001 0.1 0.1 5.5 V 0.001 0.1 0.1 IOL = 12 mA 3.85 3V 0.36 0.44 4.5 V 0.36 0.44 IOL = 24 mA 5.5 V 0.36 0.44 IOL = 75 mA† 5.5 V II ICC VI = VCC or GND VI = VCC or GND, 5.5 V Ci VI = VCC or GND VOL IO = 0 V 1.65 5.5 V 5V UNIT 2.6 ±0.1 ±1 µA 2 20 µA pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCLS557 − JANUARY 2004 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V " 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A, B, or C Y TA = 25°C MIN TYP MAX MIN MAX 1.5 5.5 9.5 1 10 1.5 5.5 8.5 1 9.5 UNIT ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V " 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A, B, or C Y MIN TA = 25°C TYP MAX 1.5 4 1.5 4 MIN MAX 8 1 8.5 7 1 7.5 UNIT ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50pF, f = 1 MHz TYP UNIT 20 pF PARAMETER MEASUREMENT INFORMATION TEST tPLH/tPHL S1 Open From Output Under Test CL = 50 pF (see Note A) S1 Open 50% VCC 50 % VCC 0V tPHL tPLH 2 × VCC 500 Ω VCC Input (see Note B) In-Phase Output 50% VCC tPLH tPHL 500 Ω Out-of-Phase Output LOAD CIRCUIT VOH 50% VCC VOL 50% VCC VOH 50% VCC VOL VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr v 2.5 ns, tf v 2.5 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AC11IPWREP ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/04701-01XE ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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OTHER QUALIFIED VERSIONS OF SN74AC11-EP : SN74AC11 • Catalog: SN74AC11-Q1 • Automotive: • Military: SN54AC11 NOTE: Qualified Version Definitions: - TI's standard catalog product • Catalog - Q100 devices qualified for high-reliability automotive applications targeting zero defects • Automotive • Military - QML certified for Military and Defense Applications Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74AC11IPWREP Package Package Pins Type Drawing TSSOP PW 14 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2000 330.0 12.4 Pack Materials-Page 1 6.9 B0 (mm) K0 (mm) P1 (mm) 5.6 1.6 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AC11IPWREP TSSOP PW 14 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. 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