VISHAY SIHFP460N-E3

IRFP460N, SiHFP460N
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Low Gate Charge Qg Results in Simple Drive
Available
Requirement
• Improved Gate, Avalanche and Dynamic dV/dt RoHS*
COMPLIANT
Ruggedness
• Fully Characterized Capacitance and Avalanche Voltage
and Current
• Effective Coss Specified
• Lead (Pb)-free Available
500
RDS(on) (Ω)
VGS = 10 V
0.24
Qg (Max.) (nC)
124
Qgs (nC)
40
Qgd (nC)
57
Configuration
Single
D
TO-247
APPLICATIONS
• Switch Mode Power Supply (SMPS)
• Uninterruptible Power Supply
• High Speed Power Switching
G
TYPICAL SMPS TOPOLOGIES
S
D
G
• Full Bridge
• Power Factor Correction Boost
S
N-Channel MOSFET
ORDERING INFORMATION
Package
TO-247
IRFP460NPbF
SiHFP460N-E3
IRFP460N
SiHFP460N
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
500
Gate-Source Voltage
VGS
± 30
VGS at 10 V
Continuous Drain Current
Pulsed Drain
TC = 25 °C
ID
TC = 100 °C
Currenta
IDM
Linear Derating Factor
Energyb
UNIT
V
20
13
A
80
2.2
W/°C
mJ
EAS
340
Currenta
IAR
20
A
Repetitive Avalanche Energya
EAR
28
mJ
Single Pulse Avalanche
Repetitive Avalanche
Maximum Power Dissipation
TC = 25 °C
PD
280
W
dV/dt
5.0
V/ns
TJ, Tstg
- 55 to + 150
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
for 10 s
6-32 or M3 screw
300d
°C
10
lbf · in
1.1
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 1.8 mH, RG = 25 Ω, IAS = 20 A (see fig. 12).
c. ISD ≤ 20 A, dI/dt ≤ 140 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91236
S-Pending-Rev. B, 23-Jul-08
WORK-IN-PROGRESS
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IRFP460N, SiHFP460N
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
40
Case-to-Sink, Flat, Greased Surface
RthCS
0.24
-
Maximum Junction-to-Case (Drain)
RthJC
-
0.45
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0 V, ID = 250 µA
500
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
580
-
mV/°C
VGS(th)
VDS = VGS, ID = 250 µA
3.0
-
5.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 500 V, VGS = 0 V
-
-
25
VDS = 400 V, VGS = 0 V, TJ = 125 °C
-
-
250
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
gfs
ID = 12 Ab
VGS = 10 V
VDS = 50 V, ID = 12 A
µA
-
-
0.24
Ω
10
-
-
S
-
3540
-
-
350
-
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Output Capacitance
Effective Output Capacitance
Total Gate Charge
Coss
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Fall Time
-
30
-
VDS = 1.0 V, f = 1.0 MHz
-
3930
-
VDS = 400 V, f = 1.0 MHz
-
95
-
VDS = 0 V to 400 Vc
-
200
-
-
-
124
-
-
40
-
-
57
-
23
-
-
87
-
-
34
-
-
33
-
-
-
20
-
-
80
-
-
1.8
-
550
825
ns
-
7.2
10.8
µC
Qg
Qgs
Rise Time
VGS = 0 V
Coss eff.
Gate-Source Charge
Turn-Off Delay Time
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
tr
td(off)
VGS = 10 V
ID = 20 A, VDS = 400 V
see fig. 6 and 13b
VDD = 250 V, ID = 20 A
RG = 4.3 Ω, RD= 13 Ω,
see fig. 10b
tf
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
S
TJ = 25 °C, IS = 20 A, VGS = 0 Vb
TJ = 25 °C, IF = 20 A, dI/dt = 100 A/µsb
V
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
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Document Number: 91236
S-Pending-Rev. B, 23-Jul-08
IRFP460N, SiHFP460N
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
100
100
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
10
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
1
0.1
5.0V
0.01
20µs PULSE WIDTH
TJ = 25 °C
0.001
0.1
1
10
TJ = 150 ° C
10
TJ = 25 ° C
1
0.1
100
5
VDS , Drain-to-Source Voltage (V)
I D , Drain-to-Source Current (A)
10
5.0V
20µs PULSE WIDTH
TJ = 150 °C
1
10
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Document Number: 91236
S-Pending-Rev. B, 23-Jul-08
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
3.5
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
0.1
0.1
7
8
9
10
11
Fig. 3 - Typical Transfer Characteristics
TOP
1
6
VGS , Gate-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
100
V DS = 50V
20µs PULSE WIDTH
ID = 20A
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature ( °C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFP460N, SiHFP460N
Vishay Siliconix
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
C, Capacitance(pF)
10000
Ciss
Coss
1000
Crss
100
100
ISD , Reverse Drain Current (A)
100000
10
1
10
100
1000
16
V GS = 0 V
0.4
0.6
0.8
1.0
1.2
1.4
1.6
Fig. 7 - Typical Source-Drain Diode Forward Voltage
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
40
60
80
100
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
12
120
140
QG , Total Gate Charge (nC)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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1
VSD,Source-to-Drain Voltage (V)
ID, Drain-to-Source Current (A)
VGS , Gate-to-Source Voltage (V)
VDS = 400V
VDS = 250V
VDS = 100V
20
TJ = 25 ° C
1000
ID = 20A
0
10
0.1
0.2
VDS, Drain-to-Source Voltage (V)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
20
TJ = 150 ° C
10
100µsec
1msec
1
T A = 25°C
T J = 150°C
0.1
10msec
Single Pulse
10
100
1000
10000
VDS , Drain-toSource Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Document Number: 91236
S-Pending-Rev. B, 23-Jul-08
IRFP460N, SiHFP460N
Vishay Siliconix
RD
VDS
20
VGS
D.U.T.
ID , Drain Current (A)
RG
+
- VDD
15
10V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
10
Fig. 10a - Switching Time Test Circuit
VDS
5
90 %
0
25
50
75
100
125
150
10 %
VGS
TC , Case Temperature ( °C)
t d(on)
Fig. 9 - Maximum Drain Current vs. Case Temperature
tr
t d(off) t f
Fig. 10b - Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P DM
0.01
t1
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
V DS
tp
15 V
L
VDS
D.U.T.
RG
IAS
20 V
tp
Driver
+
A
- VDD
A
0.01 Ω
Fig. 12a - Unclamped Inductive Test Circuit
Document Number: 91236
S-Pending-Rev. B, 23-Jul-08
I AS
Fig. 12b - Unclamped Inductive Waveforms
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IRFP460N, SiHFP460N
EAS , Single Pulse Avalanche Energy (mJ)
Vishay Siliconix
750
ID
8.9A
12.6A
BOTTOM 20A
TOP
600
450
300
150
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
12 V
0.2 µF
0.3 µF
10 V
QGS
Q GD
D.U.T.
VG
+
V
- DS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91236
S-Pending-Rev. B, 23-Jul-08
IRFP460N, SiHFP460N
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
•
•
•
•
RG
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Body diode
VDD
forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91236
Document Number: 91236
S-Pending-Rev. B, 23-Jul-08
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Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
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information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
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document or by any conduct of Vishay.
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Document Number: 91000
Revision: 18-Jul-08
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