CIRRUS PA10_09

PA10PA10
• PA10A
• PA10A
PPA10,
r o d u c t IPA10A
Innnnoovvaa t i o n FFr roomm
Power Operational Amplifier
FEATURES
• Gain bandwidth product — 4MHz
• Temperature range — –55 to +125°C (PA10A)
• Excellent linearity — Class A/B Output
• Wide supply range — ±10V to ±50V
• High output current — ±5A Peak
APPLICATIONS
• Motor, valve and actuator control
• Magnetic deflection circuits up to 4A
• Power transducers up to 100kHz
• Temperature control up to 180W
• Programmable power supplies up to 90V
• Audio amplifiers up to 60W RMS
8-pin TO-3
PACKAGE STYLE CE
TYPICAL APPLICATION
R2A
+42V
DESCRIPTION
CONTROL
.82Ω
R1B
R2B
LOAD
0-24Ω
DC and low distortion AC current waveforms are delivered
to a grounded load by using matched resistors (A and B
sections) and taking advantage of the high common mode
rejection of the PA10.
Foldover current limit is used to modify current limits based
on output voltage. When load resistance drops to 0, the current
is limited based on output voltage. When load resistance drops
to 0, the current limit is 0.79A resulting in an internal dissipation of 33.3 W. When output voltage increases to 36V, the
current limit is 1.69A. Refer to Application Note 9 on foldover
limiting for details.
Q2B
Q1
–42V
FIGURE 1. VOLTAGE-TO-CURRENT CONVERSION
3
Q2A
RS
PA10
EQUIVALENT SCHEMATIC
D1
.82Ω
R1A
The PA10 and PA10A are high voltage, high output current
operational amplifiers designed to drive resistive, inductive
and capacitive loads. For optimum linearity, the output stage
is biased for class A/B operation. The safe operating area
(SOA) can be observed for all operating conditions by selection of user programmable current limiting resistors. Both
amplifiers are internally compensated for all gain settings. For
continuous operation under load, a heatsink of proper rating
is recommended.
This hybrid integrated circuit utilizes thick film (cermet)
resistors, ceramic capacitors and semiconductor chips to
maximize reliability, minimize size and give top performance.
Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3
package is hermetically sealed and electrically isolated. The
use of compressible isolation washers voids the warranty.
2
EXTERNAL CONNECTIONS
Q3
Q4
2
3
OUT
1
7
Q5
8
+IN
R CL+
CL+
+VS
1
OUTPUT
4
TOP VIEW
4
A1
5
Q6A
Q6B
–IN
5
C1
–VS
6
PA10U
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2009
(All Rights Reserved)
6
7
8
CL–
R CL–
FO
MAY 20091
APEX − PA10UREVR
PA10 • PA10A
ABSOLUTE MAXIMUM RATINGS
P r o d u c t I n n o v a t i o nF r o m
SUPPLY VOLTAGE, +VS to –VS
OUTPUT CURRENT, within SOA
POWER DISSIPATION, internal
INPUT VOLTAGE, differential
INPUT VOLTAGE, common mode
TEMPERATURE, pin solder - 10s
TEMPERATURE, junction1
TEMPERATURE RANGE, storage
OPERATING TEMPERATURE RANGE, case
SPECIFICATIONS
PARAMETER
TEST CONDITIONS 2, 5
100V
5A
67W
±37V
±VS
300°C
200°C
–65 to +150°C
–55 to +125°C
MIN
PA10
TYP
MAX
MIN
±VS–5
74
±2
±10
±30
±20
12
±50
.±10
±12
±50
200
3
±VS–3
100
±6
±65
±200
30
±500
±30
*
*
PA10A
TYP
MAX
UNITS
±4
±40
*
mV
µV/°C
µV/V
µVW
nA
pA/°C
pA/V
nA
pA/°C
MΩ
pF
V
dB
INPUT
OFFSET VOLTAGE, initial
OFFSET VOLTAGE, vs. temperature
OFFSET VOLTAGE, vs. supply
OFFSET VOLTAGE, vs. power
BIAS CURRENT, initial
BIAS CURRENT, vs. temperature
BIAS CURRENT, vs. supply
OFFSET CURRENT, initial
OFFSET CURRENT, vs. temperature
INPUT IMPEDANCE, DC
INPUT CAPACITANCE
COMMON MODE VOLTAGE RANGE3
COMMON MODE REJECTION, DC3
TC = 25°C
Full temperature range
TC = 25°C
TC = 25°C
TC = 25°C
Full temperature range
TC = 25°C
TC = 25°C
Full temperature range
TC = 25°C
TC = 25°C
Full temperature range
Full temp. range, VCM = ±VS –6V
±1
*
*
*
10
*
*
±5
*
*
*
*
*
20
*
±10
GAIN
OPEN LOOP GAIN at 10Hz
OPEN LOOP GAIN at 10Hz
GAIN BANDWIDTH PRODUCT @ 1MHz
POWER BANDWIDTH
PHASE MARGIN
TC = 25°C, 1KΩ load
Full temp. range, 15Ω load
TC = 25°C, 15Ω load
TC = 25°C, 15Ω load
Full temp. range, 15Ω load
96
10
110
108
4
15
35
*
*
*
*
*
*
*
dB
dB
MHz
kHz
°
±VS–6
*
*
*
*
*
*
*
.68
10
SOA
*
*
*
V
V
V
A
µs
V/µs
nF
nF
nF
±50
*
V
mA
*
*
°C/W
°C/W
°C/W
°C
OUTPUT
VOLTAGE SWING3
VOLTAGE SWING3
VOLTAGE SWING3
CURRENT, peak
SETTLING TIME to .1%
SLEW RATE
CAPACITIVE LOAD
CAPACITIVE LOAD
CAPACITIVE LOAD
TC = 25°C, IO = 5A
Full temp. range, IO = 2A
Full temp. range, IO = 80mA
TC = 25°C
TC = 25°C, 2V step
TC = 25°C
Full temperature range, AV = 1
Full temperature range, AV = 2.5
Full temperature range, AV > 10
±VS–8
±VS–6
±VS–5
5
±VS–5
2
2
3
±10
8
±40
15
±45
30
1.9
2.4
30
2.1
*
2.6
*
*
+85
–55
POWER SUPPLY
VOLTAGE
CURRENT, quiescent
Full temperature range
TC = 25°C
*
*
*
*
THERMAL
RESISTANCE, AC, junction to case4
RESISTANCE, DC, junction to case
RESISTANCE, junction to air
TEMPERATURE RANGE, case
NOTES: *
1.
2.
3.
4.
5.
CAUTION
2
TC = ­–55 to +125°C, F > 60Hz
TC = –55 to +125°C
TC = –55 to +125°C
Meets full range specifications
–25
+125
The specification of PA10A is identical to the specification for PA10 in applicable column to the left.
Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation
to achieve high MTTF.
The power supply voltage for all tests is ±40, unless otherwise noted as a test condition.
+VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
Full temperature range specifications are guaranteed but not tested.
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
PA10U
PA10 • PA10A
POWER DERATING
40
30
PA10
20
10
T = TA
0
0
20
1.0
.7
20
–60
–80
–100
–120
–160
10
100 1K 10K .1M 1M 10M
FREQUENCY, F (Hz)
–180
COMMON MODE REJECTION
80
60
10
100 1K 10K .1M 1M 10M
FREQUENCY, F (Hz)
PULSE RESPONSE
8
OUTPUT VOLTAGE, VO (V)
100
1
4
2
0
–2
40
–4
20
0
–6
0
3
1
10
10K .1M
100 1K
FREQUENCY, F (Hz)
AV = 10
VS = ±38V
RL = 8Ω
.3
.1
W
=
PO
.03
PA10U
5
PO
=
2W
W
=
PO
.01
.003
100
0m
300
60
1K
3K 10K 30K
FREQUENCY, F (Hz)
–8
1M
HARMONIC DISTORTION
.1M
.5
0
25 50 75 100 125
–50 –25 0
CASE TEMPERATURE, TC (°C)
1.6
1.4
0
2
4
6
8
TIME, t (µs)
10
12
5°C
T C = -2
°C
T C = 25
°C
.8
.6
|+VS | + |–VS | = 80V
46
32
22
|+VS | + |–VS | = 30V
15
10
6.8
4.6
10K
S
QUIESCENT CURRENT
1.2
1.0
|+VS | + |–VS | = 100V
68
20K 30K
50K 70K .1M
FREQUENCY, F (Hz)
S
INPUT NOISE
100
VIN = ±5V, tr = 100ns
6
RCL = 0.6Ω
1.0
POWER RESPONSE
–140
0
1.5
OUTPUT VOLTAGE, VO (VPP)
PHASE, ϕ (°)
40
RCL = 0.3Ω
2.0
100
–40
60
2.5
PHASE RESPONSE
0
80
3.0
.4
25 50 75 100 125
–50 –25 0
CASE TEMPERATURE, TC ( C)
NORMALIZED QUIESCENT CURRENT, IQ (X)
COMMON MODE REJECTION, CMR (dB)
1.3
–20
–20
1
DISTORTION (%)
1.6
40 60 80 100 120 140
TEMPERATURE, T (°C)
100
120
1.9
SMALL SIGNAL RESPONSE
120
OPEN LOOP GAIN, AOL (dB)
PA10A
2.2
CURRENT LIMIT, ILIM (A)
T = TC
50
CURRENT LIMIT
3.5
INPUT NOISE VOLTAGE, VN (nV/ √Hz)
60
BIAS CURRENT
2.5
T C = 85
°C
T C = 125
.4
40
50
60
70
80 90 100
TOTAL SUPPLY VOLTAGE, VS (V)
VOLTAGE DROP FROM SUPPLY, (V)
70
NORMALIZED BIAS CURRENT, IB (X)
INTERNAL POWER DISSIPATION, P(W)
P r o d u c t I n n o v a t i o nF r o m
70
50
40
30
20
10
10
100
1K
10K
FREQUENCY, F (Hz)
OUTPUT VOLTAGE SWING
6
5
TC =
4
–V O
3
2
0
25°C
° to
25
TC =
TC =
+V O
1
.1M
25°C
° to
25
TC =
85°C
C
85°
2
3
1
4
OUTPUT CURRENT, IO (A)
5
3
PA10 • PA10A
P r o d u c t I n n o v a t i o nF r o m
GENERAL
Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking,
mounting, current limit, SOA interpretation, and specification
interpretation. Visit www.Cirrus.com for design tools that help
automate tasks such as calculations for stability, internal power
dissipation, current limit; heat sink selection; Apex Precision
Power’s complete Application Notes library; Technical Seminar
Workbook; and Evaluation Kits.
±VS
50V
40V
35V
30V
25V
20V
15V
SHORT TO ±VS
C, L, OR EMF LOAD
.21A
.3A
.36A
.46A
.61A
.87A
1.4A
SHORT TO
COMMON
.61A
.87A
1.0A
1.4A
1.7A
2.2A
2.9A
SAFE OPERATING AREA (SOA)
CURRENT LIMITING
The output stage of most power amplifiers has three distinct
limitations:
1. The current handling capability of the transistor geometry
and the wire bonds.
2. The second breakdown effect which occurs whenever the
simultaneous collector current and collector-emitter voltage
exceeds specified limits.
Refer to Application Note 9, "Current Limiting", for details of
both fixed and foldover current limit operation. Visit the Apex
Precision Power web site at www.Cirrus.com for a copy of the
Power Design spreadsheet (Excel) which plots current limits vs.
steady state SOA. Beware that current limit should be thought
of as a +/–20% function initially and varies about 2:1 over the
range of –55°C to 125°C.
For fixed current limit, leave pin 7 open and use equations
1 and 2.
(1)
RCL = 0.65/LCL
(2)
ICL = 0.65/RCL
Where:
ICL is the current limit in amperes.
RCL is the current limit resistor in ohms.
For certain applications, foldover current limit adds a slope
to the current limit which allows more power to be delivered
to the load without violating the SOA. For maximum foldover
slope, ground pin 7 and use equations 3 and 4.
0.65 + (Vo * 0.014)
(3)
ICL =
RCL
OUTPUT CURRENT FROM +VS OR – VS (A)
5.0
4.0
3.0
T
C
=8
T
C
2.0
1.5
1.0
.8
TH
ste
5°C
=1
ER
25
°C
MA
L
ad
ys
t=
ta
te
SE
5m
CO
s
ND
t= t=
1m 0 . 5
s ms
BR
EA
KD
OW
N
.6
.4
.3
.2
10
15
20
25 30 35 40
50 60 70 80 100
SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE VS – VO (V)
3. The junction temperature of the output transistors.
The SOA curves combine the effect of these limits. For a
given application, the direction and magnitude of the output
current should be calculated or measured and checked against
the SOA curves. This is simple for resistive loads but more
complex for reactive and EMF generating loads.
1. For DC outputs, especially those resulting from fault conditions, check worst case stress levels against the new SOA
graph.
For sine wave outputs, use Power Design1 to plot a load
line. Make sure the load line does not cross the 0.5ms limit
and that excursions beyond any other second breakdown
line do not exceed the time label, and have a duty cycle of
no more than 10%.
1
Note 1. Power Design is a self-extracting Excel spreadsheet available free from www.Cirrus.com
For other waveform outputs, manual load line plotting
is recommended. Applications Note 22, SOA AND LOAD
LINES, will be helpful. A Spice type analysis can be very
useful in that a hardware setup often calls for instruments
or amplifiers with wide common mode rejection ranges.
2. The amplifier can handle any EMF generating or reactive
load and short circuits to the supply rail or shorts to common if the current limits are set as follows at TC = 85°C:
4
RCL =
0.65 + (Vo * 0.014)
ICL
(4)
Where:
Vo is the output voltage in volts.
Most designers start with either equation 1 to set RCL for the
desired current at 0v out, or with equation 4 to set RCL at the
maximum output voltage. Equation 3 should then be used to
plot the resulting foldover limits on the SOA graph. If equation 3 results in a negative current limit, foldover slope must
be reduced. This can happen when the output voltage is the
opposite polarity of the supply conducting the current.
In applications where a reduced foldover slope is desired,
this can be achieved by adding a resistor (RFO) between pin
7 and ground. Use equations 4 and 5 with this new resistor
in the circuit.
0.65 + Vo * 0.14
ICL =
10.14 + RFO
RCL
0.65 +
RCL =
Vo * 0.14
10.14 + RFO
ICL
(5)
(6)
Where:
RFO is in K ohms.
PA10U
P r o d u c t I n n o v a t i o nF r o m
PA10 • PA10A
Contacting Cirrus Logic Support
For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America.
For inquiries via email, please contact [email protected]
International customers can also request support by contacting their local Cirrus Logic Sales Representative.
To find the one nearest to you, go to www.cirrus.com
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,
copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives consent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent
does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE
SUITABLE FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE
CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES,
BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL
LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, Apex Precision Power, Apex and the Apex Precision Power logo designs are trademarks of Cirrus Logic, Inc.
All other brand and product names in this document may be trademarks or service marks of their respective owners.
PA10U
5