16-4&8*%5).0%6-"5*0/".1-*'*&3 4" )551888"1&9.*$305&$)$0. "1&9 . * $ 3 0 5 & $ ) / 0 - 0 ( : FEATURES • DELIVERS UP TO 5A CONTINUOUS OUTPUT • OPERATES AT SUPPLY VOLTAGES UP TO 60V • TTL AND CMOS COMPATIBLE INPUTS • NO “SHOOT-THROUGH” CURRENT • THERMAL SHUTDOWN (OUTPUTS OFF) AT 160°C • SHORTED LOAD PROTECTION (to VS or PGND or SHORTED LOAD) • NO BOOTSTRAP CAPACITORS REQUIRED • PROGRAMMABLE ONBOARD PWM 23 Pin SIP Package Style EX APPLICATIONS • DC MOTOR DRIVES • POSITION AND VELOCITY SERVOMECHANISMS • FACTORY AUTOMATION ROBOTS • NUMERICALLY CONTROLLED MACHINERY • COMPUTER PRINTERS AND PLOTTERS • AUDIO AMPLIFICATION DESCRIPTION FIGURE 1. BLOCK DIAGRAM *4&/ $18. 73&' 18. '"6-5 %*4"#-& %*3 5-*. 4$*/ L E $POUSPMMPHJD BOE 18.(FOFSBUPS P R N I 7T 7 7EE 7 "OBMPH (/% Y The SA56 is a 5A PWM Amplifier designed for motion control applications. The device is built using a multi-technology process which combines bipolar and CMOS control circuitry with DMOS power devices in the same monolithic structure. Ideal for driving DC and stepper motors; the SA56 accommodates peak output currents up to 10A. An innovative circuit which facilitates low-loss sensing of the output current has been implemented. On board PWM oscillator and comparator are used to convert an analog signal into PWM direction and magnitude for motor control applications, or to amplify audio signals using class D amplification. M I A R (BUF%SJWF BOE $POUSPM "065 #065 )FBU5BC 1PXFS (/% APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL [email protected]microtech.com SA56 ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS SUPPLY VOLTAGE, VDD SUPPLY VOLTAGE, VS PEAK OUTPUT CURRENT (100mS) CONTINUOUS OUTPUT CURRENT POWER DISSIPATION POWER DISSIPATION (TA = 25°C, Free Air) JUNCTION TEMPERATURE, TJ(MAX) ESD SUSCEPTIBILITY (Logic Signals Only) STORAGE TEMPERATURE, TSTG LEAD TEMPERATURE (Soldering, 10 sec.) JUNCTION TEMPERATURE, TJ 5.5V 60V 10A 5A TBD 3W 150°C 1500V –40°C to +150°C 300°C –40°C to +150°C SPECIFICATIONS PARAMETER TEST CONDITIONS MIN TYP MAX UNITS 60 5.5 0.6 V V Ω 0.6 Ω TBD 0.8 V V +10 VDD µA V 10 350 1.5 ±5 ±8 ±8 µA µA mA % % % 160 12 TBD 6 15 61 66 51 51 59 54 70 70 100 °C mA mA ns ns ns ns ns ns ns ns ns VS 12 VDD 4.5 SWITCH ON RESISTANCE, RDS(ON) Output Current = 5A 0.25 N-Channel SWITCH ON RESISTANCE, RDS(ON) Output Current = 5A 0.3 P-Channel CLAMP DIODE FORWARD DROP, VCLAMP Clamp Current = 5A 1.43 LOGIC LOW INPUT VOLTAGE, VIL -0.5 LOGIC LOW INPUT CURRENT, IIL VIN = –0.1V -10 LOGIC HIGH INPUT VOLTAGE, VIH 2 LOGIC HIGH INPUT CURRENT, IIH CURRENT SENSE OUTPUT CURRENT SENSE LINEARITY A VIN = 5.5V -10 IOUT = 1A 300 IOUT = 5A 1.3 1A ≤ IOUT ≤ 5A ±1 100 mA ≤ IOUT ≤ 5A 5A ≤ IOUT ≤ 10A (Peak Currents only) N I SHUTDOWN TEMPERATURE, TJSD Outputs Turn OFF QUIESCENT SUPPLY CURRENT, IS No Load, FSW = 23KHz 50% DUC QUIESCENT SUPPLY CURRENT, IDD No Load, FSW = 23KHz 50% DUC OUTPUT TURN-ON DELAY TIME, tDon Sourcing Outputs, IOUT = 1A Sinking Outputs, IOUT = 1A OUTPUT TURN-ON SWITCHING TIME, ton Sourcing Outputs, IOUT = 1A Sinking Outputs, IOUT = 1A OUTPUT TURN-OFF DELAY TIMES, tDoff Sourcing Outputs, IOUT = 1A Sinking Outputs, IOUT = 1A OUTPUT TURN-OFF SWITCHING TIME, toff Sourcing Outputs, IOUT = 1A Sinking Outputs, IOUT = 1A MINIMUM INPUT PULSE WIDTH, tp (DIGITAL MODE) L E M I R Y PWM FREQUENCY (DIGITAL MODE) 500 KHz REFERENCE VOLTAGE 2.6 V 1 mA 4 V 800 ns R Vref OUTPUT CURRENT (Vref 2.5V) P 2.4 2.5 Source Only, No current sink capability ANALOG INPUT RANGE FOR Load Current = 400µA 1 FULL MODULATION HIGH CURRENT SHUTDOWN RESPONSE Output shorted 250 (No bypass capacitor at SCin pin) NOTE: These specifications apply for VS = 50V and VDD = 5V at 25°C, unless otherwise specified. APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739 SA56 TYPICAL PERFORMANCE GRAPHS 4VQQMZ$VSSFOU*4 WT4VQQMZ7PMUBHF74 74VQQMZ$VSSFOU*%% WT4VQQMZ7PMUBHF74 4VQQMZ$VSSFOU*4 WT'SFRVFODZ !,)[%6$ 747 74VQQMZ$VSSFOU*%% WT'SFRVFODZ 747 'SFRVFODZ)[ %VUZ$ZDMF #065 , L E "OBMPH*OQVU7 , /PMPBE %VUZ$ZDMF ř"-PBE P R 7477%%7 A N I R , , , 'SFRVFODZ,I[ , , $18.Q' !,)[%6$ 7%%7 5FNQFSBUVSF$ . '48!$ '48!$ , , , , '48!$ 747 $18.WT'48BU7BSZJOH5FNQFSBUVSFT %JPEF'PSXBSE7PMUBHF7'7 , $18.Q' , -PBE$VSSFOUWT5PUBM0O3FTJTUBODF %JPEF'PSXBSE$VSSFOU*'" $MBNQ%JPEF'PSXBSE7PMUBHF%SPQ .BYJNVN%VUZ$ZDMFGPS -JOFBS0QFSBUJPOJO"OBMPH.PEF M I 7%%7747 , 747 'SFRVFODZWT$18. "065 Y 747 5FNQFSBUVSF$ 'SFRVFODZ,)[ !,)[%6$ 7%%7 74VQQMZ$VSSFOU7%% WT5FNQFSBUVSF 747 . 747 'SFRVFODZ,)[ 747 %6$WT"OBMPH*OQVU 4VQQMZ$VSSFOUN" 4VQQMZ$VSSFOU*%%" 4VQQMZ$VSSFOU74 WT5FNQFSBUVSF !,)[%6$ 5PUBM0O3FTJTUBODF0INT *%%N" 'SFRVFODZ)[ 4VQQMZ$VSSFOU*4" *%%N" *4N" 1BOE/$IBO BU%6$ -PBE$VSSFOU" APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL [email protected] SA56 TYPICAL PERFORMANCE GRAPHS *-0"%WT3ET0O *-0"%WT3ET0O 3ET0O 3ET0O 3ET0O 3ET0O 3ET0O0IN 3ET0O 3ET0O 3ET0O 3ET0O %6$GPS/$IBOOFM *-0"%" *-0"%*4&/4&WT*-0"% %6$*4&/4& # $ $ *-0"%" *4&/4&WT*-0"% *-0"%*4&/4& $ 7BSZJOH5FNQFSBUVSFT !%6$*TFOTF" *-0"%" P R $ A N I M I $ $ L E *-0"%" $ *-0"%*4&/4&SBUJPWT*-0"% $ $ *4&/4&N" $ 7BSZJOH5FNQFSBUVSFT !%6$*4&/4&# %6$*4&/4&" *-0"%" Y $ $ *-0"%" *-0"%*4&/4&SBUJPWT*-0"% $ *-0"%*4&/4& *4&/4&N" *-0"%*4&/4& %6$*4&/4&" $ *4&/4&WT*-0"% %6$*4&/4&" *-0"%" GPS1$IBOOFM %6$*4&/4&# 73&'7 3ET0O0INT *-0"%WT*4&/4& *4&/4&N" R $ $ %6$*4&/4&# *-0"%" 73&'WT5FNQFSBUVSF 5FNQFSBUVSF$ APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739 SA56 OPERATING CONSIDERATIONS GENERAL 7 TLIM Please read Application Note 1 "General Operating Considerations" which covers stability, power supplies, heat sinking, mounting, and specification interpretation. Visit www.apexmicrotech.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit, heat sink selection, Apex's complete Application Notes library, Technical Seminar Workbook and Evaluation Kits. GROUND PINS There are 4 GND pins. Pins 9 & 10 are for input signal GND and pins 1 and 23 are for power gnd. 8 POWER SUPPLY BYPASSING Bypass capacitors to power supply terminals Vs and VDD must be connected physically close to the pins to prevent erratic, low efficiency operation and excessive ringing at the outputs. Electrolytic capacitors, at least 10µF per output amp, are required for suppressing Vs to PGND noise. High quality ceramic capacitors (X7R) 1µF or greater should also be used. Only capacitors rated for switching applications should be considered. The bypass capacitors must be located as close to the power supply pins as possible (due to the very fast switching times of the outputs, the inductance of 1 inch of circuit trace could cause noticeable degradation in performance). The bypassing requirements of VDD are less stringent, but still necessary. A 0.1µF to 0.47µF capacitor connected directly between the VDD and GND (SIG) pins will suffice. 9,10 11 12 PIN DESCRIPTIONS Pin # 1,23 Name PGND 2,3 Bout 4,5,19,20VS 6 SCin Description Power ground, high current ground return path of the motor. Half bridge output B High voltage supply Short circuit detect, CMOS. This pin can be used as a flag for a short circuit condition. Under normal operation this pin will be logic low. When a short circuit is detected, or output current exceeds approximately 10A, this pin will change to logic high and the output will be latched off. Grounding this pin disables short circuit protection. This pin should be left open if short circuit protection is desired but the flag is not used. Short circuit protection functions independently of programmable current limit (ISEN). It is nessesary to bypass the SCin pin with a 14-47pF ceramic capacitor. This capacitor will add a delay to the short circuit response but the device will still be able to protect itself against short circuit and over current. P R L E N I 13,14 M I 15 16 Temperature limit, CMOS. This pin can be used as a flag for an over temperature condition. Under normal operation this pin will be logic low. When junction temperature exceeds approximately 160°C this pin will change to logic high and the output will be latched off. Grounding this pin disables over temperature protection. This pin should be left open if over temperature protection is desired but the flag is not used. ISEN/ /ILIMCurrent Sense output and programmable current limit. A current proportional to output current is sourced by this pin. Typically this pin is connected to a resistor for programmable current limit or transconductance operation. GND(Sig) Ground connection for all internal digital and low current analog circuitry. FAULT Protection circuit flag output, CMOS. The fault pin will be logic high when the output MOSFETs have been automatically latched off because of a short circuit or over temperature condition. This pin should be left open if not used. CPWM An external timing capacitor is connected to this pin to set the frequency of the internal oscillator and ramp generator for analog control mode. The capacitor value (pF) = 4.05x107/FSW, where FSW = the desired switching frequency. This pin is grounded for digital control mode. VDD 5V supply for input logic and low voltage analog circuitry. VREF Reference voltage. Can be used at low current for biasing analog loop circuits. DIR Direction logic input, CMOS/TTL. Determines the active output MOSFETs in two quadrant digital control mode. This pin should be grounded for analog control mode. PWM CMOS/TTL input for digital PWM control, or 1-4V analog input for duty cycle control in analog control mode. DISABLE Disable logic input, CMOS/TTL. Logic low on this pin allows the SA56 to function normally. When pulled to logic high, all four output MOSFETs are disabled. Pulling this pin high, then low will reset a latched fault condition caused by a short circuit or over temperature fault. Aout Half bridge output A 17 18 21,22 A R Y APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL [email protected] SA56 OPERATING CONSIDERATIONS MODES OF OPERATION 2 QUADRANT DIGITAL MODE The following chart shows the four modes of operation. Mode CPWM PWM DIR Aout Bout 2 Quad Digital GND Modulation In High High PWM 2 Quad Digital GND Modulation In Low PWM High 4 Quad Digital GND High Modulated In DIR DIR 4 Add Drive Quad Cap. to with Analog set analog Fresignal quency Not used but GND Greater Greater than 50% than 50% high for a high for a low high input input For sign/magnitude (2 quadrant) operation, two digital input signals are required. A digital PWM signal to the PWM pin can control the output duty cycle at one output pin with the other output pin held "HIGH". The digital input on the DIR pin will control direction by selecting the outputs that switch according to the PWM input. If DIR is a logic "HIGH", the A output will be held "HIGH" and the B output will be switched as the inverse of the PWM input signal. If DIR is logic "LOW", the B output will be held "HIGH" and the A output will be switched. Operating in 2 quadrant mode reduces switching noise and power dissipation, but limits the control of the motor at very low speed. A braking function can be achieved by holding the PWM input "LOW", which will turn both of the upper MOSFETs on, rapidly reducing the circulating current of the motor winding. 74 7%% 7%%PS(/%TFFUBCMF 74 $ $ %*3 7%% 5-*. 74 %*4"#-& (/%4*( #065 73&'7 $18. $.0% '*(63&"/"-0(*/16501&3"5*0/ OPERATING WITH DIGITAL INPUTS R 1(/% Two and 4 quadrant operation are possible with the SA56 when driven with a digital PWM signal from a microcontroller or DSP. When using a digital modulation signal, tie the CPWM pin to GND to disable the internal oscillator and ramp generator. When operating in the digital mode, pulse widths should be no less than 100ns and the switching frequency should remain less than 500KHz. This will allow enough time for the output MOSFETs to reach their full on/off state before receiving a command to reverse state. P '"6-5 NPEVMBUJPOTJHOBM 18. A 73&'7 $18. R 4" 74 "065 (/%4*( *4&/ 34&/4& #065 1(/% )FBU5BC During 4 quadrant operation a single digital PWM input includes magnitude and direction information. The digital PWM input signal is applied to the DIR pin and the PWM/INPUT pin is tied to "HIGH". Both pairs of output MOSFETs will switch in a locked anti-phase fashion from 0-100% duty cycle. With a 50% duty cycle the average voltage of each output will be half of Vs, and the differential voltage applied to the load will be zero. Four quadrant operation allows smooth transitions through zero current for position servos and low speed applications. Power dissipation is slightly higher since all four output MOSFETs switch every cycle. M I )FBU5BC L E *4&/ 34&/4& %*4"#-& N I 5-*. 7%% 4 QUADRANT DIGITAL MODE "065 4" '"6-5 18. 4$*/ 4$*/ '*(63&26"%3"/5%*(*5"-.0%& $ $ %*3 The SA56 can operate with analog or digital inputs. In the analog mode, the capacitor from CPWM to GND (SIG) sets the frequency of an internal triangular ramp signal. An analog input at the PWM pin is compared to the ramp to generate the duty cycle of the output. In Analog mode, the digital input on the DIR pin is ignored, though this pin should never be left floating. Y $ $ ANALOG INPUT OPERATION 7%% $ $ 7%% $ 74 $ $ $ NPEVMBUJPOTJHOBM 7%% %*3 5-*. 7%% %*4"#-& 74 (/%4*( #065 73&'7 $18. "065 4" '"6-5 18. 4$*/ *4&/ 1(/% )FBU5BC 34&/4& '*(63&26"%3"/5%*(*5"-.0%& APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739 SA56 OPERATING CONSIDERATIONS PROTECTION CIRCUITS CURRENT SENSE LINEARITY CALCULATION Thermal and short circuit protection are included in the SA56 to prevent damage during fault conditions. High current protection circuits will sense a direct short from either output to GND or Vs as well as across the load. The thermal protection will engage when the temperature of the MOSFETs reach approximately 160°C. The FAULT output pin will go "HIGH" if either protection circuits engages and will place all MOSFETs in the "OFF" state (high impedance output). The SC or TLIM output will also go "HIGH", to indicate which of the protection features has been triggered. The fault going high disables the 4 output transistors. To reset the fault condition, cycle the VDD power or bring the DISABLE pin "HIGH" then "LOW". The most severe condition for any power device is a direct, hard-wired ("screwdriver") short from an output to ground. While the short circuit protection will latch the output MOSFETs within 250ns (typical) the die and package may be required to dissipate up to 600 Watts of power until the protection is engaged. This energy can be destructive, particularly at higher operating voltages, so good thermal design is critical if such fault tolerance is required of the system. The current sense linearity is calculated using the method described below: a)Define straight line (y = mx + c) joining the two end data points where, m is the slope and c is the offset or zero crossover. Calculate the slope m and offset c using the extreme data points. Assume Isense in the y axis and Iload in the x axis. b)Calculate linear Isense (or ideal Isense value, ISIDEAL) using the straight line equation derived in step (a) for the Iload data points. c) Determine deviation from linear Isense (step (b)) and actual measured Isense value (ISACTUAL) as shown below: PROGRAMMABLE CURRENT LIMIT The ISEN pin sources a current proportional to the forward output current of the active P channel output MOSFET. The proportionality is 300µA (nom) per ampere of output current. The ISEN output is blocked during the switching transitions when current spikes can be significant. To create a programmable current limit, connect a resistor from ISEN out to GND. When the voltage across this resistor exceeds internally generated 2.75V threshold, all 4 output MOSFETs will be turned off for the remainder of the switching cycle. A 2.75KΩ resistor will set the current limit to approximately 5 Amps. The ISEN output can also be used for maintaining a current control loop in torque motor applications. P R L E %FWJBUJPOGSPN-JOFBSJUZ *4*%&"-m*4"$56"r *4*%&"- IC rev C errata information Y This document describes the errata information for SA56 rev C full H-Bridge DC motor driver. Rev C parts can be identified by date code 0206 marked on the EX package. Errata Number Description and Date 1 Dated: 3/3/06 M I A R TLIM pin: This pin is modified to serve as a flag for any fault occurrence including short-circuit, over current and over temperature. N I Impact Impact: Grounding the TLIM pin disables all fault protection mechanisms in the SA56 including SC, over current and over temp. This pin should be left floating at all times unless the user desires to disable all protection mechanisms. Note: The errata items described in the table above are strictly for beta samples and will be rectified to conform to SA56U specifications for the production parts. APEX MICROTECHNOLOGY • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 ORDERS (520) 690-8601 • EMAILare [email protected] This data sheet has been carefullyCORPORATION checked and is believed to be reliable, however, no responsibility is assumed for possible• inaccuracies or omissions. All specifications subject to change without notice. SA56U REV 10 MARCH 2006 © 2006 Apex Microtechnology Corp.