VRE3025 VRE3025 P r o d u c t IInnnnoovvaa t i o n FFr roomm Precision Voltage Reference Features DESCRIPTION Applications The device provides ultrastable +2.5 V output with ±0.25 mV (.01%) initial accuracy and a temperature coefficient of 0.6 ppm/ºC. This improvement in accuracy is made possible by a unique, patented multipoint laser compensation technique. Significant improvements have been made in other performance parameters as well, including initial accuracy, warm-up drift, line regulation, and long-term stability, making the VRE3025 series the most accurate reference available. The VRE3025 is a low cost, high precision +2.5 V reference that operates from +10 V. The device features a buried zener for low noise and excellent long term stability. Packaged in either an 8-pin DIP or SMT option, the device is ideal for high resolution data conversion systems. ♦ +2.5 V Output, ± 0.25 mV (.01%) ♦ Temperature Drift: 0.6 ppm/ºc ♦ Low Noise: 1.5 μVP-P (0.1Hz-10Hz) ♦ Low Thermal Hysteresis: 1 ppm Typical ♦ ±15 mA Output Source and Sink Current ♦ Excellent Line Regulation: 5 ppm/V Typical ♦ Optional Noise Reduction and Voltage Trim ♦ Industry Standard Pinout: 8-pin DIP or Surface Mount Package The VRE3025 is recommended for use as a reference for 14, 16, or 18 bit data converters which require an external precision reference. The device is also ideal for calibrating scale factor on high resolution data converters. The VRE3025 offers superior performance over monolithic references. For enhanced performance, the VRE3025 has an external trim option for users who want less than 0.01% initial error. For ultra low noise applications, an external capacitor can be attached between the noise reduction pin and the ground pin. Figure 1. BLOCK DIAGRAM 8 2 + 6 - R1 R4 R2 5 R3 4 Selection Guide Model Initial Error (mV) Temp. Coeff. (ppm/ºC) Temp. Range (ºC) Package Options VRE3025AS VRE3025AD VRE3025BS VRE3025BD VRE3025CS VRE3025CD VRE3025JS VRE3025JD VRE3025LS 0.250 0.250 0.375 0.375 0.500 0.500 0.250 0.250 0.500 0.6 0.6 1.0 1.0 2.0 2.0 0.6 0.6 2.0 0ºC to +70ºC 0ºC to +70ºC 0ºC to +70ºC 0ºC to +70ºC 0ºC to +70ºC 0ºC to +70ºC -40ºC to +85ºC -40ºC to +85ºC -40ºC to +85ºC SMT8 (GF) DIP8 (KD) SMT8 (GF) DIP8 (KD) SMT8 (GF) DIP8 (KD) SMT8 (GF) DIP8 (KD) SMT8 (GF) VRE3025DS http://www.cirrus.com 8-pin Surface Mount Package Style GF Copyright © Cirrus Logic, Inc. 2009 (All Rights Reserved) 8-pin DIP Package Style KD JUN 20091 APEX − VRE3025DSREVG VRE3025 P r o d u c t I n n o v a t i o nF r o m 1. Characteristics and Specifications ABSOLUTE MAXIMUM RATINGS Power Supply............................ -0.3V to +40V OUT, TRIM................................. -0.3V to +12V NR............................................... -0.3V to +6V Operating Temp. (A,B,C)............ 0ºC to +70ºC Operating Temp. (J,L).............. -40ºC to +85ºC Out Short Circuit to GND Duration (VIN< 12V)............ Continuous Out Short Circuit to GND Duration (VIN< 40V)......................5 sec Out Short Circuit to IN Duration (VIN< 12V)................ Continuous Continuous Power Dissipation (TA = +70ºC)..................... 300mW Storage Temperature.......................................... -65ºC to +150ºC Lead Temperature (soldering,10 sec)............................... +250ºC ELECTRICAL Specifications Vps =±15V, T = +25ºC, RL = 10KΩ Unless Otherwise Noted. Parameter Input Voltage Output Voltage (Note 1) Symbol VOUT Trim Adjustment Range Supply Current Typ Max Units +2.4998 +36 V +2.500 +2.5003 VRE3025B +2.4996 +2.500 +2.5004 VRE3025C/L +2.4995 +2.500 +2.5005 0.3 0.6 +8 V VRE3025B 0.5 1.0 VRE3025C/L 1.0 2.0 ∆VOUT Figure 3 ±2.5 TON To 0.01% of final value 2 µs 0.1Hz < f < 10Hz 1.5 µVp-p 10Hz < f < 1kHz 1.5 en Temperature Hysterisis Long Term Stability VRE3025A/J VRE3025A/J TCVOUT Output Noise Voltage Min VIN Output Voltage Temperature Coefficient (Note 2) Turn-On Settling Time Conditions Note 4 ∆VOUT/t Load Regualtion ∆VOUT/ ∆IOUT Line Regulation ∆VOUT/ ∆VIN mV 3.0 µVRMS 1 ppm 6 ppm/1000hrs. 3.5 4.0 Sourcing: 0mA ≤ IOUT ≤ 15mA 8 12 Sinking: -15mA ≤ IOUT ≤ 0mA 8 12 8V ≤ VIN ≤ 10V 25 35 10V ≤ VIN ≤ 18V 5 10 IIN ppm/ºC mA ppm/mA ppm/V NOTES: 1. The specified values are without external trim. 2. The temperature coefficient is determined by the box method. See discussion on temperature performance. 3. Line and load regulation are measured with pulses and do not include voltage changes due to temperature. 4. Hysterisis over the operating temperature range. 2 VRE3025DS VRE3025 P r o d u c t I n n o v a t i o nF r o m 2. TYPICAL PERFORMANCE CURVES VOUT vs. TEMPERATURE VOUT vs. TEMPERATURE 1.00 0.75 0.75 0.50 0.50 0.50 0 -0.25 Low Loer wer Limi Lim itt -0.50 Up per 0.25 0 -0.25 Lo wer -0.50 -0.75 Lim it ∆Vout (mV) Uper per LiLim it Upp mit 0.25 Lim it 0 20 30 40 50 60 Temperature (oC) VRE3025A -1.00 70 0 2.0 1.5 1.5 1.0 1.0 Up per 0.5 Lim it 0 -0.5 Lo wer -1.0 Lim it -1.5 -2.0 -50 -25 0 25 50 75 100 Temperature (oC) VRE3025J 3.0 30 40 50 60 Temperature (oC) VRE3025C 70 Lo wer Lim it 0 -0.5 -1.5 -2.0 -50 -25 25 50 75 100 0 Temperature (oC) VRE3025L OUTPUT IMPEDIANCE VS. FREQUENCY 6.0 4.0 2.0 0 0 5 10 15 20 25 30 35 40 Supply Voltage (V) -50 JUNCTION TEMP. RISE VS. OUTPUT CURRENT 40 Junction Temperature Rise Above Ambient (oC) 20 Output Impediance ( Ω) Quiescent Current (mA) 4.0 30 20 c Vc = 10 V 10 0 Lim it 8.0 5.0 0 Up per QUIESCENT CURRENT VS. TEMP 0 VRE3025DS 4 8 6 2 Output Current (mA) 100 Ripple Rejection (dB) Supply Current (mA) 6.0 0 0.5 -1.0 SUPPLY CURRENT VS. SUPPLY VOLTAGE Lim it VOUT vs. TEMPERATURE 2.0 ∆Vout (mV) ∆Vout (mV) VOUT vs. TEMPERATURE Lo wer 0 -1.00 70 Lim it -0.25 -0.50 20 30 40 50 60 Temperature (oC) VRE3025B Up per 0.25 -0.75 -0.75 -1.00 VOUT vs. TEMPERATURE 1.00 0.75 ∆Vout (mV) ∆Vout (mV) 1.00 10 0 50 100 Temperature (oC) Frequency (Hz) RIPPLE REJECTION Vs. FREQUENCY(CNR=0µF) TURN-ON AND TURN-OFF TRANSIENT RESPONSE +10V A 0V 90 80 B 70 60 10 1k 100 Frequency (Hz) 10k A: Vin, 10V/div B: Vout, 1V/div 1 µs/div 3 OUTPUT NOISE-VOLTAGE DENSITY vs. FREQUENCY 40 30 20 10 10 1k 100 10k Frequency (Hz) CHANGE IN OUTPUT VOLTAGE VS. OUTPUT CURRENT 400 CHANGE IN OUTPUT VOLTAGE VS. INPUT VOLTAGE 60 300 50 200 40 Vout (ppm) 50 P r o d u c t I n n o v a t i o nF r o m Vout (µV) Output Noise Density (nV/√Hz) VRE3025 100 0 -100 30 20 10 -200 0 -300 -10 -400 0 2 4 6 8 10 12 14 16 Iout(mA) -20 0 9 10 11 12 13 14 15 16 Vin(V) ∆Vout, 0.5µV/Div 0.1Hz to 10Hz Noise 1 Sec/Div 3. THEORY OF OPERATION The following discussion refers to the block diagram in Figure 1. A FET current source is used to bias a 6.3 V zener diode. The zener voltage is divided by the resistor network R1 and R2. This voltage is then applied to the noninverting input of the operational amplifier which amplifies the voltage to produce a 2.5 V output. The gain is determined by the resistor networks R3 and R4: G=1 + R4/R3. The 6.3 V zener diode is used because it is the most stable diode over time and temperature. The current source provides a closely regulated zener current, which determines the slope of the references’ voltage vs. temperature function. By trimming the zener current a lower drift over temperature can be achieved. But since the voltage vs. temperature function is nonlinear this compensation technique is not well suited for wide temperature ranges. A nonlinear compensation network of thermistors and resistors that is used in the VRE series voltage references. This proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By adjusting the slope, a very stable voltage is produced over wide temperature ranges. This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability. The proper connection of the VRE3025 series voltage references with the optional trim resistor for initial error and the optional capacitor for noise reduction is shown below. 4 VRE3025DS VRE3025 P r o d u c t I n n o v a t i o nF r o m EXTERNAL CONNECTIONS + VIN Optional Noise Reduction Capacitor 2 8 6 + VOUT VRE3025 CN 1µF 4 5 10kΩ Optional Fine Trim Adjustment PIN DESCRIPTIONS 1, 3, 7 N. C. Internally connected. Do not use 2 VIN Positive power supply input 4 GND Ground 5 TRIM External trim input. Leave open if not used. 6 OUT Voltage reference output 8 NR Noise Reduction 4. BASIC CIRCUIT CONNECTION To achieve the specified performance, pay careful attention to the layout. A low resistance star configuration will reduce voltage errors, noise pickup, and noise coupled from the power supply. Commons should be connected to a single point to minimize interconnect resistances. 5. TEMPERATURE PERFORMANCE The VRE3025 is designed for applications where the initial error at room temperature and drift over temperature are important to the user. For many instrument manufacturers, a voltage reference with a temperature coefficient less than 1 ppm/°C makes it possible to not have to perform a system temperature calibration, a slow and costly process. Of the three TC specification methods (slope, butterfly, and box), the box method is used commonly used. A box is formed by the min/max limits for the nominal output voltage over the operating temperature range. The equation follows: VMAX – VMIN T.C. = x 106 VNOMINAL x (TMAX – TMIN) This method corresponds more accurately to the method of test and provides a closer estimate of actual error than the other methods. The box method guarantees limits for the temperature error but does not specify the exact shape and slope of the device under test. A designer who needs a 14-bit accurate data acquisition system over the industrial temperature range (-40°C to +85°C), will need a voltage reference with a temperature coefficient (TC) of 1.0 ppm/°C if the reference is allowed to contribute an error equivalent to 1LSB. For 1/2LSB equivalent error from the reference you would need a voltage reference with a temperature coefficient of 0.5 ppm/°C. Figure 4 shows the required reference TC vs. delta T change from 25°C for resolution ranging from 8 bits to 20 bits. VRE3025DS 5 VRE3025 P r o d u c t I n n o v a t i o nF r o m 10000 Reference TC (ppm/ºC) 1000 100 8 BIT 10 10 BIT 12 BIT 1 14 BIT 16 BIT 0.1 18 BIT 0.01 20 BIT 1 10 100 Reference TC vs. ∆T change from 25°C for 1 LSB change 6. THERMAL HYSTERISIS A change in output voltage as a result of a temperature change. When references experience a temperature change and return to the initial temperature, they do not always have the same initial voltage. Thermal hysterisis is difficult to correct and is a major error source in systems that experience temperature changes greater than 25°C. Reference vendors are starting to include this important specification in their datasheets. PIN CONFIGURATION 6 N/C 1 +VIN 2 N/C 3 GND 4 VRE3025 TOP VIEW 8 NOISE REDUCTION 7 N/C 6 VOUT 5 TRIM VRE3025DS P r o d u c t I n n o v a t i o nF r o m VRE3025 Contacting Cirrus Logic Support For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America. For inquiries via email, please contact [email protected]. International customers can also request support by contacting their local Cirrus Logic Sales Representative. To find the one nearest to you, go to www.cirrus.com IMPORTANT NOTICE Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. 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