ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
Differential inputs, 1pA bias current.
Features
Differential reference for ratiometric ohms.
Multi-function measurement system :
Analog to digital converter.
On-chip voltage reference,
drift.
Short circuit beeper.
C
Low linearity error.
Frequency counter.
Frequency counter, auto range from 2KHz to
20MHz
Low battery detector.
Description
Display hold and Max/Min.
The ES5108 is design for 3 1/2-Digit Digital Multimeter which combines an integrated A/D converter,
MAX/MIN, hold, short circuit beeper, low battery detector, a frequency counter, and serial data output.
A ’HOLD’ input allows the ES5108 to hold the current A/D readout or frequency readout. The frequency
counter is auto-ranging from 2KHz to 20MHz over a
five decade range with KHz and MHz annunciators.
Short circuit beeper will sound whenever the readout
is less than 30 after enabling the short circuit beeper.
This feature is useful in detecting short circuits without
watching the LCD.
The ES5108 provides 3 independent decimal point driving pins for the manufacturer to determine which decimal point or unit is display, the 3 decimal point drivers
are built-in ES5108.
Triplex LCD display.
Full 3 1/2-Digit Display.
Annunciators—Hold, Max/Min,
MHz, Low-bat, Continuance.
KHz,
1 annunciator drive pin for unit display.
3 decimal point drivers with 3 independent
control pins.
Polarity driver.
Displays "OL" for input over range.
Provides serial data output.
Guaranteed zero reading with zero input.
True polarity indication for precision null detection.
Application
Convenient 9V battery operation.
Digital panel meters, digital multimeters, thermometers, capacitance meters, pH meters, photometers, etc.
Low noise A/D converter:
1
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
Block Diagram
% #
- % 8
9
" # ! " $
9
% 8
9
& ! " #
! " $
!
" & " !
" % " ' ( ) *+ ( ! , & $
" & ! & " & & & ! " % 2
" ! - & . . * - $
& , & $
& % 0 1 2 3
4 5 6 7
- & . . - . ! - . ! & ! / November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
Pin Assignment
CREF+
CREFANA-COM
VIN+
VINCAZ
VBUFF
CINT
VEOC
BZINM
SDO
LQFP-48pin
48 47 46 45 44 43 42 41 40 39 38 37
1
2
3
4
5
6
7
8
9
10
11
12
ES5108L
VREFVREF+
DGND
OSC3
OSC2
OSC1
INT
FREQ/VOLT
V+
CONT/-/MHz
B4/C4/DP3
KHz/F3/E3
36
35
34
33
32
31
30
29
28
27
26
25
CLK
BZINS
BZOUT
LB
HOLD
MAX
RESET
DP3
DP2
DP1
ANNUNC
DINT
13 14 15 16 17 18 19 20 21 22 23 24
A3/G3/D3
B3/C3/DP2
HOLD/F2/E2
A2/G2/D2
B2/C2/DP1
MAX/F1/E1
A1/G1/D1
B1/C1/BAT
COM1
COM2
COM3
FREQ-IN
1
3
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
2
SSOP-48pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
ES5108D
FREQ/VOLT
V+
CONT/-/MHz
MIN/B4C4/DP3
KHz/F3/E3
A3/G3/D3
B3/C3/DP2
HOLD/F2/E2
A2/G2/D2
B2/C2/DP1
MAX/F1/E1
A1/G1/D1
B1/C1/BAT
COM1
COM2
COM3
FREQ-IN
DINT
ANNUNC
DP1
DP2
DP3
RESET
MAX/MIN
4
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
INT
OSC1
OSC2
OSC3
DGND
VREF+
VREFCREF+
CREFANA-COM
VIN+
VINCAZ
VBUFF
VINT
VEOC
BZINN
SDO
CLK
BZINS
BZOUT
LB
HOLD
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
3
DIP-40pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
ES5108CE
V+
CONT/-/MHz
B4C4/DP3
KHz/F3/E3
A3/G3/D3
B3/C3/DP2
HOLD/F2/E2
A2/G2/D2
B2/C2/DP1
MAX/F1/E1
A1/G1/D1
B1/C1/BAT
COM1
COM2
COM3
DINT
ANNUNC
DP1
DP2
DP3
5
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
OSC1
OSC2
OSC3
DGND
VREF+
VREFCREF+
CREFANA-COM
VIN+
VINCAZ
VBUFF
CINT
VBZINN
BZOUT
HOLD
MAX
RESET
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
Pin Description
Pin No.
1
2
3
4
5
6
7
8
Symbol
VREFVREF+
DGND
OSC3
OSC2
OSC1
INT
FREQ/VOLT
Type
O
I
: 9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
V+
CONT/-/MHz
B4/C4/DP3
KHz/F3/E3
A3/G3/D3
B3/C3/DP2
HOLD/F2/E2
A2/G2/D2
B2/C2/DP1
MAX/F1/E1
A1/G1/D1
B1/C1/BAT
COM1
COM2
COM3
FREQ-in
DINT
ANNUNC
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
O
O
27
DP1
I
28
DP2
I
29
DP3
I
30
RESET
I
<
31
MAX
32
HOLD
33
LB
continued on next page ;
;
;
I
I
O
Description
Low differential reference input connection.
High differential reference input connection.
Pull high to V+ all LCD segments will be activated.
Crystal oscillator connection.(RC)
Crystal oscillator connection.(output)
Crystal oscillator connection.(input)
Integration status flag.
Frequency counter/voltage measurement select pin. Connecting to V+
will enable the frequency counter, connecting to TEST1 or open will execute voltage measurement. This pin is internally pull down to TEST1.
Positive supply voltage.
LCD segment drive. (Continuity., polarity, MHz)
LCD segment drive. (B4, C4, decimal point3)
LCD segment drive. (KHz, F3, E3)
LCD segment drive. (A3, G3, D3)
LCD segment drive. (B3, C3, decimal point2)
LCD segment drive. (Data Hold, F2, E2)
LCD segment drive. (A2, G2, D2)
LCD segment drive. (B2, C2, decimal point 1)
LCD segment drive. (Max, F1, E1)
LCD segment drive. (A1, G1, D1)
LCD segment drive. (B1, C1, low battery)
LCD common drive#1.
LCD common drive#2.
LCD common drive#3.
Frequency counter input pin.
De-Integration status flag.
Square wave output at the LCD backplane frequency, synchronized to
COM1. Connecting an LCD segment to ANNUNC pin turns it on; connecting to backplane turns it off.
1st decimal point selection input for voltage measurement, internally
pulled-down to TEST1.
2nd decimal point selection input for voltage measurement, internally
pulled-down to TEST1.
3rd decimal point selection input for voltage measurement, internally
pulled-down to TEST1.
Reset input pin. Connecting to V+ will cancel both MAX/MIN and
Hold functions.
MAX input pin. Pulse to V+ to enable MAX function.
Hold input pin. Connecting to V+ for hold function.
Low battery flag. Pull high if low battery.
This table is for ES5108L
6
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
;=;
; continued from previous page
Pin No.
Symbol
Type
34
BZOUT
O
Description
Piezo buzzer output. Driving a buzzer at 2.5KHz audio frequency.
1. Whenever the readout is less than 30 and BZINS is connected to
V+, BZOUT will generate a 2.5 KHz sound output.
2. Whenever the BZINM is connected to V+ it will force the
BZOUT to generate 2.5KHz sound output.
35
BZINS
I
36
37
38
CLK
SDO
BZINM
I
O
I
39
40
41
42
43
44
45
46
47
48
EOC
VVINT
VBUFF
CAZ
VINVIN+
ANA-COM
CREFCREF+
O
P
I
I
O
-
Buzzer control slave input. This pin is internally pulled-down to
TEST1. See BZOUT
External clock input pin for serial data accessing.
Serial data output pin.
Buzzer control master pin. This pin is internally pulled-down to TEST1.
See BZOUT
End of conversion indicator.
Negative supply voltage. Connecting to battery negative terminal.
Integrator output.
Integration register connection.
Auto-zero capacitor connection.
Analog low input signal.
Analog high input signal.
Set the common-mode voltage for the system.
Negative capacitor connection for on-chip A/D converter.
Positive capacitor connection for on-chip A/D converter.
Note:
1. -/MHz for ES5108D
Absolute Maximum Ratings
Characteristic
Supply Voltage (V+ to V-)
Analog Input Voltage (either input)
Reference Input Voltage (either input)
Clock Input
Power Dissipation(plastic package)
Operating Temperature
Storage Temperature
Lead Temperature (soldering, 10sec)
Rating
12V
V+ to VV+ to VDGND to V+
800mW
C to >@? C
ABDC C to EF C
GD? C
Electrical Characteristics
Parameter
DC Characteristics Zero Input Reading
continued on next page ;
;=;
Symbol
–
Test Condition
H ILKNMOP; DQ , fullJ
scale=200.0mV
7
Min.
-000.0
Typ.
RSD; Max.
+000.0
Units
Digital Reading
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
;=;
; continued from previous page
Parameter
Symbol
Ratiometric Reading
–
Linearity (Max. deviation
from best straight line fit)
Roll-over Error
–
Common Mode Rejection
Ratio
Low battery flag
Noise
–
Input Leakage Current
Zero Reading Drift
–
–
Analog COMMON Voltage
(with respect to V i )
–
Analog COMMON Temperature Cofficient
–
Segment Drive Voltage
Back plane Drive Voltage
Supply Current (Does not
include COMMON current)
–
–
–
Frequency counter input
level
–
–
–
–
Test Condition
HJILK =HUTWVYX ,
H TZVYX =100mV
full-scale=200mV or
full-scale=2.000V
A\HJILK = >UHUI]K
^
200.0mV
HU_W` = R 1V,HUILK =0V
Full-Scale=200.0mV
V+ to VH ILK
M
DQ , fullscale=200.0mV
HJILKbMcDQ
H ILK
M
DQ ,
C dBegfhdU>@? C
25K j
Between
Common and Positive Supply
25K j
Between
Common
and
H i , C d TA dk?l C
Hmi to Hon =9V
Hmi to Hon =9V
HJILK =0V
QWprqtsuQWvxwzy|{
Q przLFD
Min.
999
Typ.
999/1000
Max.
1000
Units
Digital Reading
-1
RSP;[G
1
Counts
-1
RSP;[G
+1
Counts
–
50
–
a V/V
6.6
–
6.9
15
7.2
–
V
a Vp-p
–
–
1
0.2
10
1
pA
a V/ C
2.8
3.0
3.2
V
–
60
75
ppm/ C
4
4
–
5
5
1.2
6
6
1.6
V
V
mA
Q}i~AED; C
–
–
DGND
+1.5
V
Input terminals :
BZINM, BZINS, MAX/MIN, HOLD, RESET, FREQ/VOLT, CLK, DP1, DP2, DP3
Input logic high voltage
Q}i~AED; C
–
–
–
–
DGND
Input logic low voltage
+1.5
Pull down current
–
–
5
–
QWpr = Qoi
V
a A
AC Characteristics
Characteristics
Symbol Min.
LCD display frequency
–
Operating frequency
]
–
Buzzer drive frequency
–
=
xF
FREQ-IN Waveform Rising Time
–
FREQ-IN Waveform Falling Time
–
W
FREQ-IN Waveform Pulse Width
17
Clock Delay Time
1
Data Set-up Time
–
¡ x¢£
EOC Pulse Width
–
Clock Pulse Width
500
W=¤
MAX/MIN duration
0.8
MAX/MIN and HOLD Keys
Key debounce time
–
¡¢
x¡¤
Key hold time
50
Typ.
167
40
2.5
–
–
–
–
–
–
–
–
Max.
–
–
–
20
20
–
5000
500
10
–
–
Unit
Hz
KHz
KHz
ns
ns
ns
a s
ns
ms
ns
sec
32
–
8
38
–
ms
ms
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
4
Timing Waveforms
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Functional Description
1
Analog Common
The Common pin is used to set the common-mod voltage for the system in which the input signals are floating with
respect to the power supply of the ES5108. In most of the applications, VIN-, VREF- and COMMON pins are tied to
the same point, so that the common mode voltage can be removed from the reference system and the converter. In some
applictions, VIN- may not at the same point with COMMON and thus a common mode voltage exists in the system, The
high CMRR(86db typical) of the ES5108 can take care of this common mode voltage. Nevertheless, it should be care to
prevent the output of the integrator from saturation.
The COMMON pin is also used as a voltage reference. It sets a voltage of around 2.9 volts more negative than the
positive supply. The COMMON voltage of ES5108 has a low output impedance of ECj typical.
The analog COMMON is tied internally to an N-channel FET capable of sinking 30mA. This FET will hold the COMMON voltage at 2.9 volts when an external load attempts to pull the COMMON voltage toward the positive supply.
The source current of COMMON is only 10 a A, so it is easy to pull COMMON voltage to a more negative voltage
with respect to the positive supply.
When the total supply voltage is large enough to cause the zener to regulate(>7V), the COMMON voltage will have
a low temperature coefficient typically less than DW× C. This voltage can be used to generate the ES5108 reference
voltage and anexternal voltage reference will be unnecessary in most cases.
9
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
2
Reference Voltage
For a 1000 counts reading, the input signal must be equal to the reference voltage. As a result, it requires the input signal
be twice the reference voltage for a 2000 counts full-scale reading. Thus, for the 200.0mV and 2.000V full-scale, the
reference voltage should equal 100.0mV and 1.000V, In some applications the full-scale input voltage my be other than
200mV or 2V, but 600mV. For example, the reference voltage should be set to 300mV and the input signal can be used
directly without being divided.
The differential reference can be used during the measurement of resistor by the ratiometric method and when a digital
reading of zero is desired for QØ]ÙÛM Ú 0. A compensating offset voltage can be applied between COMMON and VIN- and
the voltage of being measured is connected between COMMON and VIN+.
3
System Timing
The oscillator frequency is divided by four prior to clocking the internal decade counters. The signal integrate takes a
fixed 1000 counts time period which is equal to 4000 clock Pulses. The backplane drive signal is derived from dividing
clock frequency by 240. To make a maximum rejection of line frequency(60Hz or 50Hz)noise pickup, the signal integrate
period should be a multiple of the line frequency period. For 60Hz-noise rejection, oscillator frequencies of 120KHz,
80KHz, 60KHz, 48KHz, 40KHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 100KHz, 50KHz,
40KHz, etc. would be suitable.
For all ranges of frequency Ü r £ should be 100K j , Ý Þ is selected from the approximate equation f ^ 0.45/RC. For
48KHz clock (3reading/second), Ý £ =100PF.
4
Integrating Resistor
The input buffer amplifier and integrator both have class A output stage with 100 a A of quiescent current and can supply
20a A drive currents with negligible linearity errors. The integrating resistor should be chosen to remain in the output
stage linear drive region. It should be noticed that the integrating resistor should not be so large such that the leakage
currents of printed circuit board will induce errors. For a 200mV full-scale the recommended integrating resistor value is
47K j and for 2V full-scale is 470K j .
5
Integrating Capacitor
The integrating capacitor should be selected to maximize integrator output voltage swing without causing output saturation. If the analog COMMON is used as voltage reference, a R 2V full-scale integrator output swing is satisfactory. For
3 readings/second (48KHz clock) a 0.22 a F value of Ý|pßgà is suggested. When different oscillator frequencies are used,
Ý|pßgà must be changed in inverse proportion to maintain the nominal R 2V integrator swing.
The integrating capacitor should have low dielectric absorption to minimize roll-over error. An inexpensive polypropylene capacitor will work well.
6
Auto-Zero Capacitor
The auto-zero capacitor size has some influence on system noise. A 0.47 a F capacitor is recommended for 200mV full
scale where noise is very important. A 0.047 a F capacitor is adequate for 2V full-scale applications. A mylar type
dielectric capacitor is adequate.
7
Reference Voltage Capacitor
When VIN- is tied to analog COMMON, a 0.1 a F capacitor adequate to be the reference capacitor. If a large common-mod
voltage exists and the application requires a 200mV full scale, a larger value is required to prevent roll-over error. A 1.0 a F
capacitor will hold the roll-over error to 0.5 count.
10
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
8
TEST
The TEST pin is tied to the internally generated digital supply. It’s potential is 5V less than Q i . Thus TEST may be used
as the negative power supply connection for externally generated segment drivers.
If TEST is pulled low to Qán all segments plus the minus sign will be activated and the display should read -1888. For
such operation, the segment has a constant DC voltage and may destroy the LCD display if left in this mode for several
minutes.
9
Frequency Counter
The ES5108 provides 2KHz to 2MHz five-decade auto-range frequency counter. In the counter mode, pulses at the
FREQ-IN will be counted and displayed. The frequency counter derives its time base from the clock oscillator and gets
one readout persecond. The frequency counter accuracy is determined by the oscillator accuracy. For accurate frequency
measurement, a 40KHz quartz crystal oscillator is recommended.
The decimal points are automatically set to frequency mode.See following table :
FREQ-IN
0KHz to 1.999KHz
2.0KHz to 19.99KHz
20KHz to 199.9KHz
200KHz to 1999KHz
2.0MHz to 19.99MHz
20MHz or more
10
Decimal point Annunciator
DP3
KHz
DP2
KHz
DP1
KHz
NONE
KHz
DP2
MHz
DISPLAY "OL"
Hold, MAX and MAX/MIN
"Hold" function will hold the current readout and converter operation.
"MAX" function in ES5108L will display the maximum value.
"MAX/MIN" function in ES5108D has two mode : MAX and MIN. When the MAX/MIN is pressed for the first time, the
meter displays the maximum value. When the MAX/MIN is pressed again, the meter displays the minimum value. The
meter returns to normal mode if the MAX/MIN is pressed more then one seconds.
11
Serial data output
the ES5108 provides serial data output for use in connection with microcontrollers. During this operation, ES5108 uses
CLK, SDO and EOC pins. The following is the timing diagram of this connection.
The EOC pin will be pulled HIGH at the end of conversion and the content of serial output data buffer will update simultaneously.
The waveform of EOC pin will go LOW as soon as CLK pin receives clock signal.Otherwise the EOC pin will stay HIGH
and then go LOW in 10ms.
Serial data output format :
D15
LSB
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MSB
1. Voltage Mode :
(a) D0(Polarity) : ’1’ for ’+’ and ’0’ for ’-’
(b) D1(MSD) : ’1’ for MSD = 1 and ’0’ for MSD = 0
(c) D2 to D5 for 3rd LSD(from 0000 to 1001).
(d) D6 to D9 for 2nd LSD(from 0000 to 1001).
(e) D10 to D13 for 1st LSD(from 0000 to 1001).
(f) D14 and D15 for decimal points bits : ’00’ for none, ’01’ for DP1, ’10’ for DP2, ’11’ for DP3.
11
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
2. Frequency Mode
(a) D0(KHz/MHz) : ’1’ for MHz and ’0’ for KHz.
Special data format
Items
Initial state(0000)
Positive Overflow(OL)
Negative Overflow(-OL)
12
D15...D6
Random and don’t care
Random and don’t care
Random and don’t care
D5
1
0
0
D4
1
0
0
D3
1
1
1
D2
1
1
1
D1
1
1
1
D0
1
1
0
LCD Segment Drivers
The ES5108 drives a triplex LCD with three commons. This LCD includes 3 1/2-digits, three decimal, points polarity
sign and annunciators for peakhold, data-hold, continuity, frequency and low battery. The following figure indicates the
assignments of the display segments to the commons and segment drive lines.
12.1
ES5108L
Pin No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
12.2
COM1
CONT
B4
KHz
A3
B3
HOLD
A2
B2
MAX
A1
B1
COM1
–
–
COM2
–
C4
F3
G3
C3
F2
G2
C2
F1
G1
C1
–
COM2
–
COM3
MHz
DP3
E3
D3
DP2
E2
D2
DP1
E1
D1
BAT
–
–
COM3
COM2
–
B4/C4
F3
G3
C3
F2
G2
C2
F1
G1
C1
–
COM2
–
COM3
MHz
DP3
E3
D3
DP2
E2
D2
DP1
E1
D1
BAT
–
–
COM3
ES5108D
Pin No.
3
4
5
6
7
8
9
10
11
12
13
14
15
16
COM1
CONT
MIN
KHz
A3
B3
HOLD
A2
B2
MAX
A1
B1
COM1
–
–
12
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
The LCD waveform is as follows
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õ í î ï í ð ñì ö ÷ â ã ä ç
ò óí ã ô ô ø ñù í
ö ñù í ó ì ò ó í ã é
ú û
ú ü â ý å
ú ü â ý æ
ý þ é ý
è ëë ì í î ï í ð ñì ã é
ú û
ú ü â ý å
ú ü â ý æ
ý þ é ý
The annunciator output is a square wave running at the LCD backplane frequency (ex. 167Hz for ] =40KHz.) The pkpk amplitude is equal to (V+ –DGND.) Connecting an annunciator of the LCD to the ANNUNC pin turns the annunciator
on; connecting it to common turns it off.
13
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
Test Circuit
9 V+
ES5108L
40 V4 OSC3
10K
CREFBZINS 35
32
HOLD
MAX
31
RESET
DP3
DP2
DP1
30
29
28
27
5 OSC2
1nF
6 OSC1
LCD DRIVER
ANNUNC
26
1nF
23
-
PIEZO
BUZZER
BZOUT 34
10
9V
DGND
TEST 3
2 VREF+
+
48
47
0.22uF
41
42
47K
CAZ
1 VREF-
0.1uF
CREF+
1K
CINT
24K
VIN-
46 ANA-COM
VBUFF
0.01uF
43
-
VIN+ 45
INPUT
44
+
0.47uF
1M
ANALOG
LCD DISPLAY
14
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
Application Circuit
0.22uF
48
47
41
47K
42
1 VREF-
9 V+
24 FREQ-IN
DGND
Fin
LCD DRIVER
37 SDO
39 EOC
6 OSC1
470pF
HOLD 32
MAX
31
RESET
DP3
DP2
DP1
30
29
28
27
1nF
36 CLK
5 OSC2
26 ANNUNC
40KHz Crystal
40 V-
23
-
BZINS 35
ES5108L
FREQ/VOLT
(optional)
220pF
BZINM 38
10
+
TEST 3
PIEZO
BUZZER
BZOUT 34
2 VREF+
9V
CREF-
CREF+
1K
CINT
24K
0.1uF
DGND
VBUFF
VIN-
46 ANA-COM
43
0.01uF
CAZ
-
VIN+ 45
INPUT
44
+
0.47uF
1M
ANALOG
(FREQUENCE)
4/8-BIT
uC
(VOLTAGE)OPEN
LCD DISPLAY
15
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
Packaging
1
LQFP 48pin
16
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
48pin ssop
D
He
E
"A"
A2
H
A1
GAUGE PLANE
c
A
ES5108S
b
0.010
e
SEARING PLANE
D
2
L
L1
DETAIL : A
Y
SYMBOLS
MIN.
NOM.
MAX.
A
A1
A2
b
c
D
E
e
0.095
0.008
0.089
0.008
0.620
0.291
0.102
0.012
0.094
0.010
0.008
0.625
0.295
0.110
0.016
0.099
0.013
0.630
0.299
0.396
0.020
0
0.025
0.406
0.030
0.056
-
He
L
L1
Y
0.416
0.040
0.003
8
UNIT : INCH
17
November 23, 2006
ES5108 3 1/2 Digit
ADC with serial output
CYRUSTEK CO.
3
40pin dip
18
November 23, 2006