CYSTEKEC MTP3401N3

Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 1/8
CYStech Electronics Corp.
P-CHANNEL Enhancement Mode MOSFET
MTP3401N3
Features
• VDS=-30V
RDS(ON)[email protected]=-4.5V, IDS=-4A
RDS(ON)[email protected]=-2.5V, IDS=-1A
• Advanced trench process technology
• High density cell design for ultra low on resistance
• Low gate charge
• Compact and low profile SOT-23 package
• Pb-free & Halogen-free package
Equivalent Circuit
Outline
MTP3401N3
SOT-23
D
G:Gate
S:Source
D:Drain
G
S
Absolute Maximum Ratings (Ta=25°C)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current @TA=25°C (Note 1)
Continuous Drain Current @TA=70°C (Note 1)
Pulsed Drain Current
(Note 2)
Maximum Power Dissipation
Linear Derating Factor
Operating Junction and Storage Temperature
Symbol
Limits
Unit
VDS
VGS
ID
ID
IDM
PD
-30
±12
-4.2
-3.5
-30
1.38
0.01
-55~+150
V
V
A
A
A
W
W/°C
°C
Tj, Tstg
Note : 1. Surface mounted on 1 in² copper pad of FR-4 board, 270°C/W when mounted on minimum copper pad.
2. Pulse width limited by maximum junction temperature.
MTP3401N3
CYStek Product Specification
Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 2/8
CYStech Electronics Corp.
Thermal Performance
Parameter
Thermal Resistance, Junction-to-Ambient
Symbol
Rth,ja
Limit
90
Unit
°C/W
Note : Surface mounted on 1 in² copper pad of FR-4 board, 270°C/W when mounted on minimum copper pad.
Electrical Characteristics (Tj=25°C, unless otherwise specified)
Symbol
Static
BVDSS
VGS(th)
IGSS
IDSS
IDSS
*RDS(ON)
Min.
Typ.
Max.
Unit
-30
-0.7
-
11
-1.3
±100
-1
-5
60
65
120
-
V
V
nA
µA
µA
954
115
77
6.3
3.2
38.2
12
9.4
2
3
6
-
20.2
11.2
-2.2
-1.0
-
*GFS
Dynamic
Ciss
Coss
Crss
*td(ON)
*tr
*td(OFF)
*tf
*Qg
*Qgs
*Qgd
Rg
Source-Drain Diode
*ISD
*VSD
*trr
*Qrr
-
Test Conditions
S
VGS=0, ID=-250µA
VDS=VGS, ID=-250µA
VGS=±12V, VDS=0
VDS=-24V, VGS=0
VDS=-24V, VGS=0, Tj=55°C
ID=-4.2A, VGS=-10V
ID=-4.0A, VGS=-4.5V
ID=-1.0A, VGS=-2.5V
VDS=-5V, ID=-5A
pF
VDS=-15V, VGS=0, f=1MHz
ns
VDS=-15V, VGS=-10V, RL=3.6Ω, RG=6Ω
nC
VDS=-15V, ID=-4A,
VGS=-4.5V,
Ω
f=1.0MHz
A
V
ns
nC
VD=VG=0, VS=-1.0V
VGS=0V, ISD=-1.0A
mΩ
IS=-4A, VGS=0V, dI/dt=100A/µs
*Pulse Test : Pulse Width ≤300µs, Duty Cycle≤2%
Ordering Information
Device
MTP3401N3
MTP3401N3
Package
SOT-23
(Pb-free)
Shipping
Marking
3000 pcs / Tape & Reel
3401
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 3/8
Characteristic Curves
MTP3401N3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 4/8
Characteristic Curves(Cont.)
MTP3401N3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 5/8
Characteristic Curves(Cont.)
Power Dissipation---PD(W)
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0
50
100
150
Ambient Temperature --- Ta(℃ )
200
Fig. 12 Power Derating Curve
MTP3401N3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 6/8
Reel Dimension
Carrier Tape Dimension
MTP3401N3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 7/8
Recommended wave soldering condition
Product
Pb-free devices
Peak Temperature
260 +0/-5 °C
Soldering Time
5 +1/-1 seconds
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
Ramp down rate
Time 25 °C to peak temperature
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
10-30 seconds
20-40 seconds
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTP3401N3
CYStek Product Specification
CYStech Electronics Corp.
Spec. No. : C388N3
Issued Date : 2007.06.13
Revised Date :2008.12.17
Page No. : 8/8
SOT-23 Dimension
Marking:
A
L
3
B
TE
3401
S
2
1
3-Lead SOT-23 Plastic
Surface Mounted Package
CYStek Package Code: N3
G
V
Style: Pin 1.Gate 2.Source 3.Drain
C
D
H
K
J
*: Typical
DIM
A
B
C
D
G
H
Inches
Min.
Max.
0.1102 0.1204
0.0472 0.0630
0.0335 0.0512
0.0118 0.0197
0.0669 0.0910
0.0005 0.0040
Millimeters
Min.
Max.
2.80
3.04
1.20
1.60
0.89
1.30
0.30
0.50
1.70
2.30
0.013
0.10
DIM
J
K
L
S
V
Inches
Min.
Max.
0.0034 0.0070
0.0128 0.0266
0.0335 0.0453
0.0830 0.1083
0.0098 0.0256
Millimeters
Min.
Max.
0.085
0.177
0.32
0.67
0.85
1.15
2.10
2.75
0.25
0.65
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead: 42 Alloy ; pure tin plated
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTP3401N3
CYStek Product Specification