DCR2560A85 Phase Control Thyristor Preliminary Information DS5932-1.1 January 2009 (LN 26574) KEY PARAMETERS FEATURES Double Side Cooling High Surge Capability VDRM IT(AV) ITSM dV/dt* dI/dt 8500V 2560A 32500A 1500V/µs 200A/µs * Higher dV/dt selections available APPLICATIONS High Power Drives High Voltage Power Supplies Static Switches VOLTAGE RATINGS Part and Ordering Number DCR2560A85* DCR2560A80 DCR2560A75 DCR2560A70 Repetitive Peak Voltages VDRM and VRRM V 8500 8000 7500 7000 Conditions Tvj = -40°C to 125°C, IDRM = IRRM = 300mA, VDRM, VRRM tp = 10ms, VDSM & VRSM = VDRM & VRRM + 100V respectively Lower voltage grades available. o o *8200V @ -40 C, 8500V @ 0 C Outline type code: A (See Package Details for further information) ORDERING INFORMATION Fig. 1 Package outline When ordering, select the required part number shown in the Voltage Ratings selection table. For example: DCR2560A85 Note: Please use the complete part number when ordering and quote this number in any future correspondence relating to your order. 1/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR CURRENT RATINGS Tcase = 60°C unless stated otherwise Parameter Symbol Test Conditions Max. Units 2555 A Double Side Cooled IT(AV) Mean on-state current IT(RMS) RMS value - 4013 A Continuous (direct) on-state current - 3710 A IT Half wave resistive load SURGE RATINGS Parameter Symbol ITSM 2 It Surge (non-repetitive) on-state current Test Conditions Max. Units 10ms half sine, Tcase = 125°C 32.5 kA VR = 0 5.28 MA s Min. Max. Units 2 I t for fusing 2 THERMAL AND MECHANICAL RATINGS Symbol Rth(j-c) Rth(c-h) Tvj Parameter Thermal resistance – junction to case Thermal resistance – case to heatsink Virtual junction temperature Test Conditions Double side cooled DC - 0.00603 °C/W Single side cooled Anode DC - 0.01024 °C/W Cathode DC - 0.01467 °C/W Clamping force 83.0kN Double side - 0.001 °C/W (with mounting compound) Single side - 0.002 °C/W On-state (conducting) - 135 °C Reverse (blocking) - 125 °C Tstg Storage temperature range -55 125 °C Fm Clamping force 74.0 91.0 kN 2/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR DYNAMIC CHARACTERISTICS Symbol IRRM/IDRM Parameter Test Conditions Min. Max. Units Peak reverse and off-state current At VRRM/VDRM, Tcase = 125°C - 300 mA dV/dt Max. linear rate of rise of off-state voltage To 67% VDRM, Tj = 125°C, gate open - 1500 V/µs dI/dt Rate of rise of on-state current From 67% VDRM to 2x IT(AV) Repetitive 50Hz - 100 A/µs Gate source 30V, 10, Non-repetitive - 200 A/µs tr < 0.5µs, Tj = 125°C VT(TO) rT tgd Threshold voltage – Low level 500 to 1600A at Tcase = 125°C - 0.9 V Threshold voltage – High level 1600 to 4000A at Tcase = 125°C - 1.18 V On-state slope resistance – Low level 500A to 1600A at Tcase = 125°C - 0.65 m On-state slope resistance – High level 1600A to 4000A at Tcase = 125°C - 0.46 m VD = 67% VDRM, gate source 30V, 10 - 3 µs 1000 µs 5150 7950 µC Delay time tr = 0.5µs, Tj = 25°C tq Turn-off time IT = 3000A, Tj = 125°C, VR = 200V, dI/dt = 1A/µs, dVDR/dt = 20V/µs linear QS Stored charge IT = 3000A, Tj = 125°C, dI/dt – 1A/µs, VRpeak ~5100V, VR ~ 3400V IL Latching current Tj = 25°C, VD = 5V - 3 A IH Holding current Tj = 25°C, RG-K = , ITM = 500A, IT = 5A - 300 mA 3/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR GATE TRIGGER CHARACTERISTICS AND RATINGS Symbol Parameter Test Conditions Max. Units VGT Gate trigger voltage VDRM = 5V, Tcase = 25°C 1.5 V VGD Gate non-trigger voltage At VDRM, Tcase = 125°C 0.3 V IGT Gate trigger current VDRM = 5V, Tcase = 25°C 400 mA IGD Gate non-trigger current VDRM = 5V, Tcase = 25°C 20 mA CURVES Instantaneous on-state current I T - (A) 7000 6000 5000 4000 3000 2000 min 125°C max 125°C min 25°C max 25°C 1000 0 1.0 2.0 3.0 4.0 5.0 Instantaneous on-state voltage VT - (V) Fig.2 Maximum & minimum on-state characteristics VTM EQUATION VTM = A + Bln (IT) + C.IT+D.IT Where A = -0.224010 B = 0.1725829 C = 0.000292 D = 0.01039 these values are valid for Tj = 125°C for IT 500A to 4200A 4/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR 130 16 180 120 90 60 30 120 ( oC ) case 12 Maximum case temperature, T Mean power dissipation - (kW) 14 10 8 6 180 120 90 60 30 4 2 110 100 90 80 70 60 50 40 30 20 10 0 0 1000 2000 3000 Mean on-state current, IT(AV) - (A) 0 4000 0 1000 2000 3000 4000 Mean on-state current, IT(AV) - (A) Fig.3 On-state power dissipation – sine wave Fig.4 Maximum permissible case temperature, double side cooled – sine wave 16 180 120 90 60 30 100 75 50 25 14 Mean power dissipation - (kW) Maximum heatsink temperature, T Heatsink - ( ° C) 125 12 10 8 6 d.c. 180 120 90 60 30 4 2 0 0 0 1000 2000 3000 4000 Mean on-state current, IT(AV) - (A) Fig.5 Maximum permissible heatsink temperature, double side cooled – sine wave 0 1000 2000 3000 4000 Mean on-state current, IT(AV) - (A) 5000 Fig.6 On-state power dissipation – rectangular wave 5/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR 125 d.c. 180 120 90 60 30 100 Maximum heatsink temperature T heatsink -(o C) Maximum permissible case temperature , T case -(° C) 125 75 50 25 d.c. 180 120 90 60 30 100 75 50 25 0 0 0 1000 2000 3000 4000 5000 6000 0 Mean on-state current, IT(AV) - (A) Fig.7 Maximum permissible case temperature, double side cooled – rectangular wave Transient Thermal Impedance - Zth (°C/kW) Double side cooled 14 Anode side cooled Anode side cooled Cathode side cooled Cathode side cooled 12 Ri (°C/kW) Ti (s) Ri (°C/kW) Ti (s) Ri (°C/kW) Ti (s) 1 3.01541 2 3 4 1.048955 0.983519 0.983519 0.703874 1.904794 0.059 0.059 3.156003 4.092806 1.556555 1.623962 2.69023 13.79162 0.059 0.205916 7.077369 3.483481 1.745839 2.634274 6.648601 8.436484 1.762119 Z th [ Ri (1 exp(T / Ti )] i 4 10 6000 Fig.8 Maximum permissible heatsink temperature, double side cooled – rectangular wave Double side cooled 16 0.08069 i 1 8 Rth(j-c) Conduction Tables show the increments of thermal resistance Rth(j-c) when the device operates at conduction angles other than d.c. 6 Double side cooling Zth (z) ° sine. rect. 180 0.44 0.31 120 0.49 0.43 90 0.55 0.49 60 0.60 0.55 30 0.64 0.61 15 0.66 0.64 4 2 0 0.001 1000 2000 3000 4000 5000 Mean on-state current, IT(AV) - (A) 0.01 0.1 1 10 Anode Side Cooling Zth (z) ° sine. rect. 180 0.42 0.30 120 0.47 0.41 90 0.52 0.46 60 0.57 0.52 30 0.61 0.58 15 0.62 0.61 Cathode Sided Cooling Zth (z) ° sine. rect. 180 0.42 0.30 120 0.47 0.41 90 0.52 0.46 60 0.57 0.52 30 0.60 0.58 15 0.62 0.60 100 Time (s) Fig.9 Maximum (limit) transient thermal impedance – junction to case (°C/kW) 6/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR 100 10 35 15 10 6 40 4 2 60 Conditions: Tcase= 125°C VR = 0 half-sine wave 20 5 2 0 0 1 10 1 100 0 100 10 Pulse width, tP - (ms) Number of cycles Fig.10 Multi-cycle surge current Fig.11 Single-cycle surge current 800 41000 QSmax = 7950.1*(di/dt)0.4626 700 - (A) 36000 IRRmax = 63.604*(di/dt)0.7474 600 Reverse recovery current, I RR 31000 Stored Charge, Qs - (uC) 8 ITSM 2 20 I2t 80 I t (MA s) Surge current, ITSM- (kA) 25 Surge current, ITSM - (kA) Conditions: Tcase = 125°C VR =0 Pulse width = 10ms 30 26000 21000 QSmin = 5146.8*(di/dt)0.5188 16000 Conditions : O Tj = 125 C, VRpeak ~ 5100V VRM ~ 3400V snubber as appropriate to control reverse voltage 11000 6000 500 400 IRRmin = 51.42*(di/dt)0.7839 300 Conditions: O 200 Tj = 125 C, VRpeak ~ 5100V VRM ~ 3400V snubber as appropriate to control reverse volts 100 1000 0 5 10 15 20 25 30 Rate of decay of on-state current, di/dt - (A/us) 0 0 5 10 15 20 25 30 Rate of decay of on-state current, di/dt - (A/us) Fig.12 Stored charge Fig.13 Reverse recovery current 7/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR 10 9 Pulse Width us 100 200 500 1000 10000 Gate trigger voltage, VGT - (V) 8 7 Pulse Power PGM (Watts) Frequency Hz 50 100 150 150 150 150 150 150 150 100 20 - 400 150 125 100 25 - Upper Limit 6 5 Preferred gate drive area 4 3 2 o 1 Tj = -40oC Tj = 25oC Lower Limit Tj = 125 C 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Gate trigger current IGT, - (A) Fig14 Gate Characteristics 30 Lower Limit Upper Limit 5W 10W 20W 50W 100W 150W -40C Gate trigger voltage, VGT - (V) 25 20 15 10 5 0 0 1 2 3 4 5 6 7 8 9 10 Gate trigger current, IGT - (A) Fig. 15 Gate characteristics 8/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR PACKAGE DETAILS For further package information, please contact Customer Services. All dimensions in mm, unless stated otherwise. DO NOT SCALE. Lead length: 420mm Lead terminal connector: M4 ring Package outline type code: A Fig.16 Package outline 9/10 www.dynexsemi.com DCR2560A85 SEMICONDUCTOR POWER ASSEMBLY CAPABILITY The Power Assembly group was set up to provide a support service for those customers requiring more than the basic semiconductor, and has developed a flexible range of heatsink and clamping systems in line with advances in device voltages and current capability of our semiconductors. We offer an extensive range of air and liquid cooled assemblies covering the full range of circuit designs in general use today. The Assembly group offers high quality engineering support dedicated to designing new units to satisfy the growing needs of our customers. Using the latest CAD methods our team of design and applications engineers aim to provide the Power Assembly Complete Solution (PACs). HEATSINKS The Power Assembly group has its own proprietary range of extruded aluminium heatsinks which have been designed to optimise the performance of Dynex semiconductors. Data with respect to air natural, forced air and liquid cooling (with flow rates) is available on request. For further information on device clamps, heatsinks and assemblies, please contact your nearest sales representative or Customer Services. Stresses above those listed in this data sheet may cause permanent damage to the device. In extreme conditions, as with all semiconductors, this may include potentially hazardous rupture of the package. Appropriate safety precautions should always be followed. http://www.dynexsemi.com e-mail: [email protected] HEADQUARTERS OPERATIONS DYNEX SEMICONDUCTOR LTD Doddington Road, Lincoln Lincolnshire, LN6 3LF. United Kingdom. Tel: +44(0)1522 500500 Fax: +44(0)1522 500550 CUSTOMER SERVICE Tel: +44(0)1522 502753 / 502901. Fax: +44(0)1522 500020 Dynex Semiconductor 2003 TECHNICAL DOCUMENTATION – NOT FOR RESALE. PRODUCED IN UNITED KINGDOM. This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The Company reserves the right to alter without prior notice the specification, design or price of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to the Company’s conditions of sale, which are available on request. All brand names and product names used in this publication are trademarks, registered trademarks or trade names of their respective owners. 10/10 www.dynexsemi.com