Si4946BEY Vishay Siliconix Dual N-Channel 60-V (D-S) 175 °C MOSFET FEATURES PRODUCT SUMMARY VDS (V) RDS(on) (Ω) 60 ID (A) 0.041 at VGS = 10 V 6.5 0.052 at VGS = 4.5 V 5.8 Qg (Typ.) 9.2 nC • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • 175 °C Maximum Junction Temperature • 100 % Rg Tested • Compliant to RoHS directive 2002/95/EC SO-8 S1 1 8 D1 G1 2 7 D1 S2 3 6 D2 G2 4 5 D2 D1 D2 G1 G2 Top View Ordering Information: Si4946BEY-T1-E3 (Lead (Pb)-free) Si4946BEY-T1-GE3 (Lead (Pb)-free and Halogen-free) S1 S2 N-Channel MOSFET N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Symbol Limit Drain-Source Voltage VDS 60 Gate-Source Voltage VGS ± 20 TC = 25 °C Continuous Drain Current (TJ = 150 °C) TC = 70 °C TA = 25 °C 5.5 ID 5.3a, b 4.4a, b IDM Continuous Source Drain Diode Current Avalanche Current Single-Pulse Avalanche Energy TC = 25 °C TA = 25 °C L = 0 1 mH TC = 70 °C TA = 25 °C 3.1 IS 2a, b IAS 12 EAS 7.2 mJ 3.7 2.6 PD W 2.4a, b 1.7a, b TA = 70 °C TJ, Tstg Operating Junction and Storage Temperature Range A 30 TC = 25 °C Maximum Power Dissipation V 6.5 TA = 70 °C Pulsed Drain Current Unit - 55 to 175 °C THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambient a, c Maximum Junction-to-Foot (Drain) Symbol Typical Maximum t ≤ 10 s RthJA 50 62.5 Steady State RthJF 33 41 Unit °C/W Notes: a. Surface Mounted on 1" x 1" FR4 board. b. t = 10 s. c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. d. Maximum under Steady State conditions is 110 °C/W. Document Number: 73411 S09-2434-Rev. C, 16-Nov-09 www.vishay.com 1 Si4946BEY Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Symbol Test Conditions Min. VDS VGS = 0 V, ID = 250 µA 60 Typ. Max. Unit Static Drain-Source Breakdown Voltage VDS Temperature Coefficient ΔVDS/TJ VGS(th) Temperature Coefficient ΔVGS(th)/TJ Gate-Source Threshold Voltage ID = 250 µA VGS(th) VDS = VGS, ID = 250 µA Gate-Source Leakage IGSS VDS = 0 V, VGS = ± 20 V Zero Gate Voltage Drain Current IDSS On-State Drain Currenta ID(on) Drain-Source On-State Resistancea Forward Transconductancea gfs Dynamicb Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg Turn-On Delay Time 1 µA A 0.033 0.041 VGS = 4.5 V, ID = 4.7 A 0.041 0.052 VDS = 15 V, ID = 5.3 A 24 Ω S VDS = 30 V, VGS = 0 V, f = 1 MHz 71 VDS = 30 V, VGS = 10 V, ID = 5.3 A 17 25 9.2 12 pF 3.3 nC 3.7 VDD = 30 V, RL = 6.8 Ω ID ≅ 4.4 A, VGEN = 4.5 V, Rg = 1 Ω 3.1 6.5 9.5 20 30 120 180 20 30 tf 30 45 td(on) 10 15 VDD = 30 V, RL = 6.8 Ω ID ≅ 4.4 A, VGEN = 10 V, Rg = 1 Ω tf Fall Time 30 VGS = 10 V, ID = 5.3 A f = 1 MHz td(off) Turn-Off Delay Time V nA 10 VDS = 30 V, VGS = 5 V, ID = 5.3 A tr Rise Time 3.0 ± 100 44 td(off) Fall Time 2.4 840 tr Turn-Off Delay Time 1.0 VDS = 60 V, VGS = 0 V td(on) Turn-On Delay Time Rise Time mV/°C - 6.7 VDS = 60 V, VGS = 0 V, TJ = 55 °C VDS ≥ 5 V, VGS = 10 V RDS(on) V 53 12 20 25 40 10 15 Ω ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulse Diode Forward Currenta Body Diode Voltage TC = 25 °C IS 3.1 ISM 30 IS = 2 A VSD 0.8 1.2 A V Body Diode Reverse Recovery Time trr 25 50 ns Body Diode Reverse Recovery Charge Qrr 25 50 nC Reverse Recovery Fall Time ta Reverse Recovery Rise Time tb IF = 4.4 A, dI/dt = 100 A/µs, TJ = 25 °C 18 7 ns Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 2 Document Number: 73411 S09-2434-Rev. C, 16-Nov-09 Si4946BEY Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 30 10 VGS = 10 V thru 5 V 8 ID - Drain Current (A) I D - Drain Current (A) 25 20 4V 15 10 6 4 TC = 150 °C 25 °C 2 5 3V 0 0.0 0.5 1.0 1.5 2.0 2.5 - 55 °C 0 0.0 3.0 0.5 VDS - Drain-to-Source Voltage (V) 1.5 2.0 2.5 3.0 3.5 4.0 VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 0.100 1200 1000 0.080 Ciss C - Capacitance (pF) R DS(on) - On-Resistance (mΩ) 1.0 0.060 VGS = 4.5 V 0.040 800 600 400 VGS = 10 V 0.020 200 0.000 Coss Crss 0 0 5 10 15 20 25 30 0 10 ID - Drain Current (A) 20 30 40 50 60 VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current and Gate Voltage Capacitance 2.2 10 8 VDS = 30 V 6 VDS = 48 V 4 1.8 VGS = 10 V (Normalized) R DS(on) - On-Resistance VGS - Gate-to-Source Voltage (V) ID = 5.3 A 2.0 ID = 5.3 A 1.6 1.4 VGS = 4.5 V 1.2 1.0 2 0.8 0 0 4 8 12 Qg - Total Gate Charge (nC) Gate Charge Document Number: 73411 S09-2434-Rev. C, 16-Nov-09 16 20 0.6 - 50 - 25 0 25 50 75 100 125 150 175 TJ - Junction Temperature (°C) On-Resistance vs. Junction Temperature www.vishay.com 3 Si4946BEY Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 0.10 R DS(on) - Drain-to-Source On-Resistance (Ω) I S - Source Current (A) 30 TJ = 175 °C 10 TJ = 25 °C ID = 5.3 A 0.08 TJ = 150 °C 0.06 0.04 TJ = 25 °C 0.02 0.00 1 0 0.2 0.4 0.6 0.8 1.0 1.2 0 1.4 2 4 6 8 10 VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 3.0 25 2.8 20 2.6 ID = 250 µA Power (W) VGS(th) (V) 2.4 2.2 2.0 15 10 1.8 1.6 5 1.4 1.2 - 50 - 25 0 25 50 75 100 125 150 0 0.01 175 0.1 1 10 100 1000 TJ - Temperature (°C) Time (s) Threshold Voltage Single Pulse Power, Junction-to-Ambient 100 I D - Drain Current (A) 10 Limited by RDS(on)* 100 µs 1 ms 1 10 ms 100 ms 0.1 0.01 0.01 TA = 25 °C Single Pulse 0.1 1 1s 10 s DC 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum V GS at which R DS(on) is specified Safe Operating Area, Junction-to-Ambient www.vishay.com 4 Document Number: 73411 S09-2434-Rev. C, 16-Nov-09 Si4946BEY Vishay Siliconix 8 4.0 7 3.5 6 3.0 5 2.5 Power (W) I D - Drain Current (A) TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 4 2.0 3 1.5 2 1.0 1 0.5 0.0 0 0 25 50 75 100 125 150 25 175 50 75 100 125 150 175 TC - Case Temperature (°C) TC - Case Temperature (°C) Current Derating* Power, Junction-to-Case I C - Peak Avalanche Current (A) 100 10 TA = L · ID BV - V DD 1 0.000001 0.00001 0.0001 0.001 TA - Time In Avalanche (s) Single Pulse Avalanche Capability * The power dissipation PD is based on TJ(max) = 175 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. Document Number: 73411 S09-2434-Rev. C, 16-Nov-09 www.vishay.com 5 Si4946BEY Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 2 Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 Notes: 0.1 PDM 0.1 0.05 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 85 °C/W 0.02 3. T JM - TA = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10-4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) 10 100 600 Normalized Thermal Transient Impedance, Junction-to-Ambient 2 Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.05 Single Pulse 0.02 0.01 10-4 10-3 10-2 10-1 1 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Case Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?73411. www.vishay.com 6 Document Number: 73411 S09-2434-Rev. C, 16-Nov-09 Package Information Vishay Siliconix SOIC (NARROW): 8-LEAD JEDEC Part Number: MS-012 8 6 7 5 E 1 3 2 H 4 S h x 45 D C 0.25 mm (Gage Plane) A e B All Leads q A1 L 0.004" MILLIMETERS INCHES DIM Min Max Min Max A 1.35 1.75 0.053 0.069 A1 0.10 0.20 0.004 0.008 B 0.35 0.51 0.014 0.020 C 0.19 0.25 0.0075 0.010 D 4.80 5.00 0.189 0.196 E 3.80 4.00 0.150 e 0.101 mm 1.27 BSC 0.157 0.050 BSC H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.50 0.93 0.020 0.037 q 0° 8° 0° 8° S 0.44 0.64 0.018 0.026 ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498 Document Number: 71192 11-Sep-06 www.vishay.com 1 VISHAY SILICONIX TrenchFET® Power MOSFETs Application Note 808 Mounting LITTLE FOOT®, SO-8 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. 0.288 7.3 0.050 1.27 0.196 5.0 0.027 0.69 0.078 1.98 0.2 5.07 Figure 1. Single MOSFET SO-8 Pad Pattern With Copper Spreading Document Number: 70740 Revision: 18-Jun-07 0.050 1.27 0.088 2.25 0.088 2.25 0.027 0.69 0.078 1.98 0.2 5.07 Figure 2. Dual MOSFET SO-8 Pad Pattern With Copper Spreading The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. www.vishay.com 1 APPLICATION NOTE In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. 0.288 7.3 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-8 0.172 (4.369) 0.028 0.022 0.050 (0.559) (1.270) 0.152 (3.861) 0.047 (1.194) 0.246 (6.248) (0.711) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index APPLICATION NOTE Return to Index www.vishay.com 22 Document Number: 72606 Revision: 21-Jan-08 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1