EMP Protection Units PCM Data Lines to 2 MBit/s Series/Type: B84320Z0010H034 Date: January 2004 EPCOS AG 2004. Reproduction, publication and dissemination of this data sheet, enclosures hereto and the information contained therein without EPCOS' prior express consent is prohibited. Purchase orders are subject to the General Conditions for the Supply of Products and Services of the Electrical and Electronics Industry recommended by the ZVEI (German Electrical and Electronic Manufacturers' Association), unless otherwise agreed. EMP protection units B84320Z0010H034 PCM data lines to 2 MBit/s General The EMP protection unit is sequenced, i.e. to use simultaneously the benefits of inert-gas-filled surge arresters (extremely high surge capability) and of varistors (fast response). They are isolated by a series inductor. The arrester is housed in a plug-in socket, so it can be removed and tested without detaching the lines. Note on voltage figures: The maximum voltage on the filter output depends primarily on the rise time until the arrester responds. For this reason the maximum voltage on the filter output is stated in the following table as a function of the rising edge dv/dt of the pulse. Technical data Rated voltage VR 10 V Rated frequency fR 0 ... 2 Mbit/s Pass bandwidth at Z L Rated current IR 100 mA Number of lines 10 Pairs Line impedance ZL 124 Ω Maximum DC resistance Rmax <2.2 Ω Permissible ambient temperature TA 25/+40 °C Climatic category (EN 60068-1) 25/085/56 Approx. weight Nominal DC spark-over voltage Per line 25 °C/+85 °C/56 days damp heat test 300 <800 g V Nominal surge current (8/20 µs) 5 10 kA kA Suppression condition I < IR VsdcN Referred to +40 °C ambient temperature Line/line Pair/case Maximum voltage on filter output: At rising edge dv/dt = 0.1 kV/µs Unsymmetrical ≤60 V Symmetrical ≤8 V dv/dt = 1 kV/µs ≤90 V ≤15 V dv/dt = 1 kV/ns1) ≤70 V ≤40 V 1) Typical test pulse: rise time 10 ns, time to half value 1500 ns, charge voltage min. 50 kV, source impedance 90 Ω 2 EMP protection units B84320Z0010H034 PCM data lines to 2 MBit/s Circuit diagram (only one of 10 pairs shown) Insertion loss αe per pair (typical values at Z = 50 Ω) Asymmetrical measurement circuit to MIL-STD-220A 3 EMP protection units B84320Z0010H034 PCM data lines to 2 MBit/s Dimensional drawing Side view Terminal strip: Terminals with cage strain system, suitable for conductors 0.08 ... 2.5 mm2 Front view of protected end Installation section and attachment 4