SN55182-SP www.ti.com .............................................................................................................................................................................................. SLLS874 – OCTOBER 2007 RAD-TOLERANT CLASS V, DUAL DIFFERENTIAL LINE RECEIVER FEATURES 1 • • • • • • • • • • • • • Single 5-V Supply Differential Line Operation Dual Channels TTL Compatibility ±15-V Common-Mode Input Voltage Range ±15-V Differential Input Voltage Range Individual Channel Strobes Built-In Optional Line-Termination Resistor Individual Frequency Response Controls Designed for Use With Dual Differential Drivers SN55183 and SN75183 Designed to Be Interchangeable With National Semiconductor DS7820A and DS8820A Rad-Tolerant: >40 kRad (Si) ELDRS QML-V Qualified, SMD 5962-79008 DESCRIPTION/ORDERING INFORMATION The SN55182 dual differential line receiver is designed to sense small differential signals in the presence of large common-mode noise. This device gives TTL-compatible output signals as a function of the polarity of the differential input voltage. The frequency response of each channel can be easily controlled by a single external capacitor to provide immunity to differential noise spikes. The output goes to a high level when the inputs are open circuited. A strobe input (STRB) is provided that, when in the low level, disables the receiver and forces the output to a high level. The receiver is of monolithic single-chip construction, and both halves of the dual circuits use common power-supply and ground terminals. The SN55182 is characterized for operation over the full military temperature range of –55°C to 125°C. PACKAGING/ORDERING INFORMATION (1) PACKAGED DEVICES (1) (2) TEMPERATURE CERAMIC FLATPACK W (14) (2) SYMBOL –55°C to 125°C 5962-7900801VDA 5962-7900801VDA For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007, Texas Instruments Incorporated SN55182-SP SLLS874 – OCTOBER 2007 .............................................................................................................................................................................................. www.ti.com FUNCTION TABLE (1) INPUTS (1) OUTPUT OUT STRB VID L X H H H H H L L H = VI ≥ VIH min or VID more positive than VTH max L = VI ≤ VIL max or VID more negative than VTL max X = irrelevant LOGIC SYMBOL 3 1IN+ & 1 1IN− 2 1RT RT 6 1OUT 4 1STRB 5 1RTC RESP 11 2IN+ 13 2IN− 8 12 2RT 2OUT 10 2STRB 9 2RTC This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the J, N, and W packages. LOGIC DIAGRAM (POSITIVE LOGIC) 1IN+ 1IN− 1RT 1RTC 1STRB 2IN+ 2IN− 2RT 2RTC 2STRB 3 6 1 1OUT 2 5 4 11 8 13 2OUT 12 9 10 Pin numbers shown are for the J, N, and W packages. 2 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP SN55182-SP www.ti.com .............................................................................................................................................................................................. SLLS874 – OCTOBER 2007 SCHEMATIC (EACH RECEIVER) RTC 5, 9 14 VCC 167 Ω 5 kΩ 3 kΩ 1.5 kΩ 4.15 kΩ 5 kΩ 320 Ω 6, 8 1.5 kΩ 3, 11 IN+ 170 Ω RT ÁÁ ÁÁ ÁÁ IN− OUT 5 kΩ 1 kΩ 2, 12 1 kΩ 750 Ω 1 kΩ 167 Ω 7 GND 167 Ω 1, 13 4, 10 5 kΩ STRB Resistor values shown are nominal. Pin numbers shown are for the J, N, and W packages. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) UNIT VCC Supply voltage (2) VIC Common-mode input voltage ±20 V VID Differential input voltage (3) ±20 V VI(STRB) Strobe input voltage IO Output sink current 8V 8V 50 mA Continuous total power dissipation Tstg See Dissipation Rating Table Storage temperature range –65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or W package (1) (2) (3) 300°C The absolute maximum ratings under any condition are limited by the constraints of the silicon process. Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. All voltage values, except differential voltages, are with respect to network ground terminal. Differential voltage values are at the noninverting terminal with respect to the inverting terminal. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP 3 SN55182-SP SLLS874 – OCTOBER 2007 .............................................................................................................................................................................................. www.ti.com DISSIPATION RATING TABLE (1) PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 125°C POWER RATING W (1) 1000 mW 8.0 mW/°C 640 mW 200 mW In the FK, J, and W packages, SN55182 chips are alloy mounted. RECOMMENDED OPERATING CONDITIONS VCC Supply voltage VIC Common-mode input voltage VIH(STRB) High-level strobe input voltage VIL(STRB) Low-level strobe input voltage IOH High-level output current IOL Low-level output current TA Operating free-air temperature 4 MIN NOM MAX 4.5 5 5.5 V ±15 V 2.1 5.5 V 0 0.9 V –400 µA 16 mA 125 °C –55 Submit Documentation Feedback UNIT Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP SN55182-SP www.ti.com .............................................................................................................................................................................................. SLLS874 – OCTOBER 2007 ELECTRICAL CHARACTERISTICS over recommended ranges of VCC, VIC, and operating free-air temperature (unless otherwise noted) TEST CONDITIONS (1) PARAMETER MIN VIT+ Positive-going input threshold voltage VO = 2.5 V, IOH = –400 µA VIC = –3 V to 3 V VIT– Negative-going input threshold voltage VO = 0.4 V, IOL = 16 mA VIC = –3 V to 3 V VOH High-level output voltage VOL Low-level output voltage VIC = –15 V to 15 V 1 –0.5 VIC = –15 V to 15 V –1 VID = 1 V, V(STRB) = 2.1 V, IOH = –400 µA 2.5 4.2 5.5 VID = 1 V, V(STRB) = 0.4 V, IOH = –400 µA 2.5 4.2 5.5 0.25 0.4 3 4.2 VIC = 15 V II VIC = 0 Input current Noninverting input V V V 0 –0.5 –4.2 VIC = 15 V 5 7 VIC = 0 –1 –1.4 VIC = –15 V –7 –9.8 5 µA –1 –1.4 mA V(STRB) = 5.5 V IIL(STRB) Low-level strobe input current V(STRB) = 0 rI Input resistance (1) (2) V –3 High-level strobe input current ICC UNIT VIC = –15 V IIH(STRB) IOS MAX 0.5 VID = –1 V, V(STRB) = 2.1 V, IOL = 16 mA Inverting input TYP (2) mA Inverting input 3.6 5 Noninverting input 1.8 2.5 120 170 250 Ω –2.8 mA kΩ Line-terminating resistance TA = 25°C Short-circuit output current VCC = 5.5 V, VO = 0 –4.5 -6.7 VIC = 15 V, VID = –1 V 4.2 6 VIC = 0, VID = –0.5 V 6.8 10.2 VIC = –15 V, VID = –1 V 9.4 14 TYP MAX Supply current (average per receiver) mA Unless otherwise noted, V(STRB) ≥ 2.1 V or open. All typical values are at VCC = 5 V, VIC = 0, and TA = 25°C. SWITCHING CHARACTERISTICS VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS MIN UNIT tPLH(D) Propagation delay time, low- to high-level output from differential input RL = 400 Ω, CL = 15 pF, See Figure 1 18 40 ns tPHL(D) Propagation delay time, high- to low-level output from differential input RL = 400 Ω, CL = 15 pF, See Figure 1 31 45 ns tPLH(S) Propagation delay time, low- to high-level output from STRB input RL = 400 Ω, CL = 15 pF, See Figure 1 9 30 ns tPHL(S) Propagation delay time, high- to low-level output from STRB input RL = 400 Ω, CL = 15 pF, See Figure 1 15 25 ns Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP 5 SN55182-SP SLLS874 – OCTOBER 2007 .............................................................................................................................................................................................. www.ti.com PARAMETER MEASUREMENT INFORMATION Output Input VCC = 5 V Pulse Generator No. 1 (see Note A) 400 Ω See Note C 50 Ω CL = 15 pF (see Note B) Pulse Generator No. 2 (see Note A) 50 Ω Strobe Input TEST CIRCUIT tw 2.5 V Input 0V 0V 0V 0V −2.5 V tw >100 ns >100 ns >100 ns >100 ns 2.6 V STRB 1.3 V 1.3 V 1.3 V 1.3 V 0V tPHL(D) tPLH(D) tPHL(S) tPLH(S) VOH Output 1.3 V 1.3 V 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS A. The pulse generators have the following characteristics: ZO = 50 Ω, tr ≤ 10 ns, tf ≤ 10 ns, tw = 0.5 ±0.1 µs, PRR ≤ 1 MHz. B. CL includes probe and jig capacitance. C. All diodes are 1N3064 or equivalent. Figure 1. Test Circuit and Voltage Waveforms 6 Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP SN55182-SP www.ti.com .............................................................................................................................................................................................. SLLS874 – OCTOBER 2007 TYPICAL CHARACTERISTICS (1) DIFFERENTIAL INPUT THRESHOLD VOLTAGE vs SUPPLY VOLTAGE DIFFERENTIAL INPUT THRESHOLD VOLTAGE vs COMMON-MODE INPUT VOLTAGE 0.5 VIC = 0 TA = 25°C VVID ID − Differential Input Threshold Voltage − V VVID ID − Differential Input Threshold Voltage − V 0.3 0.2 0.1 VO = 2.5 V, IO = −400 µA 0 −0.1 VO = 0.4 V, IO = 16 mA −0.2 −0.3 4.5 5 5.5 VCC − Supply Voltage − V 6 0.4 VCC = 5 V TA = 25°C 0.3 0.2 VO = 2.5 V, IO = −400 µA 0.1 0 VO = 0.4 V, IO = 16 mA −0.1 −0.2 −0.3 −0.4 −0.5 −20 −15 −10 −5 0 10 5 15 VIC − Common-Mode Input Voltage − V Figure 2. 20 Figure 3. DIFFERENTIAL INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE V VID ID − Differential Input Threshold Voltage − V 100 VO = 2.5 V, IO = −400 µA 50 0 −50 VO = 0.4 V, IO = 16 mA −100 −150 VCC = 5 V VIC = 0 −200 −75 −50 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 Figure 4. (1) Operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP 7 SN55182-SP SLLS874 – OCTOBER 2007 .............................................................................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (1) OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE VOLTAGE TRANSFER CHARACTERISTICS 5 VCC = 5 V VIC = 0 5 5V VCC = 5 V V VO O − Output Voltage − V 4 4 V VO O − Output Voltage − V TA = 25°C VID = 0.5 V, IO = −400 µA 3 2 From Output Under Test 10 kΩ 400 Ω 4 Each 1N3064 3 TA = −55°C TA = 125°C 2 1 1 0 −0.5 −0.4 −0.3 −0.2 −0.1 0 VID = −0.5 V, IOL = 16 mA 0 −75 −50 −25 0 25 50 75 100 0.1 0.2 0.3 0.4 0.5 VID − Differential Input Voltage − V 125 TA − Free-Air Temperature − °C Figure 5. Figure 6. TERMINATING RESISTANCE vs FREE-AIR TEMPERATURE INPUT CURRENT vs INPUT VOLTAGE 200 10 8 VCC = 5 V VID = 0 to ±20 V TA = 25°C Terminating Resistance − Ω IIII − Input Current − mA 6 4 2 IN− 0 −2 −4 IN+ 190 180 170 160 −6 −8 −10 −20 −15 −10 0 10 −5 5 VI − Input Voltage − V 15 20 150 −75 −50 Figure 7. (1) 8 −25 0 25 50 75 100 TA − Free-Air Temperature − °C 125 Figure 8. Operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP SN55182-SP www.ti.com .............................................................................................................................................................................................. SLLS874 – OCTOBER 2007 TYPICAL CHARACTERISTICS (1) POWER DISSIPATION (AVERAGE PER RECEIVER) vs COMMON-MODE INPUT VOLTAGE SUPPLY CURRENT (AVERAGE PER RECEIVER) vs COMMON-MODE INPUT VOLTAGE 300 12 VCC = 5 V VID = −1 V 250 PD P D − Power Dissipation − mW IICC CC − Supply Current − mA 10 VID = −1 V 8 6 VID = 1 V 4 200 150 TA = 25°C 100 VCC = 5 V No Load TA = 25°C 2 0 −20 −15 Max Rated PD at TA = 125°C (W Package ) 50 TA = 125°C −10 −5 0 5 10 15 0 −20 20 −15 −10 −5 0 5 10 15 20 VIC − Common-Mode Input Voltage − V VIC − Common-Mode Input Voltage − V Figure 9. Figure 10. MAXIMUM NOISE PULSE DURATION vs MAXIMUM RESPONSE TIME-CONTROL CAPACITANCE ttw w − Maximum Noise Pulse Duration − ns 1000 VCC = 5 V TA = 25°C See Note A 700 400 200 2.5 V 0V 100 − 2.5 V 70 tw 40 INPUT PULSE 20 10 10 40 100 400 1000 4000 10000 Response Time Control Capacitance − pF A. Figure 11 shows the maximum duration of the illustrated pulse that can be applied differently without the output changing from the low to high level. Figure 11. (1) Operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP 9 SN55182-SP SLLS874 – OCTOBER 2007 .............................................................................................................................................................................................. www.ti.com (1) 10 PROPAGATION DELAY TIME FROM DIFFERENTIAL INPUT vs FREE-AIR TEMPERATURE 38 36 VCC = 5 V See Figure 1 34 tPHL(D) 32 30 28 26 24 22 20 tPLH(D) 18 16 14 −75 −50 −25 0 25 50 75 100 125 t P(S) − Propagation Delay Time From Strobe Input − ns t P(D) − Propagation Delay Time From Differential Input − ns TYPICAL CHARACTERISTICS (1) PROPAGATION DELAY TIME FROM STROBE INPUT vs FREE-AIR TEMPERATURE 20 18 VCC = 5 V See Figure 1 tPHL(S) 16 14 12 tPLH(S) 10 8 6 4 −75 −50 −25 0 25 50 75 TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C Figure 12. Figure 13. 100 125 Operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP SN55182-SP www.ti.com .............................................................................................................................................................................................. SLLS874 – OCTOBER 2007 APPLICATION INFORMATION VCC = 5 V VCC = 5 V 1/2 ’183 Inputs 1/2 ’182 A B C D Z IN− 0.002 µF (see Note A) OUT RT RTC Y 100 pF (see Note B) IN+ Twisted Pair STRB GND GND NOTES: A. When the inputs are open circuited, the output is high. A capacitor may be used for dc isolation of the line-terminating resistor. At the frequency of operation, the impedance of the capacitor should be relatively small. Example: let f = 5 MHz C = 0.002 µF 1 1 Z(C) + + 2pfC 2pǒ5 106Ǔǒ0.002 Z(C) [ 16W 10*6Ǔ B. Use of a capacitor to control response time is optional. Figure 14. Transmission of Digital Data Over Twisted-Pair Line Submit Documentation Feedback Copyright © 2007, Texas Instruments Incorporated Product Folder Link(s): SN55182-SP 11 PACKAGE OPTION ADDENDUM www.ti.com 3-Mar-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type 5962-7900801VCA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type 5962-7900801VDA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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