TI TPD5E003DPFR

TPD5E003
www.ti.com
SLVSBQ6A – DECEMBER 2012 – REVISED JANUARY 2013
Five Channel Space Saving ESD Protection Device
Check for Samples: TPD5E003
FEATURES
APPLICATIONS
•
•
•
•
•
1
•
•
•
•
•
•
•
•
Provides System Level ESD Protection for
Low-Voltage IO Interface
IEC 61000-4-2 Level 4
– ±15kV (Contact discharge)
– ±15kV (Air-gap discharge)
Typical IO Capacitance 7pF (VIO = 2.5V)
DC Breakdown Voltage 6V (Min)
Low Leakage Current 100nA (Max)
Low ESD Clamping Voltage
Industrial Temperature Range: –40°C to 125°C
IEC 61000-4-5 (Surge): 40 W (8/20 µs Pulse)
Small, Easy-to-Route DPF Package
SIM Card
Side Keys
Audio Interface
Memory Card
DPF
1
6
2
5
3
4
1 mm x 1 mm x 0.4mm
(0.35-mm pitch)
DESCRIPTION
The TPD5E003 is a five channel ESD protection device. It offers ±15KV IEC contact and ±15KV air-gap ESD
protection. It features five identical ESD clamping diodes that could be used for either five unidirectional (0V to
5V) I/O lines or four bidirectional (-5V to 5V) I/O lines. The lower IO capacitance is suitable for a wide range of
applications. Typical application areas include audio lines (mic, earphone, and speakerphone), SD interface, and
keypad, or other buttons.
ORDERING INFORMATION
TA
–40°C to 125°C
(1)
(2)
PACKAGE
5000
(1) (2)
Tape and reel
ORDERABLE PART NUMBER
TOP-SIDE MARKING
TPD5E003DPFR
9Q
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012–2013, Texas Instruments Incorporated
TPD5E003
SLVSBQ6A – DECEMBER 2012 – REVISED JANUARY 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
APPLICATION/FUNCTIONAL BLOCK DIAGRAM
PIN FUNCTIONS
PIN NAME
DPF
PIN TYPE
I/O
1, 3, 4, 5, 6
I/O
GND
2
GND
DESCRIPTION
ESD Protected channel
Ground
ABSOLUTE MAXIMUM RATINGS
MIN
MAX
5.5
V
Operating temperature range
-40
125
°C
Storage temperature
-55
150
°C
IEC 61000-4-2 contact ESD
±15
kV
IEC 61000-4-2 air-gap ESD
±15
kV
IO voltage tolerance
UNIT
IPP, peak pulse current (tp = 8/20μs)
3
A
PPP, peak pulse power (tp = 8/20μs)
40
W
ELECTRICAL CHARACTERISTICS
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
VRWM
Reverse stand-off voltage
II = 0.1 µA
5.0
V
ILEAK
Leakage Current
Pin 1, 3, 4, 5, or 6 = 5V, Pin 2 = 0V
10
100
nA
VClamp
Clamp voltage with ESD strike
IPP = 6A, TLP, Dx pin to GND, TA = 25 °C
13
15.6
V
RDYN
Dynamic resistance
CIO
IO capacitance
VBR
Break-down voltage
2
IPP = 10 A, TLP, Dx pin to GND, TA = 25 °C
16.3
19.5
V
ITLP = 6A to 10 A, Dx pin to GND, TA = 25
°C
0.8
1
Ω
ITLP = 6A to 10 A, GND to Dx pin, TA = 25
°C
0.3
0.4
Ω
5.6
7
8.4
pF
8
10
12
pF
6.0
7
8.5
V
VIO = 2.5V, 1 MHz, TA = 25 °C
VIO = 0V, 1 MHz, TA = 25 °C
IIO = 1 mA
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Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: TPD5E003
TPD5E003
www.ti.com
SLVSBQ6A – DECEMBER 2012 – REVISED JANUARY 2013
APPLICATION INFORMATION
D1
D3
1
D1
6
D4
2
D2
3
1
6
No Connect
5
5
D2
5-Channel Configuration
N
2
D5
4
D3
3
D4
4
4-Channel Configuration
Figure 1. Application Diagram
The TPD5E003 offers 5 identical unidirectional ESD protection channels. To use all 5 channels, the
recommended configuration is shown in Figure 1. The TPD5E003 can also be used as 4 identical bidirectional
ESD protection channels. To do so, pin 5 would be connected to ground, with pin 1, 3, 4, and 6 connected to the
I/O to be protected. In the bidirectional configuration, IO capacitance is reduced by half and the breakdown
voltage is doubled.
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Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: TPD5E003
3
TPD5E003
SLVSBQ6A – DECEMBER 2012 – REVISED JANUARY 2013
www.ti.com
TYPICAL CHARACTERISTICS
4.0
Current (A)
Capacitance (pF)
16
12
8
4
45
Current
Power
40
3.5
35
3.0
30
2.5
25
2.0
20
1.5
15
1.0
10
0.5
5
0
0.0
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
±5
5.0
VBIAS (V)
Power (W)
4.5
20
0
5
10
15
20
25
30
35
40
45
50
Time ( s)
C002
C001
Figure 2. Capacitance vs DC Bias Voltage
24
450
Current
Power
21
Figure 3. Surge Plot (tp = 8/20μs), Pin Dx to GND
30
400
20
350
18
12
200
9
150
6
100
3
50
10
Current(A)
250
Power (W)
Current (A)
300
15
0
±10
±20
0
0
0
±5
5
10
15
20
25
30
35
40
45
±30
50
Time ( s)
±15
C003
±10
±5
0
5
10
15
20
Voltage (V)
Figure 4. Surge Plot (tp = 8/20μs), Pin GND to Dx
30
35
C004
Figure 5. 30 Amps TLP Plot
1.0
70
0.8
60
0.6
50
Amplitude (V)
0.4
Current (mA)
25
0.2
0.0
±0.2
±0.4
40
30
20
10
±0.6
0
±0.8
±1.0
±10
±2
±1
0
1
2
3
4
5
6
Voltage (V)
8
±15 0
15 30 45 60 75 90 105 120 135 150 165 180
Time (ns)
C005
Figure 6. DC SWEEP V-I Curve
4
7
C006
Figure 7. IEC 61000-4-2 Clamping Voltage, +8kV Contact
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Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: TPD5E003
TPD5E003
www.ti.com
SLVSBQ6A – DECEMBER 2012 – REVISED JANUARY 2013
TYPICAL CHARACTERISTICS (continued)
10
0
Amplitude (V)
±10
±20
±30
±40
±50
±60
±70
±15 0
15 30 45 60 75 90 105 120 135 150 165 180
Time (ns)
C007
Figure 8. IEC 61000-4-2 Clamping Voltage, –8kV Contact
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Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: TPD5E003
5
TPD5E003
SLVSBQ6A – DECEMBER 2012 – REVISED JANUARY 2013
www.ti.com
REVISION HISTORY
Changes from Original (December 2012) to Revision A
Page
•
Added IO voltage tolerance to the ABSOLUTE MAXIMUM RATINGS table. ...................................................................... 2
•
Added MAX values to parameters in the ELECTRICAL CHARACTERISTICS table. .......................................................... 2
6
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Copyright © 2012–2013, Texas Instruments Incorporated
Product Folder Links: TPD5E003
PACKAGE OPTION ADDENDUM
www.ti.com
7-Jan-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
TPD5E003DPFR
ACTIVE
Package Type Package Pins Package Qty
Drawing
X2SON
DPF
6
5000
Eco Plan
Lead/Ball Finish
(2)
Green (RoHS
& no Sb/Br)
CU NIPDAU
MSL Peak Temp
Samples
(3)
(Requires Login)
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPD5E003DPFR
Package Package Pins
Type Drawing
X2SON
DPF
6
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
5000
180.0
9.5
Pack Materials-Page 1
1.16
B0
(mm)
K0
(mm)
P1
(mm)
1.16
0.63
4.0
W
Pin1
(mm) Quadrant
8.0
Q2
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Jan-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPD5E003DPFR
X2SON
DPF
6
5000
180.0
180.0
30.0
Pack Materials-Page 2
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