EXAR SP6125EK1-L/TR

SP6125
High-Voltage, Step Down Controller in TSOT6
FEATURES
Wide 4.5V – 29V Input Voltage Range
Internal Compensation
Built-in High Current PMOS Driver
Adjustable Overcurrent Protection
Internal soft-start
300kHz Constant Frequency Operation
0.6V Reference Voltage
1% output setpoint accuracy
Lead Free, RoHS Compliant Package:
Small 6 pin TSOT
LX
GND
FB
6
5
4
SP6125
6 PinTSOT
1
2
VIN
3
VDR
GATE
DESCRIPTION
The SP6125 is a PWM controlled step down (buck) voltage mode regulator with VIN feedforward and
internal Type-II compensation. It operates from 4.5V to 29V, making is suitable for 5V, 12V, and 24V
applications. By using a PMOS driver, this device is capable of operating at 100% duty cycle. The
high side driver is designed to drive the gate 5V below VIN. The programmable overcurrent
protection is based on high-side MOSFET’s ON resistance sensing and allows setting the
overcurrent protection value up to 300mV threshold (measured from VIN-LX). The SP6125 is
available in a space-saving 6-pin TSOT package making it the smallest controller available capable
of operating from 24VDC supplies.
TYPICAL APPLICATION CIRCUIT
VIN
1
C1
4.7uF
Q1
FDS4685
2
Gate
C2
4.7uF
GND
Vin
L1, IHLP-2525CZ
8.2uH, 68mOhm, 4A
Rs 2k
VOUT
LX
C6
0.1uF
24V
6
SP6125
Ds
MBRA340T3G
3
RZ
2K
VDR
C4
22uF
R1
300k, 1%
CZ
47pF
4
C5
22uF
3.3V
0-3A
GND
VFB
GND
R2
66.5k, 1%
5
D1 1N4148
SHDN
High=Of f
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ABSOLUTE MAXIMUM RATINGS
Input Voltage……................................................-0.3V to 30V
Lx………………………………………..………….…-2V to 30V
FB……………....................................................-0.3V to 5.5V
Storage Temperature..……..…………...……-65 °C to 150 °C
Junction Temperature.....................................-40°C to 125°C
Lead Temperature (Soldering, 1…0 sec)….…………..300 °C
ESD Rating……….…….…1kV LX, 2kV all other nodes, HBM
These are stress ratings only, and functional
operation of the device at these ratings or any other
above those indicated in the operation sections of the
specifications below is not implied. Exposure to
absolute maximum rating conditions for extended
periods of time may affect reliability.
ELECTRICAL SPECIFICATIONS
Specifications are for TAMB=TJ=25°C, and those denoted by ♦ apply over the full operating range, -40°C< Tj <125°C. Unless
otherwise specified: VIN =4.5V to 29V, CIN = 4.7µF.
PARAMETER
♦
MIN
TYP
MAX
UNITS
UVLO Turn-On Threshold
4.2
4.35
4.5
V
0°C< Tj <125°C
UVLO Turn-Off Threshold
4.0
4.2
4.4
V
0°C< Tj <125°C
UVLO Hysterisis
Operating Input Voltage
Range
Operating Input Voltage
Range
Operating VCC Current
Reference Voltage Accuracy
0.2
V
4.5
29
V
7
29
V
0.3
0.5
3
1
mA
%
0.5
2
%
0.6
0.606
V
Reference Voltage Accuracy
Reference Voltage
0.594
Reference Voltage
0.588
0.6
0.612
V
255
300
VIN/5
345
kHz
V
40
100
ns
0
%
%
50
60
kΩ
4
8
Ω
3
6
Ω
5.5
V
Switching Frequency
Peak-to-peak ramp Modulator
Minimum ON-Pulse Duration
Minimum Duty Cycle
Maximum Duty Cycle
Gate Driver Turn-Off
Resistance
Gate Driver Pull-Down
Resistance
Gate Driver Pull-up
Resistance
CONDITIONS
100
0°C< Tj <125°C
♦
VFB=1.2V
♦
♦
♦
Internal resistor between GATE and
VIN
VIN=12V, VFB=0.5V, Measure
resistance between GATE and VDR
VIN=12V, VFB=0.7V, Measure
resistance between GATE and VIN
♦
VIN - VDR voltage difference
4.5
Overcurrent Threshold
270
300
330
mV
Measure VIN - LX
LX pin Input Current
OFF interval during hiccup
25
30
200
35
uA
ms
VLX = VIN
Soft start time
3
5
9
ms
1.0
1.1
SHDN Threshold
SHDN Threshold Hysteresis
Jan28-08 RevG
0.9
100
V
Measure VIN – VDR, VIN>7V
VFB=0.58V, measure between
VIN=4.5V and first GATE pulse
♦
Apply voltage to FB
mV
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PIN DESCRIPTION
PIN #
PIN
NAME
1
VIN
2
GATE
3
VDR
4
FB
5
GND
6
LX
DESCRIPTION
Input power supply for the controller. Place input decoupling capacitor as close
as possible to this pin.
Connect to the gate terminal of the external P-channel MOSFET.
Power supply for the internal driver. This voltage is internally regulated to
about 5V below VIN. Place a 0.1uF decoupling capacitor between VDR and
Vin as close as possible to the IC.
Regulator feedback input. Connect to a resistive voltage-divider network to set
the output voltage. This pin can be also used for ON/OFF control. If this pin is
pulled above 1V the P-channel driver is disabled and controller resets internal
soft start circuit.
Ground pin.
This pin is used as a current limit input for the internal current limit comparator.
Connect to the drain pin of the external MOSFET through an optional resistor.
Internal threshold is pre-set to 300mV nominal and can be decreased by
changing the external resistor based on the following formula: VTRSHLD =
300mV – 30uA * R
BLOCK DIAGRAM
VIN
5V
VDR
Oscillator
Vin - 5V LDO
VIN
5V Internal LDO
I = k x VIN
FAULT
PWM Latch
Reset Dominant
VREF
GATE
S
+
FB
R
+
-
PWM Comparator
Error Amplifier
VDR
FAULT
FAULT
ENBL
LX
-
200ms delay
+
-
1V
Jan28-08 RevG
FAULT
Register
S
R
R
+
UVLO
4-Bit counter
Overcurrent
Comparator
30uA
VIN - 0.3V
GND
POR
Set Dominant
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General Overview
The SP6125 is a fixed frequency, Voltagemode, non-synchronous PWM controller
optimized for minimum component, small form
factor and cost effectiveness. It has been
designed for single-supply operation ranging
from 4.5V to 29V. SP6125 has Type-II internal
compensation for use with Electrolytic or
Tantalum output capacitors. For ceramic
capacitors Type-III compensation can be
implemented by simply adding an R and C
between output and Feedback. A precision
0.6V reference, present on the positive terminal
of the Error Amplifier, permits programming of
the output voltage down to 0.6V via the FB pin.
The output of the Error Amplifier is internally
compared to a feed-forward (VIN/5 peak-topeak) ramp and generates the PWM control.
Timing is governed by an internal oscillator that
sets the PWM frequency at 300kHz.
Type-II internal compensation is sufficient if the
following condition is met:
SP6125 contains useful protection features.
Overcurrent protection is based on high-side
MOSFET’s RDS(ON) and is programmable via a
resistor placed at LX node. Under-Voltage
Lock-Out (UVLO) ensures that the controller
starts functioning only when sufficient voltage
exists for powering IC’s internal circuitry.
Creating a Type-III compensation Network
f ESRZERO < f DBPOLE ………………. (1)
where:
1
f ESRZERO =
f DBPOLE =
CZ =
2.π .R ESR .C OUT
1
2.π . L ⋅ C OUT
……….. (2)
………… (3)
L⋅C
……………………….. (4)
1.3 × R1
The above condition requires the ESR zero to
be at a lower frequency than the double-pole
from the LC filter. If this condition is not met,
Type-III compensation should be used and can
be accomplished by placing a series RC
combination in parallel with R1 as shown
below. The value of CZ can be calculated as
follows and RZ selected from table 1.
SP6125 Loop Compensation
The SP6125 includes Type-II internal
compensation components for loop compensation. External compensation components are
not required for systems with tantalum or
aluminum electrolytic output capacitors with
sufficiently high ESR. Use the condition below
as a guideline to determine whether or not the
internal compensation is sufficient for your
design.
fESRZERO÷fDBPOLE RZ
1X
2X
3X
5X
>= 10X
50K
40K
30K
10K
2K
Table1- Selection of RZ
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General Overview
Vout
SP6125
CP1
2pF
RZ
CZ2
130pF
RZ2
200k
CZ
R1
300k, 1%
VFB
Vref =0.6V
+
R2
Error Amplif ier
Figure 1- RZ and CZ in conjunction with internal
compensation components form a Type-III compensation
response of the circuit, seen in figure 2,
validates the above procedure.
Loop Compensation Example 2- A converter
utilizing a SP6125 has a 8.2uH inductor and
a 150uF, 82mΩ Aluminum Electrolytic
capacitor. Determine whether Type-III
compensation is needed.
Loop Compensation Example 1- A converter
utilizing a SP6125 has a 8.2uH inductor and
two
22uF/5mΩ
ceramic
capacitor.
Determine whether Type-III compensation is
needed.
From equation (2) fESRZERO = 1.45MHz. From
equation (3) fDBPOLE = 8.4kHz. Since the
condition specified in (1) is not met, Type-III
compensation has to be used by adding
external components RZ and CZ. Using
equation (4) CZ is calculated 48.7pF (use 47
pF). Following the guideline given in table 1,
a 2kΩ RZ should be used.
The steps followed in example 1 were used
to compensate the typical application circuit
shown on page 1. Satisfactory frequency
From equation (2) fESRZERO = 13kHz. From
equation (3) fDBPOLE = 4.5kHz. Since the
condition specified in (1) is not met, Type-III
compensation has to be used by adding
external components RZ and CZ. Using
equation (4) CZ is calculated 89.9pF (use
100pF). Since fESRZERO ÷ fDBPOLE is
approximately 3, RZ has to be set at 30kΩ.
Figure 2- Satisfactory frequency response of typical application circuit shown on page 1.
Crossover frequency fc is about 35kHz with a corresponding phase margin of 60 degrees. The
two sets of curves, which are essentially identical, correspond to load current of 1A and 2.5A.
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General Overview
Using the ON/OFF Function
Overcurrent protection
Vin
The Feedback pin serves a dual role of
ON/OFF control. The MOSFET driver is
disabled when a voltage greater than 1V is
applied at the FB pin. Maximum voltage rating
of this pin is 5.5V. The controlling signal should
be applied through a small signal diode as
shown on page 1. Please note that an optional
10kΩ bleeding resistor across the output helps
keep the output capacitor discharged under no
load condition.
SP6125
Gate
Q1
Ov er-Current Comparator
LX
Rs
+
Ds
30uA
Vin - 0.3V
Programming the Output Voltage
To program the output voltage, calculate R2
using the following equation:
Figure 3- Overcurrent protection circuit
R2 =
The overcurrent protection circuit functions by
monitoring the voltage across the high-side FET
Q1. When this voltage exceeds 0.3V, the
overcurrent comparator triggers and the
controller enters hiccup mode. For example if
Q1 has Rds(on)=0.1Ω, then the overcurrent will
trigger at I = 0.3V/0.1Ω=3A. To program a lower
overcurrent use a resistor Rs as shown in figure
1. Calculate Rs from:
Rs =
Where:
Vref=0.6 is the reference voltage of the SP6125
R1=200kΩ is a fixed-value resistor that, in
addition to being a voltage divider, it is part of
the compensation network. In order to simplify
compensation calculations, R1 is fixed at
200kΩ.
0.3 − (1.15 × Iout × Rds (on) )
……… (5)
30uA
The overcurrent circuit triggers at peak current
through Q1 which is usually about 15% higher
than average output current. Hence the
multiplier 1.15 is used in (5).
Soft Start
Soft Start is preset internally to 5ms (nominal).
Internal Soft Start eliminates the need for the
external capacitor CSS that is commonly used
to program this function.
Example: A switching MOSFET used with
SP6125 has Rds(on) of 0.1Ω. Program the overcurrent circuit so that maximum output is 2A.
MOSFET Gate Drive
0.3 − (1.15 × 2 A × 0.1Ohm )
Rs =
30uA
P-channel drive is derived through an internal
regulator that generates VIN-5V. This pin (VDR)
has to be connected to VIN with a 0.1uF
decoupling capacitor. The gate drive circuit
swings between VIN and VIN-5 and employs
powerful drivers for efficient switching of the Pchannel MOSFET.
Rs = 2333Ω
Using the above equation there is good
agreement between calculated and test results
for Rs in the range of 0.5kΩ to 3kΩ. For Rs
larger than 3kΩ test results are lower than those
predicted by (5), due to circuit parasitics.
Therefore maximum value of Rs should be
limited to 3kΩ.
Jan28-08 RevG
R1
 Vout 

− 1
 Vref

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General Overview
Power MOSFET Selection
where:
Vf is diode forward voltage at IOUT
Select the Power MOSFET for Voltage rating
BVDSS, On resistance RDS(ON), and thermal
resistance Rthja. BVDSS should be about twice
as high as VIN in order to guard against
switching transients. Recommended MOSFET
voltage rating for VIN of 5V, 12V and 24V is
12V, 30V and 40V respectively. RDS(ON), must
be selected such that when operating at peak
current
and
junction
temperature
the
Overcurrent threshold of the SP6125 is not
exceeded. Allowing 50% for temperature
coefficient of RDS(ON) and 15% for inductor
current ripple, the following expression can be
used:
Schottky’s AC losses due to its switching
capacitance are negligible.
Inductor Selection
Select the Inductor for inductance L and
saturation current Isat. Select an inductor with
Isat higher than the programmed overcurrent.
Calculate inductance from:
 Vout   1   1 

L = (Vin − Vout ) × 
 ×   × 
 Vin   f   Irip 
300mV


RDS (ON ) ≤ 

 1.5 × 1.15 × Iout 
where:
VIN is converter input voltage
VOUT is converter output voltage
f is switching frequency
IRIP is inductor peak-to-peak current ripple
(nominally set to 30% of IOUT)
Within this constraint, selecting MOSFETs with
lower RDS(ON) will reduce conduction losses at
the expense of increased switching losses. As
a rule of thumb select the highest RDS(ON)
MOSFET that meets the above criteria.
Switching losses can be assumed to roughly
equal the conduction losses. A simplified
expression for conduction losses is given by:
Keep in mind that a higher IRIP results in a
smaller inductor which has the advantages of
small size, low DC equivalent resistance DCR,
high saturation current Isat and allows the use
of a lower output capacitance to meet a given
step load transient. A higher Irip, however,
increases the output voltage ripple and
increases the current at which converter enters
Discontinuous Conduction Mode. The output
current at which converter enters DCM is ½ of
IRIP. Note that a negative current step load that
drives the converter into DCM will result in a
large output voltage transient. Therefore the
lowest current for a step load should be larger
than ½ of IRIP.
 Vout 
Pcond = Iout × RDS (ON ) × 

 Vin 
MOSFET’s junction
estimated from:
temperature
can
be
T = (2 × Pc × Rthja ) + Tambient
Schottky Rectifier selection
Select the Schottky for Voltage rating VR,
Forward voltage Vf, and thermal resistance
Rthja. Voltage rating should be selected using
the same guidelines outlined for MOSFET
voltage selection. For a low duty cycle
application such as the circuit shown on first
page, the Schottky is conducting most of the
time and its conduction losses are the largest
component of losses in the converter.
Conduction losses can be estimated from:
Output Capacitor Selection
Select the output capacitor for voltage rating,
capacitance and Equivalent Series Resistance
(ESR). Nominally the voltage rating is selected
to be twice as large as the output voltage.
Select the capacitance to satisfy the
specification for output voltage overshoot or
undershoot caused by current step load. A
steady-state output current IOUT corresponds to
2
inductor stored energy of ½ L IOUT . A sudden
decrease in IOUT forces the energy surplus in L
to be absorbed by COUT.
 Vout 
Pc = Vf × Iout × 1 −

Vin 

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General Overview
Input Capacitor Selection
This causes an overshoot in output voltage that
is corrected by power switch reduced duty
cycle. Use the following equation to calculate
COUT:
Select the input capacitor for Voltage,
Capacitance, ripple current, ESR and ESL.
Voltage rating is nominally selected to be twice
the input voltage. The RMS value of input
capacitor current, assuming a low inductor
ripple current (Irip), can be calculated from:
 I 2 2 − I12 

Cout = L × 
2
2 
Vos
Vout


Icin = Iout × D(1 − D )
Where:
L is the output inductance
I2 is the step load high current
I1 is the step load low current
Vos is output voltage including overshoot
VOUT is steady state output voltage
In general total input voltage ripple should be
kept below 1.5% of VIN (not to exceed 180mV).
Input voltage ripple has three components:
ESR and ESL cause a step voltage drop upon
turn on of the MOSFET. During on time
capacitor discharges linearly as it supplies IOUT
- IIN. The contribution to Input voltage ripple by
each term can be calculated from:
Output voltage undershoot calculation is more
complicated. Test results for SP6125 buck
circuits show that undershoot is approximately
equal to overshoot. Therefore above equation
provides a satisfactory method for calculating
COUT.
∆V , Cin =
Iout × Vout × (Vin − Vout )
fs × Cin × Vin 2
∆V , ESR = ESR(Iout − 0.5Irip )
Select ESR such that output voltage ripple
(VRIP) specification is met. There are two
components to VRIP: First component arises
from charge transferred to and from COUT
during each cycle. The second component of
VRIP is due to inductor ripple current flowing
through output capacitor’s ESR. It can be
calculated from:
∆V , ESL = ESL
(Iout − 0.5Irip )
Trise
Where Trise is the rise time of current through
capacitor
Total input voltage ripple is sum of the above:


1

Vrip = Irip × ESR 2 + 
 8 × Cout × fs 
2
∆V , Tot = ∆V , Cin + ∆V , ESR + ∆V , ESL
In circuits where converter input voltage is
applied via a mechanical switch excessive
ringing may be present at turn-on that may
interfere with smooth startup of SP6126.
Addition of an inexpensive 100µF Aluminum
Electrolytic capacitor at the input will help
reduce ringing and restore a smooth startup.
Where:
IRIP is inductor ripple current
fs is switching frequency
COUT is output capacitor calculated above
Note that a smaller inductor results in a higher
IRIP, therefore requiring a larger COUT and/or
lower ESR in order to meet VRIP.
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VIN
1
C1
4.7uF
Q1
FDS4685
2
C2
4.7uF
Gate
24V
GND
Vin
L1, IHLP-2525CZ
8.2uH, 68mOhm, 4A
Rs 2k
VOUT
LX
C6
0.1uF
6
SP6125
Ds
MBRA340T3G
3
RZ
2K
VDR
C4
22uF
C5
22uF
CZ
47pF
4
3.3V
0-3A
R1
300k, 1%
GND
VFB
GND
R2
66.5k, 1%
5
D1 1N4148
SHDN
High=Of f
Figure 4- Application circuit for Vin=24V
TYPICAL PERFORMANCE CHARACTERISTICS
SP6125 Efficiency versus Iout, Vin=24V,Ta=25C
90
Efficiency (%)
80
70
Vout=3.3V
60
50
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Iout (A)
Figure 5- Efficiency at VIN = 24 V , TA= 25˚C, natural convection
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TYPICAL PERFORMANCE CHARACTERISTICS
Figure 6- Step load 1.2-2.8A,
ch1: VIN; ch2: VOUT; ch3: IOUT
Figure 9- Output ripple at 0A is 12mV,
ch1: VIN; ch2: VOUT; ch3: IOUT
Figure 7- Startup no load,
ch1: VIN; ch2: VOUT, ch3: IOUT
Figure 10- Output ripple at 3A is 32mV,
ch1: VIN; ch2: VOUT; ch3: IOUT
Figure 8- Start up 3A,
ch1: VIN; ch2: VOUT; ch3: IOUT
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 2007 Exar Corporation
PACKAGE: 6PIN TSOT
EXAR
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 2007 Exar Corporation
ORDERING INFORMATION
Part Number
Temperature Range
Package
SP6125EK1-L………………………………….-40°C to +125°C…………..….…(Lead Free) 6 Pin TSOT
SP6125EK1-L/TR…………………………....-40°C to +125°C………..……..….(Lead Free) 6 Pin TSOT
/TR = Tape and Reel
Pack Quantity for Tape and Reel is 2500
For further assistance:
Email:
EXAR Technical Documentation:
[email protected]
http://www.exar.com/TechDoc/default.aspx?
Exar Corporation
Headquarters and
Sales Office
48720 Kato Road
Fremont, CA 94538
main: 510-668-7000
fax: 510-668-7030
EXAR Corporation reserves the right to make changes to the products contained in this publication
in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility
for the use of any circuits described herein, conveys no license under any patent or other right, and
makes no representation that the circuits are free of patent infringement. Charts and schedules
contained here in are only for illustration purposes and may vary depending upon a user’s specific
application. While the information in this publication has been carefully checked; no responsibility,
however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications
where the failure or malfunction of the product can reasonably be expected to cause failure of the life
support system or to significantly affect its safety or effectiveness. Products are not authorized for
use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction
that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c)
potential liability of EXAR Corporation is adequately protected under the circumstances.
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