SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 3.3-V CAN TRANSCEIVERS FEATURES 1 • • • • • • • • • 2 • • • • • • • • (1) Bus-Pin Fault Protection Exceeds ±36 V Bus-Pin ESD Protection Exceeds 16-kV HBM GIFT/ICT Compliant (SN65HVD234) Compatible With ISO 11898 Signaling Rates(1) up to 1 Mbps Extended –7-V to 12-V Common-Mode Range High-Input Impedance Allows for 120 Nodes LVTTL I/Os Are 5-V Tolerant Adjustable Driver Transition Times for Improved Signal Quality Unpowered Node Does Not Disturb the Bus Low-Current Standby Mode . . . 200-µA Typical Low-Current Sleep Mode . . . 50-nA Typical (SN65HVD234) Thermal Shutdown Protection Power-Up/Down Glitch-Free Bus Inputs and Outputs – High Input Impedance With Low VCC – Monolithic Output During Power Cycling Loopback for Diagnostic Functions Available (SN65HVD233) Loopback for Autobaud Function Available (SN65HVD235) DeviceNet Vendor ID #806 The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second). APPLICATIONS • • • • • CAN Data Bus Industrial Automation – DeviceNet™ Data Buses – Smart Distributed Systems (SDS™) SAE J1939 Standard Data Bus Interface NMEA 2000 Standard Data Bus Interface ISO 11783 Standard Data Bus Interface DESCRIPTION The SN65HVD233, SN65HVD234, and SN65HVD235 are used in applications employing the controller area network (CAN) serial communication physical layer in accordance with the ISO 11898 standard. As a CAN transceiver, each provides transmit and receive capability between the differential CAN bus and a CAN controller, with signaling rates up to 1 Mbps. Designed for operation in especially harsh environments, the devices feature cross-wire, overvoltage and loss of ground protection to ±36 V, with overtemperature protection and common-mode transient protection of ±100 V. These devices operate over a –7-V to 12-V common-mode range with a maximum of 60 nodes on a bus. SN65HVD233 FUNCTIONAL BLOCK DIAGRAM RS 8 7 1 D 6 CANH CANL 4 R 5 LBK SN65HVD234 FUNCTIONAL BLOCK DIAGRAM 8 RS 7 D 1 5 EN CANH 6 CANL 4 R SN65HVD235 FUNCTIONAL BLOCK DIAGRAM AB 5 8 RS 1 D R 7 6 CANH CANL 4 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. DeviceNet is a trademark of Open DeviceNet Vendor Association. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2002–2008, Texas Instruments Incorporated SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. DESCRIPTION (CONTINUED) If the common-mode range is restricted to the ISO-11898 Standard range of –2 V to 7 V, up to 120 nodes may be connected on a bus. These transceivers interface the single-ended CAN controller with the differential CAN bus found in industrial, building automation, and automotive applications. The RS, pin 8 of the SN65HVD233, SN65HVD234, and SN65HVD235 provides for three modes of operation: high-speed, slope control, or low-power standby mode. The high-speed mode of operation is selected by connecting pin 8 directly to ground, allowing the driver output transistors to switch on and off as fast as possible with no limitation on the rise and fall slope. The rise and fall slope can be adjusted by connecting a resistor to ground at pin 8, since the slope is proportional to the pin's output current. Slope control is implemented with a resistor value of 10 kΩ to achieve a slew rate of 915 V/µs and a value of 100 kΩ to achieve 9 2.0 V/µs slew rate. For more information about slope control, refer to the application information section. The SN65HVD233, SN65HVD234, and SN65HVD235 enter a low-current standby mode during which the driver is switched off and the receiver remains active if a high logic level is applied to pin 8. The local protocol controller reverses this low-current standby mode when it needs to transmit to the bus. A logic high on the loopback LBK pin 5 of the SN65HVD233 places the bus output and bus input in a high-impedance state. The remaining circuit remains active and available for driver to receiver loopback, self-diagnostic node functions without disturbing the bus. The SN65HVD234 enters an ultralow-current sleep mode in which both the driver and receiver circuits are deactivated if a low logic level is applied to EN pin 5. The device remains in this sleep mode until the circuit is reactivated by applying a high logic level to pin 5. The AB pin 5 of the SN65HVD235 implements a bus listen-only loopback feature which allows the local node controller to synchronize its baud rate with that of the CAN bus. In autobaud mode, the driver's bus output is placed in a high-impedance state while the receiver's bus input remains active. For more information on the autobaud mode, refer to the application information section. AVAILABLE OPTIONS (1) (1) PART NUMBER LOW POWER MODE SLOPE CONTROL DIAGNOSTIC LOOPBACK AUTOBAUD LOOPBACK SN65HVD233D 200-µA standby mode Adjustable Yes No SN65HVD234D 200-µA standby mode or 50-nA sleep mode Adjustable No No SN65HVD235D 200-µA standby mode Adjustable No Yes For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ORDERING INFORMATION PACKAGE (D) SN65HVD233D SN65HVD233DR (1) SN65HVD234D SN65HVD234DR (1) SN65HVD235D SN65HVD235DR (1) (1) 2 Marked as VP233 VP234 VP235 R suffix indicates tape and reel. Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 POWER DISSIPATION RATINGS PACKAGE (1) TA ≤ 25°C POWER RATING CIRCUIT BOARD DERATING FACTOR (1) ABOVE TA = 25°C TA = 85°C POWER RATING TA = 125°C POWER RATING D Low-K 596.6 mW 5.7 mW/°C 255.7 mW 28.4 mW D High-K 1076.9 mW 10.3 mW/°C 461.5 mW 51.3 mW This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. ABSOLUTE MAXIMUM RATINGS (1) (2) over operating free-air temperature range unless otherwise noted VCC Value UNIT Supply voltage range –0.3 to 7 V Voltage range at any bus terminal (CANH or CANL) –36 to 36 V –100 to 100 V Voltage input range, transient pulse, CANH and CANL, through 100 Ω (see Figure 7) VI Input voltage range, (D, R, RS, EN, LBK, AB) –0.5 to 7 V IO Receiver output current –10 to 10 mA CANH, CANL and GND 16 kV All pins 3 kV All pins 1 kV Electrostatic discharge Electrostatic discharge Human Body Model (3) Human Body Model (3) Charged-Device Mode (4) See Dissipation Rating Table Continuous total power dissipation TJ (1) (2) (3) (4) Operating junction temperature 150 °C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. Tested in accordance with JEDEC Standard 22, Test Method A114-A. Tested in accordance with JEDEC Standard 22, Test Method C101. RECOMMENDED OPERATING CONDITIONS MIN VCC Supply voltage Voltage at any bus terminal (separately or common mode) TYP MAX 3 3.6 –7 12 UNIT VIH High-level input voltage D, EN, AB, LBK 2 5.5 VIL Low-level input voltage D, EN, AB, LBK 0 0.8 VID Differential input voltage –6 6 0 100 kΩ 0.75 VCC 5.5 V Resistance from RS to ground VI(Rs) Input Voltage at RS for standby IOH High-level output current IOL Low-level output current TJ Operating junction temperature TA (1) Operating free-air temperature (1) Driver –50 Receiver –10 mA Driver 50 Receiver 10 HVD233, HVD234, HVD235 HVD233, HVD234, HVD235 -40 V mA 150 °C 125 °C Maximum free-air temperature operation is allowed as long as the device maximum junction temperature is not exceeded. Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 3 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com DRIVER ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VO(D) Bus output voltage (Dominant) CANH VO Bus output voltage (Recessive) CANH VOD(D) Differential output voltage (Dominant) VOD Differential output voltage (Recessive) VOC(pp) Peak-to-peak common-mode output voltage CANL CANL IIH High-level input current D, EN, LBK, AB IIL Low-level input current D, EN, LBK, AB D at 0 V, RS at 0 V, See Figure 1 and Figure 2 MIN TYP (1) VCC 0.5 1.25 2.3 D at 3 V, RS at 0 V, See Figure 1 and Figure 2 1.5 2 3 D at 0 V, RS at 0 V, See Figure 2 and Figure 3 1.2 2 3 D at 3 V, RS at 0 V, See Figure 1 and Figure 2 –120 12 D at 3 V, RS at 0 V, No Load –0.5 0.05 See Figure 10 1 mV V V 30 µA D at 0.8 V –30 30 µA –250 VCANH = 12 V, CANL Open, See Figure 15 CO Output capacitance See receiver input capacitance IIRs(s) RS input current for standby RS at 0.75 VCC VCANL = –7 V, CANH Open, See Figure 15 1 –1 VCANL = 12 V, CANH Open, See Figure 15 4 V –30 Short-circuit output current (1) V D at 2 V IOS Supply current UNIT V 2.3 D at 0 V, RS at 0 V, See Figure 1 and Figure 2 VCANH = –7 V, CANL Open, See Figure 15 ICC MAX 2.45 mA 250 µA –10 Sleep EN at 0 V, D at VCC, RS at 0 V or VCC 0.05 2 Standby RS at VCC, D at VCC, AB at 0 V, LBK at 0 V, EN at VCC 200 600 Dominant D at 0 V, No Load, AB at 0 V, LBK at 0 V, RS at 0 V, EN at VCC 6 Recessive D at VCC, No Load, AB at 0 V,LBK at 0 V, RS at 0 V, EN at VCC 6 µA mA All typical values are at 25°C and with a 3.3 V supply. Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 DRIVER SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) TYP (1) MAX RS at 0 V, See Figure 4 35 85 RS with 10 kΩ to ground, See Figure 4 70 125 RS with 100 kΩ to ground, See Figure 4 500 870 70 120 RS with 10 kΩ to ground, See Figure 4 130 180 RS with 100 kΩ to ground, SeeFigure 4 870 1200 PARAMETER TEST CONDITIONS Propagation delay time, low-to-high-level output tPLH MIN RS at 0 V, See Figure 4 Propagation delay time, high-to-low-level output tPHL tsk(p) Pulse skew (|tPHL – tPLH|) tr Differential output signal rise time tf Differential output signal fall time tr Differential output signal rise time tf Differential output signal fall time tr Differential output signal rise time tf Differential output signal fall time ten(s) Enable time from standby to dominant ten(z) Enable time from sleep to dominant RS at 0 V, See Figure 4 35 RS with 10 kΩ to ground, See Figure 4 60 RS with 100 kΩ to ground, SeeFigure 4 (1) UNIT ns ns ns 370 RS at 0 V, See Figure 4 RS with 10 kΩ to ground, See Figure 4 RS with 100 kΩ to ground, See Figure 4 See Figure 8 and Figure 9 20 70 20 70 30 135 30 135 350 1400 350 1400 0.6 1.5 1 5 ns ns ns µs All typical values are at 25°C and with a 3.3 V supply. Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 5 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com RECEIVER ELECTRICAL CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIT+ Positive-going input threshold voltage VIT– Negative-going input threshold voltage Vhys Hysteresis voltage (VIT+ – VIT–) VOH VOL MAX 750 900 AB at 0 V, LBK at 0 V, EN at VCC, See Table 1 500 High-level output voltage IO = –4 mA, See Figure 6 2.4 Low-level output voltage IO = 4 mA, See Figure 6 CANH or CANL at 12 V, VCC at 0 V Bus input current 650 CANH or CANL at –7 V CANH or CANL at –7 V, VCC at 0 V Other bus pin at 0 V, D at 3 V, AB at 0 V, LBK at 0 V, RS at 0 V, EN at VCC 150 500 200 600 –610 –150 –450 –130 Input capacitance (CANH or CANL) Pin-to-ground, VI = 0.4 sin (4E6πt) + 0.5V, D at 3 V, AB at 0 V, LBK at 0 V, EN at VCC 40 CID Differential input capacitance Pin-to-pin, VI = 0.4 sin (4E6πt) + 0.5V, D at 3 V, AB at 0 V, LBK at 0 V, EN at VCC 20 RID Differential input resistance RIN Input resistance (CANH or CANL) (1) 6 Supply current mV 0.4 CI ICC UNIT 100 CANH or CANL at 12 V II MIN TYP (1) D at 3 V, AB at 0 V, LBK at 0 V, EN at VCC V µA pF 40 100 20 50 Sleep EN at 0 V, D at VCC, RS at 0 V or VCC 0.05 2 Standby RS at VCC, D at VCC, AB at 0 V, LBK at 0 V, EN at VCC 200 600 Dominant D at 0 V, No Load, RS at 0 V, LBK at 0 V, AB at 0 V, EN at VCC 6 Recessive D at VCC, No Load, RS at 0 V, LBK at 0 V, AB at 0 V, EN at VCC 6 kΩ µA mA All typical values are at 25°C and with a 3.3 V supply. Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 RECEIVER SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT tPLH Propagation delay time, low-to-high-level output 35 60 tPHL Propagation delay time, high-to-low-level output 35 60 tsk(p) Pulse skew (|tPHL – tPLH|) tr Output signal rise time 2 5 tf Output signal fall time 2 5 MIN TYP (1) MAX See Figure 12 7.5 12 ns See Figure 13 10 20 ns See Figure 14 35 60 ns (1) See Figure 6 7 ns All typical values are at 25°C and with a 3.3 V supply. DEVICE SWITCHING CHARACTERISTICS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS t(LBK) Loopback delay, driver input to receiver output t(AB1) Loopback delay, driver input to receiver output HVD233 HVD235 t(AB2) Loopback delay, bus input to receiver output t(loop1) Total loop delay, driver input to receiver output, recessive to dominant RS at 0 V, See Figure 11 70 135 RS with 10 kΩ to ground, See Figure 11 105 190 RS with 100 kΩ to ground, See Figure 11 535 1000 70 135 RS at 0 V, See Figure 11 t(loop2) (1) UNIT Total loop delay, driver input to receiver output, dominant to recessive RS with 10 kΩ to ground, See Figure 11 105 190 RS with 100 kΩ to ground, See Figure 11 535 1000 ns ns All typical values are at 25°C and with a 3.3 V supply. Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 7 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com PARAMETER MEASUREMENT INFORMATION IO(CANH) II D 60 Ω ±1% VO(CANH) VOD VI VO(CANH) + VO(CANL) IIRs RS 2 VOC IO(CANL) + VO(CANL) VI(Rs) - Figure 1. Driver Voltage, Current, and Test Definition Dominant Recessive ≈3V VO(CANH) ≈ 2.3 V ≈1V VO(CANL) Figure 2. Bus Logic State Voltage Definitions D VI CANH 330 Ω ±1% VOD 60 Ω ±1% + _ RS CANL -7 V ≤ VTEST ≤ 12 V 330 Ω ±1% Figure 3. Driver VOD CANH CL = 50 pF ±20% (see Note B) D VI RL = 60 Ω ±1% VCC/2 VI VO 0V tPLH tPHL RS + (see Note A) VI(Rs) - VO VCC VCC/2 0.9 V VO(D) 90% 0.5 V 10% CANL tr VO(R) tf A. The input pulse is supplied by a generator having the following characteristics: Pulse repetition rate (PRR) ≤ 125 kHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes fixture and instrumentation capacitance. Figure 4. Driver Test Circuit and Voltage Waveforms 8 Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 PARAMETER MEASUREMENT INFORMATION (continued) CANH R VIC = VI(CANH) VI(CANH + VI(CANL) IO VID 2 VO CANL VI(CANL) Figure 5. Receiver Voltage and Current Definitions 2.9 V CANH 2.2 V VI R IO 1.5 V VI (see Note A) 1.5 V CANL 2.2 V tPLH CL = 15 pF ±20% (see Note B) tPHL VO 50% 10% VO 90% 90% tr VOH 50% 10% VOL tf A. The input pulse is supplied by a generator having the following characteristics: Pulse repetition rate (PRR) ≤ 125 kHz, 50% duty cycle, tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω. B. CL includes fixture and instrumentation capacitance. Figure 6. Receiver Test Circuit and Voltage Waveforms Table 1. Differential Input Voltage Threshold Test INPUT OUTPUT VCANH VCANL –6.1 V –7 V L 12 V 11.1 V L –1 V –7 V L MEASURED R |VID| 900 mV 900 mV VOL 6V 12 V 6V L 6V –6.5 V –7 V H 500 mV 12 V 11.5 V H 500 mV –7 V –1 V H 6V 12 V H 6V Open Open H X VOH 6V CANH R 100 Ω Pulse Generator 15 µs Duration 1% Duty Cycle tr, tf ≤ 100 ns CANL D at 0 V or VCC Rs, AB, EN, LBK, at 0 V or VCC NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified. Figure 7. Test Circuit, Transient Over Voltage Test Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 9 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com HVD234 HVD233 or HVD235 RS VI CANH D 0V AB or LBK VI 60 Ω ±1% 0V VCC CANL R + 15 pF ±20% - CANH D 60 Ω ±1% EN CANL VO VO + RS - 15 pF ±20% VCC 50% VI 0V VOH 50% VO VOL ten(s) NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 8. ten(s) Test Circuit and Voltage Waveforms HVD234 RS D 0V VI VCC CANH 60 Ω ±1% VI 0V EN VOH CANL 50% VO R VO + 50% VOL ten(z) 15 pF ±20% - NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 50 kHz, 50% duty cycle. Figure 9. ten(z) Test Circuit and Voltage Waveforms CANH VI 27 Ω ±1% VOC(PP) D VOC RS CANL 27 Ω ±1% VOC 50 pF ±20% NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 10. VOC(pp) Test Circuit and Voltage Waveforms 10 Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 0Ω, 10 kΩ, or 100 kΩ ±5% DUT RS CANH D VI + VO - VI 60 Ω ±1% LBK or AB HVD233/235 EN HVD234 R VCC VCC 50% 50% 0V t(loop2) CANL t(loop1) 50% VO VOH 50% VOL 15 pF ±20% NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 11. t(loop) Test Circuit and Voltage Waveforms RS HVD233 + VOD - D VI LBK VCC VCC CANH 50% VI 50% 0V 60 Ω ±1% CANL t(LBK1) t(LBK2) 50% VO VOH 50% R VO VOL t(LBK) = t(LBK1) = t(LBK2) VOD + ≈ 2.3 V 15 pF ±20% - NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 12. t(LBK) Test Circuit and Voltage Waveforms RS VI VCC D HVD235 CANH + 60 Ω ±1% VOD CANL ≈ 2.3 V VOD VCC 50% VI 0V t(ABH) AB VO R 50% t(ABL) 50% VOH 50% VOL t(AB1) = t(ABH) = t(ABL) VO + - 15 pF ±20% NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 13. t(AB1) Test Circuit and Voltage Waveforms Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 11 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com RS HVD235 CANH D VCC VI 60 Ω ±1% CANL AB VCC 2.9 V 2.2 V VI 2.2 V 1.5 V t(ABH) 1.5 V t(ABL) 50% VO VOH 50% VOL R t(AB2) = t(ABH) = t(ABL) VO + - 15 pF ±20% NOTE: All VI input pulses are supplied by a generator having the following characteristics: tr or tf ≤ 6 ns, pulse repetition rate (PRR) = 125 kHz, 50% duty cycle. Figure 14. t(AB2) Test Circuit and Voltage Waveforms IOS IOS D 0 V or VCC 15 s CANH + _ IOS 0V VI 12 V CANL 0V 0V VI 10 µs and VI -7 V Figure 15. IOS Test Circuit and Waveforms 12 Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 3.3 V R2 ± 1% CANH R CANL R1 ± 1% TA = 25°C VCC = 3.3 V + VID - R2 ± 1% Vac R1 ± 1% VI The R Output State Does Not Change During Application of the Input Waveform. VID 500 mV 900 mV R1 50 Ω 50 Ω R2 280 Ω 130 Ω 12 V VI -7 V NOTE: All input pulses are supplied by a generator with f ≤ 1.5 MHz. Figure 16. Common-Mode Voltage Rejection Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 13 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com DEVICE INFORMATION SN65HVD233D (Marked as VP233) (TOP VIEW) D GND VCC R 1 8 2 7 3 6 4 5 SN65HVD234D (Marked as VP234) (TOP VIEW) RS CANH CANL LBK D GND VCC R 1 8 2 7 3 6 4 5 SN65HVD235D (Marked as VP235) (TOP VIEW) RS CANH CANL EN D GND VCC R 1 8 2 7 3 6 4 5 RS CANH CANL AB EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS D INPUT RS INPUT CANH INPUT VCC VCC VCC 110 kΩ 100 kΩ INPUT 1 kΩ 45 kΩ INPUT 9V + _ CANL INPUT VCC 110 kΩ 9 kΩ 40 V INPUT CANH and CANL OUTPUTS VCC R OUTPUT VCC 9 kΩ 5Ω 45 kΩ INPUT OUTPUT OUTPUT 9 kΩ 40 V 9V 40 V EN INPUT LBK or AB INPUT VCC INPUT 1 kΩ 9V 14 9 kΩ VCC INPUT 100 kΩ Submit Documentation Feedback 1 kΩ 9V 100 kΩ Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 Table 2. Thermal Characteristics PARAMETERS TEST CONDITIONS θJA Junction-to-ambient thermal resistance (1) θJB Junction-to-board thermal resistance θJC Junction-to-case thermal resistance P(AVG) Average power dissipation T(SD) Thermal shutdown junction temperature (1) (2) (3) Low-K (2) VALUE UNIT board, no air flow 185 High-K (3) board, no air flow 101 High-K (3) board, no air flow 82.8 °C/W 26.5 °C/W 36.4 mW 170 °C RL = 60 Ω, RS at 0 V, input to D a 1-MHz 50% duty cycle square wave VCC at 3.3 V, TA = 25°C °C/W See TI literature number SZZA003 for an explanation of this parameter. JESD51-3 low effective thermal conductivity test board for leaded surface mount packages. JESD51-7 high effective thermal conductivity test board for leaded surface mount packages. FUNCTION TABLES DRIVER (SN65HVD233 or SN65HVD235) INPUTS OUTPUTS D LBK/AB Rs CANH CANL BUS STATE X X > 0.75 VCC Z Z Recessive L L or open H or open X X H ≤ 0.33 VCC ≤ 0.33 VCC H L Dominant Z Z Recessive Z Z Recessive RECEIVER (SN65HVD233) INPUTS OUTPUT BUS STATE VID = V(CANH)–V(CANL) LBK D Dominant VID ≥ 0.9 V L or open X L Recessive VID ≤ 0.5 V or open L or open H or open H L or open H or open ? ? 0.5 V < VID <0.9 V X X X X H R L L H H RECEIVER (SN65HVD235) (1) INPUTS (1) OUTPUT BUS STATE VID = V(CANH)–V(CANL) AB D Dominant VID ≥ 0.9 V L or open X R L Recessive VID ≤ 0.5 V or open L or open H or open H ? ? 0.5 V < VID <0.9 V L or open H or open Dominant VID ≥ 0.9 V H X L Recessive VID ≤ 0.5 V or open H H H Recessive VID ≤ 0.5 V or open H L L ? 0.5 V < VID <0.9 V H L L H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 15 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com DRIVER (SN65HVD234) INPUTS OUTPUTS D EN Rs CANH CANL BUS STATE L H ≤ 0.33 VCC H L Dominant H X ≤ 0.33 VCC Z Z Recessive Open X X Z Z Recessive X X > 0.75 VCC Z Z Recessive X L or open X Z Z Recessive RECEIVER (SN65HVD234) (1) INPUTS (1) 16 OUTPUT BUS STATE VID = V(CANH)–V(CANL) EN Dominant VID≥ 0.9 V H R L Recessive VID ≤ 0.5 V or open H H ? 0.5 V < VID <0.9 V H ? X X L or open H H = high level; L = low level; Z = high impedance; X = irrelevant; ? = indeterminate Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 TYPICAL CHARACTERISTICS DOMINANT-TO-RECESSIVE LOOP TIME vs FREE-AIR TEMPERATURE 90 Rs, LBK, AB = 0 V EN = VCC 85 VCC = 3 V 80 VCC = 3.3 V VCC = 3.6 V 75 70 65 60 −40 45 80 TA − Free-Air Temperature − °C 5 125 t (LOOPL2)− Dominant−To−Recessive Loop Time − ns t (LOOPL1)− Ressive−To−Dominant Loop Time − ns RECESSIVE-TO-DOMINANT LOOP TIME vs FREE-AIR TEMPERATURE 95 Rs, LBK, AB = 0 V EN = VCC 90 85 VCC = 3.6 V 80 VCC = 3.3 V 75 70 VCC = 3 V 65 −40 Figure 17. SUPPLY CURRENT vs FREQUENCY 160 VCC = 3.3 V, Rs, LBK, AB = 0 V, EN = VCC, TA = 25°C, 60-W Load VCC = 3.3 V, Rs, LBK, AB = 0 V, EN = VCC, TA = 25°C 140 I OL − Driver Output Current − mA I CC − Supply Current − mA 125 DRIVER LOW-LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE 20 19 45 5 80 TA − Free-Air Temperature − °C Figure 18. 18 17 16 120 100 80 60 40 20 15 200 0 300 500 f − Frequency − kbps Figure 19. Copyright © 2002–2008, Texas Instruments Incorporated 700 1000 0 1 2 3 VOL − Low-Level Output Voltage − V Figure 20. Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 4 17 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com TYPICAL CHARACTERISTICS (continued) DRIVER HIGH-LEVEL OUTPUT CURRENT vs HIGH-LEVEL OUTPUT VOLTAGE 2.2 VCC = 3.3 V, Rs, LBK, AB = 0 V, EN = VCC, TA = 25°C 0.1 VCC = 3.6 V VOD − Differential Output Voltage − V I OH − Driver High-Level Output Current − mA 0.12 DIFFERENTIAL OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 0.08 0.06 0.04 0.02 0 0 0.5 1 1.5 2 2.5 3 VOH − High-Level Output Voltage − V 2 VCC = 3.3 V 1.8 VCC = 3 V 1.6 1.4 RL = 60 Ω Rs, LBK, AB = 0 V EN = VCC 1.2 1 −40 3.5 40 39 38 VCC = 3.6 V 37 36 125 t PHL− Receiver High-To-Low Propagation Delay − ns t PLH − Receiver Low-To-High Propagation Delay − ns 41 RECEIVER HIGH-TO-LOW PROPAGATION DELAY vs FREE-AIR TEMPERATURE 38 37 Rs, LBK, AB = 0 V EN = VCC See Figure 6 36 35 VCC = 3 V 34 VCC = 3.3 V 33 VCC = 3.6 V 32 −40 5 45 80 TA − Free-Air Temperature − °C Figure 23. 18 Submit Documentation Feedback 125 Figure 22. RECEIVER LOW-TO-HIGH PROPAGATION DELAY vs FREE-AIR TEMPERATURE 45 Rs, LBK, AB = 0 V 44 EN = VCC See Figure 6 43 VCC = 3.3 V V = 3 V CC 42 5 45 80 TA − Free-Air Temperature − °C 80 TA − Free-Air Temperature − °C Figure 21. 35 −40 45 5 125 Figure 24. Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 TYPICAL CHARACTERISTICS (continued) DRIVER HIGH-TO-LOW PROPAGATION DELAY vs FREE-AIR TEMPERATURE 55 50 t PHL− Driver High-To-Low Proragation Delay − ns t PLH − Driver Low-To-High Propagation Delay − ns DRIVER LOW-TO-HIGH PROPAGATION DELAY vs FREE-AIR TEMPERATURE Rs, LBK, AB = 0 V EN = VCC See Figure 4 VCC = 3 V VCC = 3.3 V 45 40 35 VCC = 3.6 V 30 25 −40 5 45 80 125 65 60 VCC = 3 V 55 50 VCC = 3.3 V 45 40 VCC = 3.6 V Rs, LBK, AB = 0 V EN = VCC See Figure 4 35 30 −40 5 45 80 TA − Free-Air Temperature − °C TA − Free-Air Temperature − °C Figure 25. 125 Figure 26. DRIVER OUTPUT CURRENT vs SUPPLY VOLTAGE 35 Rs, LBK, AB = 0 V, EN = VCC, TA = 25°C RL = 60 Ω I O − Driver Output Current − mA 30 25 20 15 10 5 0 −5 0 Copyright © 2002–2008, Texas Instruments Incorporated 0.6 1.2 1.8 2.4 VCC − Supply Voltage − V Figure 27. 3 3.6 Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 19 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com APPLICATION INFORMATION DIAGNOSTIC LOOPBACK (SN65HVD233) The loopback (LBK) function of the HVD233 is enabled with a high-level input to pin 5. This forces the driver into a recessive state and redirects the data (D) input at pin 1 to the received-data output (R) at pin 4. This allows the host controller to input and read back a bit sequence to perform diagnostic routines without disturbing the CAN bus. A typical CAN bus application is displayed in Figure 28. If the LBK pin is not used it may be tied to ground (GND). However, it is pulled low internally (defaults to a low-level input) and may be left open if not in use. AUTOBAUD LOOPBACK (SN65HVD235) The autobaud feature of the HVD235 is implemented by placing a logic high on pin 5 (AB). In autobaud, the bus-transmit function of the transceiver is disabled, while the bus-receive function and all of the normal operating functions of the device remain intact. With the autobaud function engaged, normal bus activity can be monitored by the device. However, if an error frame is generated by the local CAN controller, it is not transmitted to the bus. Only the host microprocessor can detect the error frame. Autobaud detection is best suited to applications that have a known selection of baud rates. For example, a popular industrial application has optional settings of 125 kbps, 250 kbps, or 500 kbps. Once the logic high has been applied to pin 5 (AB) of the HVD235, assume a baud rate such as 125 kbps, then wait for a message to be transmitted by another node on the bus. If the wrong baud rate has been selected, an error message is generated by the host CAN controller. However, since the bus-transmit function of the device has been disabled, no other nodes receive the error message of the controller. This procedure makes use of the CAN controller's status register indications of message received and error warning status to signal if the current baud rate is correct or not. The warning status indicates that the CAN chip error counters have been incremented. A message received status indicates that a good message has been received. If an error is generated, reset the CAN controller with another baud rate, and wait to receive another message. When an error-free message has been received, the correct baud rate has been detected. A logic low may now be applied to pin 5 (AB) of the HVD235, returning the bus-transmit normal operating function to the transceiver. CANH Bus Lines -- 40 m max 120 Ω 120 Ω Stub Lines -- 0.3 m max CANL 5V Vref Vcc 0.1µ F SN65HVD251 Rs 3.3 V Vcc Rs D CANTX R GND D LBK CANRX 0.1µ F SN65HVD233 GND GPIO CANTX 3.3 V Vref Vcc SN65HVD230 Rs R D CANTX CANRX 0.1µ F GND R CANRX TMS320LF243 TMS320F2812 TMS320LF2407A Sensor, Actuator, or Control Equipment Sensor, Actuator, or Control Equipment Sensor, Actuator, or Control Equipment Figure 28. Typical HVD233 Application ISO 11898 COMPLIANCE OF SN65HVD230 FAMILY OF 3.3-V CAN TRANSCEIVERS Introduction Many users value the low power consumption of operating their CAN transceivers from a 3.3 V supply. However, some are concerned about the interoperability with 5-V supplied transceivers on the same bus. This report analyzes this situation to address those concerns. 20 Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 Differential Signal CAN is a differential bus where complementary signals are sent over two wires and the voltage difference between the two wires defines the logical state of the bus. The differential CAN receiver monitors this voltage difference and outputs the bus state with a single-ended output signal. NOISE MARGIN 900 mV Threshold RECEIVER DETECTION WINDOW 75% SAMPLE POINT 500 mV Threshold NOISE MARGIN Figure 29. Typical SN65HVD230 Differential Output Voltage Waveform The CAN driver creates the difference voltage between CANH and CANL in the dominant state. The dominant differential output of the SN65HVD230 is greater than 1.5 V and less than 3 V across a 60-ohm load. The minimum required by ISO 11898 is 1.5 V and maximum is 3 V. These are the same limiting values for 5 V supplied CAN transceivers. The bus termination resistors drive the recessive bus state and not the CAN driver. A CAN receiver is required to output a recessive state with less than 500 mV and a dominant state with more than 900 mV difference voltage on its bus inputs. The CAN receiver must do this with common-mode input voltages from -2 V to 7 volts. The SN65HVD230 family receivers meet these same input specifications as 5-V supplied receivers. Common-Mode Signal A common-mode signal is an average voltage of the two signal wires that the differential receiver rejects. The common-mode signal comes from the CAN driver, ground noise, and coupled bus noise. Obviously, the supply voltage of the CAN transceiver has nothing to do with noise. The SN65HVD230 family driver lowers the common-mode output in a dominant bit by a couple hundred millivolts from that of most 5-V drivers. While this does not fully comply with ISO 11898, this small variation in the driver common-mode output is rejected by differential receivers and does not effect data, signal noise margins or error rates. Interoperability of 3.3-V CAN in 5-V CAN Systems The 3.3-V supplied SN65HVD23x family of CAN transceivers are electrically interchangeable with 5-V CAN transceivers. The differential output is the same. The recessive common-mode output is the same. The dominant common-mode output voltage is a couple hundred millivolts lower than 5-V supplied drivers, while the receivers exhibit identical specifications as 5-V devices. Electrical interoperability does not assure interchangeability however. Most implementers of CAN buses recognize that ISO 11898 does not sufficiently specify the electrical layer and that strict standard compliance alone does not ensure interchangeability. This comes only with thorough equipment testing. Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 21 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com BUS CABLE The ISO-11898 Standard specifies a maximum bus length of 40 m and maximum stub length of 0.3 m with a maximum of 30 nodes. However, with careful design, users can have longer cables, longer stub lengths, and many more nodes to a bus. A large number of nodes requires a transceiver with high input impedance such as the HVD233. The standard specifies the interconnect to be a single twisted-pair cable (shielded or unshielded) with 120-Ω characteristic impedance (ZO). Resistors equal to the characteristic impedance of the line terminate both ends of the cable to prevent signal reflections. Unterminated drop-lines (stubs) connecting nodes to the bus should be kept as short as possible to minimize signal reflections. SLOPE CONTROL The rise and fall slope of the SN65HVD233, SN65HVD234, and SN65HVD235 driver output can be adjusted by connecting a resistor from the Rs (pin 8) to ground (GND), or to a low-level input voltage as shown in Figure 30. The slope of the driver output signal is proportional to the pin's output current. This slope control is implemented with an external resistor value of 10 kΩ to achieve a ≈15 V/µs slew rate, and up to 100 kΩ to achieve a ≈2.0 V/µs slew rate as displayed in Figure 31. Typical driver output waveforms with slope control are displayed in Figure 32. 10 kΩ to 100 kΩ D GND Vcc R 1 2 3 4 8 Rs 7 6 5 CANH CANL LBK IOPF6 TMS320LF2407 Figure 30. Slope Control/Standby Connection to a DSP 25 Slope (V/us) 20 15 10 5 0 0 4.7 6.8 10 15 22 33 47 68 100 Slope Control Resistance - kΩ Figure 31. HVD233 Driver Output Signal Slope vs Slope Control Resistance Value 22 Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 SN65HVD233 SN65HVD234 SN65HVD235 www.ti.com.............................................................................................................................................. SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008 Rs = 0 Ω Rs = 10 k Ω Rs = 100 k Ω Figure 32. Typical SN65HVD233 250-kbps Output Pulse Waveforms With Slope Control STANDBY If a high-level input (> 0.75 VCC) is applied to Rs (pin 8), the circuit enters a low-current, listen only standby mode during which the driver is switched off and the receiver remains active. The local controller can reverse this low-power standby mode when the rising edge of a dominant state (bus differential voltage >900 mV typical) occurs on the bus. Copyright © 2002–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 23 SN65HVD233 SN65HVD234 SN65HVD235 SLLS557F – NOVEMBER 2002 – REVISED AUGUST 2008.............................................................................................................................................. www.ti.com Revision History Changes from Original (November 2002) to Revision A ................................................................................................ Page • Changed the data sheet from Product Preview to Production for part number SN65HVD233. ............................................ 1 Changes from Revision A (March 2003) to Revision B .................................................................................................. Page • • • Changed the data sheet from Product Preview to Production for part number SN65HVD234 and SN65HVD235. ............. 1 Added Table 2, Thermal Characteristics ............................................................................................................................. 15 Changed the APPLICATION INFORMATION section......................................................................................................... 20 Changes from Revision B (June 2003) to Revision C .................................................................................................... Page • Added IO, Receiver output current to the Abs Max Table...................................................................................................... 3 Changes from Revision C (March 2005) to Revision D .................................................................................................. Page • Added Features Bullet: GIFT/ICT Compliant (SN65HVD234) ............................................................................................... 1 Changes from Revision D (June 2005) to Revision E .................................................................................................... Page • • • Added 60-Ω load test condition to Figure 19 ....................................................................................................................... 17 Deleted INTEROPERABILITY WITH 5-V CAN SYSTEMS section..................................................................................... 20 Added ISO 11898 COMPLIANCE OF SN65HVD230 FAMILY OF 3.3-V CAN TRANSCEIVERS section.......................... 20 Changes from Revision E (October 2007) to Revision F ............................................................................................... Page • 24 Changed Figure 6, Receiver Test Circuit and Voltage Waveform. From: CL = 50 pF ±20% to: CL = 15 pF ±20%............... 9 Submit Documentation Feedback Copyright © 2002–2008, Texas Instruments Incorporated Product Folder Link(s): SN65HVD233 SN65HVD234 SN65HVD235 PACKAGE OPTION ADDENDUM www.ti.com 23-Oct-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) SN65HVD233D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN65HVD233DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN65HVD233DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN65HVD233DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN65HVD234D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN65HVD234DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN65HVD234DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN65HVD234DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN65HVD235D ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN65HVD235DG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN65HVD235DR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN65HVD235DRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 23-Oct-2010 Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN65HVD233 : • Enhanced Product: SN65HVD233-EP NOTE: Qualified Version Definitions: • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 1-Aug-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN65HVD233DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD234DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 SN65HVD235DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 1-Aug-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN65HVD233DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD234DR SOIC D 8 2500 340.5 338.1 20.6 SN65HVD235DR SOIC D 8 2500 340.5 338.1 20.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such components to meet such requirements. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated