ETC SCG9864

SCG9864
8-BIT MICROCONTROLLER
SCG9864 Microcontroller Specification
FEATURE SUMMARY
I/O ports
Technology
−
CMOS technology.
−
−
8-bit CPU core.
126 powerful and easy-to-use
instruction set.
CPU
2 8-bit programmable I/O ports.
1 7-bit output port.
−
2 8-bit pre-scalar auto reload timers
which can be cascaded to form one
16-bit timer.
1 real time timer.
1 watch dog timer.
Timer
−
−
Memory
−
−
−
−
−
Internal ROM: 64K x 8
Internal RAM: 128 x 8
Memory is organized as 16K-byte
page.
Operating Voltage
−
2.4V to 5.5V.
I/O structure
−
Memory mapped I/O structure.
Oscillation Frequency
−
−
RC Oscillator for the main system
clock up to 4MHz, instruction cycle
~0.5us.
Subsystem clock frequency of
32.768kHz for real time timer.
Power Down
−
Stop mode (Stop oscillation)
Interrupts
−
−
−
−
2 timer interrupts.
1 real time interrupt.
1 external event interrupt.
1 software interrupt.
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SCG9864
8-BIT MICROCONTROLLER
Function Overview
Program Memory Map
RAM Area:
Address
Description
$00-$0F
H/W registers and I/Os
$10-$7F
Reserved
$80-$FF
Data memory and Stack
Figure 1. Memory map in RAM area
ROM Area:
Physical Address
$0000-$3BFF
Description
Page 0
Program Reset address at $0000
$3C00-$3FFF
IC Test Program
$4000-$7FFF
Page 1
$8000-$BFFF
Page 2
$C000-$FFFF
Page 3
Software interrupt at $FFC0
External interrupt at $FFD0
Timer 1 interrupt at $FFE0
Timer 0/RTC interrupt at $FFF0
Figure 2. Memory map in ROM area
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8-BIT MICROCONTROLLER
CPU core
An 8-bit accumulator based CPU core can directly address up to 64 x 16K byte addressing
space. Most of the instructions are executed in two cycles. Instruction is generally one byte
and will have an extra byte for some addressing modes.
CPU Registers:
Program Counter (PC)
The 14-bit Program Counter stores address for instruction fetch during program
execution. It makes up a page size of 16K bytes. Together with the Program Page
Register (iPAGE), it becomes a 20-bit address that can access up to 1,048,576 bytes.
When the CPU resets, the content of the iPAGE:PC will be 00:0000. If interrupt
occurs, the type of interrupt will then determine its content. PC will automatically be
incremented to the next instruction after an instruction fetch.
Table 1. Different types of interrupt
Interrupt
IPAGE:PC
Timer 0 / RTC Interrupt
3H:3FF0H
Timer 1 Interrupt
3H:3FE0H
External Interrupt
3H:3FD0H
Software Interrupt
3H:3FC0H
Page Register (PAGE)
An 8-bit Page Register to change the program flow. The most significant two bits are
always set to zero.
Data Bank Register (BANK)
An 8-bit Bank Register to access data memory. The most significant two bits are
always set to zero.
Program Page Register (iPAGE)
An 8-bit Program Page Register is combined with PC for instruction fetch. The most
significant two bits are always set to zero.
Accumulator (A)
An 8-bit Accumulator for arithmetic, logical and data movement operation.
Temporary Register (B)
An 8-bit temporarily storage for accumulator.
Index Registers (X, Y)
These two 8-bit registers can be used for general registers and index registers of the
indirect addressing mode. They can also be used as pointer for table read and
memory write instructions.
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Stack Register (SP)
A 7-bit Stack Register (SP) stores the address for stack operation. After CPU resets,
the value is $00. The SP has to be initialized at $FF by software. This means the
stack frame starts from the highest address memory location.
Program Status (PS)
This is an 8-bit Program Status Register. However only 4-bit is used for controlling
ALU operations and instruction execution sequences.
Program Status
Bit
7
Sign
6
5
4
Zero Carry Interrupt
Mask
3
2
1
0
Reserved
Figure 3. 8-bit Program Status
Carry Flag (C)
Whenever there is a carry or borrow occurs after an arithmetic operation,
carry flag is set to 1. Otherwise, it is cleared to 0.
Besides, the “Rotate” instructions can also change the carry flag which value
is a bit shifted out of the specified source operand.
Executing single instruction of “SETC” or “CLRC” can also alter this flag.
Upon returning from an interrupt service routine, this flag will be restored.
Zero Flag (Z)
For arithmetic and logical operations, Zero flag will be set to 1 if the result is
zero.
Besides, for operation that involves moving source operand to accumulator,
zero flag will also be set to 1 if the content of the source operand is zero.
Upon returning from an interrupt service routine, this flag will be restored.
Sign Flag (N)
Sign flag stores the most significant bit of a result after the following operations: a.
Arithmetic
b.
Logic
c.
Move from source operand to accumulator
This flag will also be restored upon returning from an interrupt service routine.
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Interrupt Mask Flag (I)
The flag will be set to 1 when entering an interrupt service routine. By that
time, all other interrupt events will be pending.
After exiting from the interrupt service routine, this interrupt mask flag will be
cleared to 0. Then interrupt handling will be resumed.
Memory
There are 64K bytes internal ROM with each page size is 16K bytes. Regarding the instruction
pointer, it is organized as iPAGE:PC for instruction fetch.
Change of program flow between pages is by modifying the PAGE register and then followed
by executing a JMP or CALL instruction. These two instructions will load the PAGE register to
iPAGE and change the content in PC for long JMP or CALL instruction. It does not need to
change the PAGE register if it is a short JMP/CALL (JMP/CALL within page) because the
PAGE register is normally the same as the iPAGE register. To exit a subroutine, long or short
return type must be specified for long or short CALL respectively.
The microcontroller has 128 bytes internal RAM data storage of address $80-$FF. This area
includes stack frame and data memory. The stack frame is usually initialized at the highest
RAM address location, i.e. $FF.
Oscillation Circuits
Main system and subsystem oscillation circuitry generates the internal clock signal for the
CPU and other hardware timings. The main system clock uses the RC oscillation source. The
operating frequency is up to 4 MHz. This clock is for the CPU and the two timers.
The subsystem clock is for the real time signals. It uses 32.768 kHz crystal. It has to be tied to
a voltage level, either HIGH or LOW, if the real time timer and the watch dog timer are not
used.
Power Down
The microcontroller supports power down mode for saving power.
Executing a STOP instruction will stop the main system oscillation to save most of
microcontroller power.
Only an external interrupt will release the microcontroller from STOP mode.
Interrupts
The MICROCONTROLLER has 2 timer interrupts, one real time interrupt, one external event
interrupt and one software interrupt. When interrupt occurs, the content of PC, iPAGE and PS
are pushed onto the stack in sequence. And then, the corresponding interrupt vector is loaded
into iPAGE:PC. Upon executing a RTI instruction, the registers are popped out of the stack in
the reversed order.
The preference of interrupt priority is Timer 0 / RTC interrupt, Timer 1 interrupt and then
external interrupt.
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8-BIT MICROCONTROLLER
I/O ports
The microcontroller has one 7-bit output port and two software controllable 8-bit I/O ports.
For I/O port 0, there is a pull-low resistor when it is configured as in input mode, and this
resistor is disabled when it is in output mode.
For I/O port 1, it is floating when in input mode.
For Port 2, it is a 7-bit output port only.
Timers
The microcontroller has two programmable 8-bit timers (T0 and T1) for system timing. It has
also a real time timer and a watch dog timer when subsystem clock is employed. All the timers
can be enabled or disabled by configuring an internal register, TCONG. At CPU resets, all of
them are disabled.
T0 and T1 are up-counters and can be configured as either two 8-bit pre-scalar auto reload
timer or as a 16-bit pre-scalar auto reload timer. The timer overflow flag will be set if the timer
overflows. Then an interrupt will be generated if the corresponding interrupt enable bit is set to
1.
The real time timer provides 0.5 sec interrupt for RTC functions. Watch dog timer will overflow
in ~1 sec and then will reset the CPU.
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BLOCK DIAGRAM
P0
P0
OUTPUT
LATCH
INTERRUPT
CONTROL
RTC
P1
P1
OUTPUT
LATCH
WATCH
DOG
CONTROL
XTAL
ALU
P2
A
B
PC
X
iPAGE
Y
PAGE
SP
BANK
PS
P2
OUTPUT
LATCH
TIMER0
TIMER1
OSC
CPU CORE
ADDRESS BUS
& CONTROL
DATA BUS
INTERNAL
ROM
64Kx 8
INTERNAL
RAM
128x8
Figure 4. Block diagram of SCG9864
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PIN DESCRIPTIONS
Table 2. Pin Description
Pin
Name
Type
1
P_CLK
2
CLK320
3
CLK32I
4
GND
Power
Ground (optional)
5
P0RW0
I/O
Port 0
Pad type 1
6
P0RW1
I/O
Port 0
Pad type 1
7
P0RW2
I/O
Port 0
Pad type 1
8
P0RW3
I/O
Port 0
Pad type 1
9
VDD
Power
Supply voltage
10
P0RW4
I/O
Port 0
Pad type 1
11
P0RW5
I/O
Port 0
Pad type 1
12
P0RW6
I/O
Port 0
Pad type 1
13
P0RW7
I/O
Port 0
Pad type 1
14
GND
Power
Ground (optional)
15
P1RW0
I/O
Port 0
Pad type 1
16
P1RW1
I/O
Port 1
Pad type 1
17
P1RW2
I/O
Port 1
Pad type 1
18
P1RW3
I/O
Port 1
Pad type 1
19
VDD
Power
Supply Voltage (optional)
20
P1RW4
I/O
Port 1
Pad type 1
21
P1RW5
I/O
Port 1
Pad type 1
22
P1RW6
I/O
Port 1
Pad type 1
23
P1RW7
I/O
Port 1
Pad type 1
24
GND
Power
Ground (optional)
25
P2W0
O/P
Port 2
Pad type 2
26
P2W1
O/P
Port 2
Pad type 2
27
P2W2
O/P
Port 2
Pad type 2
28
P2W3
O/P
Port 2
Pad type 2
29
VDD
Power
Supply Voltage (optional)
30
P2W4
O/P
Port 2
Pad type 2
31
P2W5
O/P
Port 2
Pad type 2
32
P2W6
O/P
Port 2
Pad type 2
33
PWMP
O/P
Speaker +
Pad type 2
34
PWMM
O/P
Speaker -
Pad type 2
35
GND
Power
Ground
36
VDD
Power
Supply Voltage
37
TEST
I/P
Test pin, no connection
Pad type 4
38
RESET
I/P
Reset pin
Pad type 3
39
EXT_INT
I/P
External Interrupt pin
Pad type 4
Note:
Description
Pad Type
I/P
RC Oscillator for the Main System clock
Pad type 5
O/P
32.768KHz RTC
Pad type 6
I/P
32.768KHz RTC
Pad type 6
The Optional pins for VDD and GND can be left open as NC pins.
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8-BIT MICROCONTROLLER
data in
bond pad
Schmitt input
data out
output enable
tristate control
Figure 5. Pad type 1 (bi-directional pad)
data out
output enable
bond pad
tristate control
Figure 6. Pad type 2 (output pad)
Reset
Schmitt input
Figure 7. Pad type 3 ( Reset )
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8-BIT MICROCONTROLLER
INT
Schmitt input
Figure 8. Pad type 4 (external interrupt)
Test
Test=1
Test=0
RC circuitry
Clock out
RC pad
enable
Figure 9. Pad type 5 (RC oscillation pad)
20pF
CLK32I
32.768k
Hz
10M Ω
CLK32O
20pF
Figure 10. Pad type 6 (Clock circuit)
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8-BIT MICROCONTROLLER
Control Registers
Summary
Table 3. Summary of Control Registers
Hex
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
Mnemonic
P0DIR
P0RW
P1DIR
P1RW
P2W
TCONG
INTR
TFLAG
T0VAL
T1VAL
SPHEN
-
Control Registers Name
Port 0 Direction Control Register
(Reserved)
Port 0 Read/Write Port
Port 1 Direction Control Register
Port 1 Read/Write Port
Port 2 Output Port
(Reserved)
(Reserved)
(Reserved)
Timer Configuration Port
Interrupt Control Register
Timer Flag Status Register/Watch-dog Reset
Timer 0 Preset Value Register
Timer 1 Preset Value Register
D/A Output Control Register
(Reserved)
R/W
W
R/W
W
R/W
W
W
W
R/W
W
W
W
-
Descriptions
P0DIR and P1DIR
Bit
R/W
7
W
6
W
5
W
4
W
3
W
2
W
1
W
0
W
0 : Input mode
1 : Output mode
Figure 11. Port 0 and Port 1 Direction Control Registers
P0RW and P1RW
Bit
R/W
7
R/W
6
R/W
5
R/W
4
R/W
3
R/W
2
R/W
1
R/W
0
R/W
Write to output latch.
Read from input pin. Read value of Output pin
will be the output latch value.
Figure 12. Port 0 and Port 1 Read/Write Port
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8-BIT MICROCONTROLLER
P2W
Bit
R/W
7
-
6
W
5
W
Reserved
4
W
3
W
2
W
1
W
0
W
1
W
0
W
Write to output latch
Figure 13. Port 2 Output Port
TCONG
Bit
R/W
7
-
6
-
5
-
4
W
Reserved
Watch dog timer
0 : disable
1 : enable
3
W
2
W
000 : disable T0 and T1
0x1 : enable T0
01x : enable T1
1xx : cascade T0:T1 as 16-bit timer
Real time timer
0 : disable
1 : enable
Figure 14. Timer Configuration Port
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8-BIT MICROCONTROLLER
INTR
Bit
R/W
7
-
6
-
5
-
4
-
Reserved
3
-
2
W
1
W
0
W
External interrupt
0 : disable
1 : enable
T1 interrupt
0 : disable
1 : enable
T0/RTC (half second) interrupt
0 : disable
1 : enable
Figure 15. Interrupt Control Register
TFLAG
Bit
R/W
7
-
6
-
5
-
4
-
3
R
2
R
Reserved
1
R
0
R
0 : T0 not overflow
1 : T0 overflow
CLK32I Input
Note :
Read will reset all flags.
Any write operation to TFLAG will reset the
watch dog timer.
0 : T1 not overflow
1 : T1 overflow
0 : not half second
1 : half second
Figure 16. Timer Flag Status Register/Watch-dog Reset
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8-BIT MICROCONTROLLER
T0VAL and T1VAL
Bit
R/W
7
W
6
W
5
W
4
W
3
W
2
W
1
W
0
W
Write timer 0 and timer 1 preset value
1
system clock
×
2
counter value
For either T0 or T1,
Maximum counter value = 255
Minimum frequency ≈ 7840Hz
For T0:T1,
Maximum counter value = 65535
Minimun frequency ≈ 30Hz
Time frequency =
Figure 17. Timer 0 and Timer 1 Preset Value Register
SPHEN
Bit
R/W
7
-
6
-
5
-
4
-
Reserved
3
-
2
-
1
W
0
W
0 : single channel
1 : dual channels
0 : disable D/A output
1 : enable D/A output
Figure 18. D/A Output Control Register
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8-BIT MICROCONTROLLER
INSTRUCTION SUMMARY
There are 126 instructions. All instructions are one or two byte instructions.
The followings are the notations used:
A
B
C
Z
N
X
Y
SP
STACK
BANK
PAGE
iPAGE
PC
PS
I
(X)
(Y)
label
(label)
ADDR14
ADDR 8
#CONSTANT
Accumulator
B Register
Carry bit
Zero bit
Negative bit
X Index Register
Y Index Register
Stack Pointer Register
Stack
Data Bank Register
Page Register
The page register for PC19-PC14
Program Counter PC13-0
Program Status
Interrupt flag
RAM pointed by X
RAM pointed by Y
A 8-bit RAM/Register label
RAM pointed by the label
A 14-bit address
A 8-bit address
A 8-bit constant
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INSTRUCTION SET
1.
ADC
Code
0100 0000
Operation
A + A + C→A
Flags
2.
4.
5.
6.
7.
8.
N, Z, C
10.
0100 0010
Operation
X + A + C→A
Flags
N, Z, C
AND X
Code
ADC X
Code
3.
9.
A
ADC Y
11.
0100 1010
Operation
X Λ A→A
Flags
N,Z
AND Y
Code
0100 1011
Operation
Y Λ A→A
Flags
N,Z
AND (X)
Code
0100 0011
Code
0100 1110
Operation
Y + A + C→A
Operation
(X) Λ A→A
Flags
N, Z, C
Flags
N,Z
ADC (X)
12.
AND (Y)
Code
0100 0110
Code
0100 1111
Operation
(X) + A + C→A
Operation
(Y) Λ A→A
Flags
N, Z, C
Flags
N,Z
ADC (Y)
13.
AND label
Code
0100 0111
Code
Operation
(Y) + A + C→A
Operation
(zzzz zzzz)ΛA→A
Flags
N, Z, C
Flags
N,Z
ADC label
14.
0100 1100 zzzz zzzz
AND #CONSTANT
Code
0100 0100 zzzz zzzz
Code
Operation
(zzzz zzzz)+A+C→A
Operation
Zzzz zzzz Λ A →A
Flags
N, Z, C
Flags
N,Z
ADC #CONSTANT
15.
0100 1001 zzzz zzzz
BRA ADDR8
Code
0100 0001 zzzz zzzz
Code
Operation
Zzzz zzzz +A+C→A
Operation
Zzzz zzzz → PC0-7
Flags
N, Z, C
Flags
-----
0011 0010 zzzz zzzz
AND A
Code
0100 1000
Operation
A Λ A→A
Flags
N,Z
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8-BIT MICROCONTROLLER
24.
16.
CALL ADDR14
Code
11zz zzzz zzzz zzzz
Operation
PC →(SP);SP-2→SP
CMP #CONSTANT
Code
0000 0001 zzzz zzzz
Operation
A ∀ zzzz zzzz
Flags
Z
ADDR14 →PC[13:0]
If PAGE ≠ iPAGE
25.
IPAGE→(SP);SP-1→SP
PAGE →iPAGE
Flags
17.
18.
Code
0010 1000
Operation
0 →A
Flags
N,Z
0 →X
Flags
-----
23.
A ∀ (zzzz zzzz)
Flags
Z
CPMX #CONSTANT
Code
0000 1001 zzzz zzzz
Operation
(X) ∀ zzzz zzzz
Flags
Z
27.
CPMX label
Code
0000 1101 zzzz zzzz
Operation
(X) ∀ zzzz zzzz
Flags
Z
CLR Y
Code
0010 1011
Operation
0 →Y
28.
-----
CPX #CONSTANT
Code
0001 0001 zzzz zzzz
Operation
X ∀ zzzz zzzz
Flags
Z
CLR (X)
Code
0010 1110
Operation
0 →(X)
29.
-----
CPX label
Code
0001 0101 zzzz zzzz
Operation
X ∀ (zzzz zzzz)
Flags
Z
CLR (Y)
Code
22.
26.
0010 1010
Operation
Flags
21.
0000 0101 zzzz zzzz
Operation
CLR X
Flags
20.
Code
CLR A
Code
19.
-----
CMP label
30.
0010 1111
Operation
0 →(Y)
Flags
-----
CPY #CONSTANT
Code
0001 1001 zzzz zzzz
Operation
Y ∀ zzzz zzzz
Flags
Z
CLR label
Code
0010 1100
Operation
0 →(zzzz zzzz)
Code
0001 1101 zzzz zzzz
Flags
-----
Operation
Y ∀ (zzzz zzzz)
Flags
Z
31.
CPY label
CLRC
Code
0110 0001
Operation
0 →C
Flags
C
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8-BIT MICROCONTROLLER
41.
32.
DEC A
Code
0110 1000
Operation
A – 1 →A
Flags
N, Z, C
42.
33.
DEC X
0110 1010
Operation
X – 1 →X
Flags
N, Z, C
DEC Y
Code
0110 1011
Operation
Y – 1 →Y
Flags
N, Z, C
44.
35.
DEC (X)
Code
0110 1110
Operation
(X) – 1 →(X)
Flags
N, Z, C
45.
36.
DEC (Y)
Code
0110 1111
Operation
(Y) – 1 →(Y)
Flags
N, Z, C
46.
37.
DEC label
Code
0110 1100 zzzz zzzz
Operation
(zzzz zzzz)-1 →(zzzzzzzz)
Flags
N, Z, C
47.
38.
EOR X
Code
0101 1010
Operation
X ∀ A →A
Flags
N, Z
48.
39.
40.
EOR Y
Code
0101 1011
Operation
Y ∀ A →A
Flags
N, Z
0101 1111
Operation
(Y) ∀ A →A
Flags
N, Z
EOR label
Code
Code
43.
34.
EOR (Y)
Code
0101 1100 zzzz zzzz
Operation
(zzzz zzzz)∀ A →A
Flags
N, Z
EOR #CONSTANT
Code
0101 1001 zzzz zzzz
Operation
zzzz zzzz ∀ A →A
Flags
N, Z
INC A
Code
0110 0000
Operation
A + 1 →A
Flags
N, Z, C
INC X
Code
0110 0010
Operation
X + 1 →X
Flags
N, Z, C
INC Y
Code
0110 0011
Operation
Y + 1 →Y
Flags
N, Z, C
INC (X)
Code
0110 0110
Operation
(X) + 1 →X
Flags
N, Z, C
INC (Y)
Code
0110 0111
Operation
(Y) + 1 →Y
Flags
N, Z, C
EOR (X)
Code
0101 1110
Operation
(X) ∀ A →A
Flags
N, Z
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8-BIT MICROCONTROLLER
55.
49.
INC label
Code
0110 0100 zzzz zzzz
Operation
(zzzz zzzz) + 1 → (zzzz zzzz)
Flags
N, Z, C
56.
50.
MOV A, (X)
Code
INT
Operation
A →(X)
Flags
-----
MOV A, (Y)
Code
Code
0011 0110
Operation
PC LOW → (SP),
SP-1 → SP
0000 0110
0000 0111
Operation
A →(Y)
Flags
-----
PCHIGH→(SP),
SP-1 → SP
57.
MOV A label
IPAGE → (SP),
Code
SP-1 → SP
Operation
A →(zzzz zzzz)
PS → (SP),
Flags
-----
0000 0100 zzzz zzzz
SP-1 → SP
1→I
58.
3FC0H → PC
3 → iPAGE,PAGE
Flags
51.
52.
I
JA
59.
Code
0111 0001
Operation
A →PC[7:0]
Flags
-----
60.
10zz zzzz zzzz zzzz
Operation
ADDR14 →PC[13:0]
53.
54.
-----
61.
MOV A, X
Code
0000 0010
Operation
A →X
Flags
-----
62.
MOV A, Y
Code
0000 0011
Operation
A →Y
Flags
-----
Score Concept Semiconductor Ltd.
0001 0000
Operation
X →A
Flags
N, Z
MOV X, Y
19
0001 0011
Operation
X →Y
Flags
-----
MOV X, (Y)
Code
If PAGE≠iPAGE
PAGE →iPAGE
Flags
Code
Code
JUMP ADDR14
Code
MOV X, A
0001 0111
Operation
X →(Y)
Flags
-----
MOV X, label
Code
0001 0100 zzzz zzzz
Operation
X →(zzzz zzzz)
Flags
-----
MOV Y, A
Code
0001 1000
Operation
Y →A
Flags
N, Z
Sept 2000
SCG9864
8-BIT MICROCONTROLLER
72.
63.
MOV Y, X
Code
0001 1010
Operation
Y →X
Flags
----73.
64.
MOV Y, (X)
0001 1110
Operation
Y →(X)
Flags
-----
MOV Y, label
Code
0001 1100 zzzz zzzz
Operation
Y →(zzzz zzzz)
Flags
----75.
66.
MOV (X), A
0011 0000
Operation
(X) →A
Flags
N, Z
76.
67.
MOV (X), Y
Code
0011 0011
Operation
(X) →Y
Flags
-----
MOV (X), (Y)
Code
0011 0111
Operation
(X) →(Y)
Flags
-----
MOV (X), label
Code
0011 0100 zzzz zzzz
Operation
(X) →(zzzz zzzz)
Flags
----79.
70.
71.
MOV (Y), label
MOV (Y), A
Code
0011 1000
Operation
(Y) →A
Flags
N, Z
0011 1100 zzzz zzzz
Operation
(Y) →(zzzz zzzz)
Flags
-----
MOV label, A
Code
0010 0000 zzzz zzzz
Operation
(zzzz zzzz) →A
Flags
N, Z
MOV label, X
0010 0010 zzzz zzzz
Operation
(zzzz zzzz) →X
Flags
-----
MOV label, Y
0010 0011 zzzz zzzz
Operation
(zzzz zzzz) →Y
Flags
-----
MOV label, (X)
Code
78.
69.
-----
Code
77.
68.
(Y) →(X)
Flags
Code
Code
0011 1110
Operation
Code
Code
74.
65.
MOV (Y), (X)
Code
0010 0110 zzzz zzzz
Operation
(zzzz zzzz) →(X)
Flags
-----
MOV label, (Y)
Code
0010 0111 zzzz zzzz
Operation
(zzzz zzzz) →(Y)
Flags
-----
MOV #CONSTANT, A
Code
0000 1000 zzzz zzzz
Operation
Zzzz zzzz →A
Flags
N, Z
MOV (Y), X
Code
0011 1010
Operation
(Y) →X
Flags
-----
Score Concept Semiconductor Ltd.
20
Sept 2000
SCG9864
8-BIT MICROCONTROLLER
89.
80.
MOV #CONSTANT, X
Code
0000 1010 zzzz zzzz
Operation
Zzzz zzzz →X
Flags
----90.
81.
MOV #CONSTANT, Y
0000 1011 zzzz zzzz
Operation
Zzzz zzzz →Y
Flags
-----
MOV #CONSTANT, (X)
Code
83.
84.
85.
86.
87.
88.
0000 1110 zzzz zzzz
Operation
Zzzz zzzz →(X)
Flags
-----
(zzzz zzzz)V A→A
Flags
N, Z
OR #CONSTANT
92.
0000 1111 zzzz zzzz
Operation
zzzz zzzz →(Y)
Flags
-----
93.
0000 0000
Operation
No operation
Flags
-----
OR X
94.
Code
0101 0010
Operation
X V A→A
Flags
N, Z
OR Y
95.
Code
0101 0011
Operation
Y V A→A
Flags
N, Z
OR (X)
96.
Code
0101 0110
Operation
(X) V A→A
Flags
N, Z
Zzzz zzzzV A→A
Flags
N, Z
POP
Code
0011 1111
Operation
SP+1→SP
Flags
-----
PSHPAGE
Code
NOP
Code
0101 0001 zzzz zzzz
Operation
(SP)→A
MOV #CONSTANT, (Y)
Code
0101 0100 zzzz zzzz
Operation
Code
Code
91.
82.
OR label
Code
0110 1101
Operation
PAGE→ (SP); SP-1→SP
Flags
-----
PUSH
Code
0110 1001
Operation
A→(SP),SP-1→SP
Flags
-----
ROL A
Code
0111 0000
Operation
C←A←C
Flags
N, Z, C
ROL X
Code
0111 0010
Operation
C←X←C
Flags
N, Z, C
ROL Y
Code
0111 0011
Operation
C←Y←C
Flags
N, Z, C
OR (Y)
Code
0101 0111
Operation
(Y) V A→A
Flags
N, Z
Score Concept Semiconductor Ltd.
21
Sept 2000
SCG9864
8-BIT MICROCONTROLLER
106.
97.
ROL (X)
Code
0111 0110
Operation
C←(X)←C
Flags
N, Z, C
107.
98.
ROL (Y)
Code
0111 0111
Operation
C←(Y)←C
Flags
N, Z, C
108.
99.
ROL label
Code
0111 0100 zzzz zzzz
Operation
C←(zzzz zzzz)←C
Flags
N, Z, C
109.
100.
ROM A
Code
0111 1101
Operation
ROM (BANK,X,A)→A
Flags
-----
ROR (X)
Code
0111 1110
Operation
C→(X)→C
Flags
N, Z, C
ROR (Y)
Code
0111 1111
Operation
C→(Y)→C
Flags
N, Z, C
ROR label
Code
0111 1100 zzzz zzzz
Operation
C→(zzzz zzzz)→C
Flags
N, Z, C
RTI
Code
0100 0101
Operation
SP+1→SP
(SP)→PS;SP+1→1
(SP)→IPAGE,PAGE;
SP+1→SP
101.
Code
0111 1001
Operation
ROM (BANK,X,Y)→A
Flags
102.
(SP)→PCHIGH;
ROM Y
SP+1→SP
(SP)→PCLOW
Flags
-----
110.
ROMDBL
-----
RTL
Code
0001 0010
Code
Operation
ROM (BANK,X,Y)→B
ROM (BANK,X,Y+1)→A
Operation
0100 1101
SP+1→SP
(SP)→iPAGE,PAGE;
SP+1→SP
103.
104.
(SP)→PCHIGH
ROR A
Code
0111 1000
SP+1→SP
Operation
C→A→C
(SP)→PCLOW
Flags
N, Z, C
Flags
111.
ROR X
Code
0111 1010
Operation
C→X→C
Flags
N, Z, C
-----
RTS
Code
0101 0101
Operation
SP+1→SP
(SP)→PCHIGH;
SP+1→SP
(SP)→PCLOW
105.
ROR Y
Flags
Code
0111 1011
Operation
C→Y→C
Flags
N, Z, C
Score Concept Semiconductor Ltd.
22
-----
Sept 2000
SCG9864
8-BIT MICROCONTROLLER
120.
112.
SETC
Code
0110 0101
Operation
1→C
Flags
C
121.
113.
SETZ
0101 1000
Operation
1→Z,0→A,
Flags
N, Z
115.
116.
117.
118.
119.
SKIPC
Code
0011 0001
Operation
PC+2→PC if C = 1
Flags
-----
Stop
Flags
------
TAPAGE
123.
0001 0110
Operation
PC+2→PC if N = 1
Flags
-----
SKIPNC
124.
Code
0011 1001
Operation
PC+2→PC if C = 0
Flags
-----
SKIPNZ
125.
Code
0010 1001
Operation
PC+2→PC if Z = 0
Flags
-----
126.
0001 1111
Operation
PC+2→PC if N = 0
Flags
-----
A→PAGE
Flags
------
TZ
Code
0101 0000
Operation
Z=1 if A = 0
Flags
N, Z
XB
Code
0010 0101
Operation
B↔A
Flags
-----
XBANK
Code
0011 0101
Operation
BANK↔A
Flags
-----
XSP
Code
SKIPPL
Code
0111 0101
Operation
Z=0 if A ≠ 0
SKIPMI
Code
0010 0100
Operation
Code
Code
122.
114.
STOP
Code
0011 1101
Operation
SP↔A
Flags
-----
XST
Code
0010 1101
Operation
PS↔A
Flags
N, Z, C, I
SKIPZ
Code
0010 0001
Operation
PC+2→PC if Z = 1
Flags
-----
Score Concept Semiconductor Ltd.
23
Sept 2000
SCG9864
8-BIT MICROCONTROLLER
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings:
1.
2.
3.
4.
5.
VDD
VIH
VIL
Operating Temperature
Storage Temperature
7.0V
VDD + 0.3V
GND - 0.3V
0°C to + 60°C
-50°C to + 150°C
Recommended Operating:
1. Operating Voltage (VDD)
MIN
2.4
TYP
3.0
2. Operating Frequency (Fosc)
-
4.0
VIH
VIL
VIH
VIL
VIH
VIL
1.6
0
2.0
0
3.6
0
2.0
0.4
2.4
0.6
4.0
1.5
2.4
0.8
3.0
1.0
5.5V
1.8V
V
V
V
V
V
V
4. Output Voltage
4.1 VDD = 2.4V
@1mA
4.2 VDD = 3.0V
@2mA
4.3 VDD = 5.5V
@10mA
VOH
VOL
VOH
VOL
VOH
VOL
2.0
2.4
4.0
-
-
0.4
0.6
1.5
V
V
V
V
V
V
5. Input Current
VIH = VDD
IH
-
-
150
VIL = OV
IL
-
-
0.3
µA (through pull-low
resistor)
µA (leakage)
[email protected] =2.0V
[email protected] =0.4V
[email protected] =2.4V
[email protected] =0.6V
[email protected] =4.0V
[email protected] =1.5V
1.0
2.0
1.5
3.0
8
16
1.5
3.0
3.5
7.0
10
20
-
mA
mA
mA
mA
mA
mA
1.0
1.5
4.5
mA
2.0
3.0
9.0
mA
-
5.0
30.0
µA
3. Input Voltage
3.1 VDD = 2.4V
3.2 VDD = 3.0V
3.3 VDD = 5.5V
6. Output Current
6.1 VDD = 2.4V,
6.2
VDD = 3.0V,
6.3
VDD = 5.5V,
7. Current Dissipation
7.1 Operating Current @4MHz, 3.0V
& Output Pad Load = 50pF
7.2 Operating Current @4MHz, 5.0V
& Output Pad Load = 50pF
7.3 Standby Current (OFF mode)
Score Concept Semiconductor Ltd.
24
MAX
5.5
-
Unit
V
MHz
Sept 2000
SCG9864
8-BIT MICROCONTROLLER
1
P_CLK
2
CLK32O
3
CLK32I
4
VSS
5
P0RW0
TEST
VDD
3
9
RESET-
EXT_INT
PAD Co-ordinates
38
37
36
35
VSS
34
PWMM
33
PWMP
Y
6
P0RW1
7
P0RW2
X
(0,0)
11
P0RW5
29
VDD
12
P0RW6
28
P2W3
13
P0RW7
27
P2W2
VSS
1
4
15
16
17
18
19
20
21
22
23
24
25
26
P2W1
P2W4
P2W0
30
VSS
P0RW4
P1RW7
10
P1RW6
P2W5
P1RW5
31
P1RW4
VDD
VDD
9
P1RW3
P2W6
P1RW2
32
P1RW1
P0RW3
P1RW0
8
The substrate of IC should be connected to VSS
Score Concept Semiconductor Ltd.
25
Sept 2000
SCG9864
Pad No
Pad Name
8-BIT MICROCONTROLLER
X
Y
Pad No
Pad Name
X
Y
1
P_CLK
-1193.600
955.000
20
P1RW4
-24.000
-1174.600
2
CLK32O
-1193.600
795.000
21
P1RW5
136.000
-1174.600
3
CLK32I
-1193.600
635.000
22
P1RW6
296.000
-1174.600
4
VSS
-1193.600
475.000
23
P1RW7
456.000
-1174.600
5
P0RW0
-1193.600
315.000
24
VSS
616.000
-1174.600
6
P0RW1
-1193.600
155.000
25
P2W0
776.000
-1174.600
7
P0RW2
-1193.600
-5.000
26
P2W1
936.000
-1174.600
8
P0RW3
-1193.600
-165.000
27
P2W2
1193.600
-965.000
9
VDD
-1193.600
-325.000
28
P2W3
1193.600
-805.000
10
P0RW4
-1193.600
-485.000
29
VDD
1193.600
-645.000
11
P0RW5
-1193.600
-645.000
30
P2W4
1193.600
-485.000
12
P0RW6
-1193.600
-805.000
31
P2W5
1193.600
-325.000
13
P0RW7
-1193.600
-965.000
32
P2W6
1193.600
-165.000
14
VSS
-984.000
-1174.600
33
PWMP
1193.600
-5.000
15
P1RW0
-824.000
-1174.600
34
PWMM
1193.600
155.000
16
P1RW1
-664.000
-1174.600
35
VSS
1193.600
315.000
17
P1RW2
-504.000
-1174.600
36
VDD
-504.000
1174.600
18
P1RW3
-344.000
-1174.600
37
TEST
-664.000
1174.600
19
VDD
-184.000
-1174.600
38
RESET
-824.000
1174.600
39
EXT_INT
-984.000
1174.600
Score Concept Semiconductor Ltd.
26
Sept 2000
SCG9864
8-BIT MICROCONTROLLER
Application Circuit
VCC
R3
47K
U1
1
2
3
R2
100K
5
6
7
8
10
11
12
13
15
16
17
18
20
21
22
23
OPTIONAL
P_CLK
CLK32O
CLK32I
RESET
EXT_INT
P0RW0
P0RW1
P0RW2
P0RW3
P0RW4
P0RW5
P0RW6
P0RW7
TEST
P1RW0
P1RW1
P1RW2
P1RW3
P1RW4
P1RW5
P1RW6
P1RW7
P2W0
P2W1
P2W2
P2W3
P2W4
P2W5
P2W6
38
39
C4
0.1u
37
25
26
27
28
30
31
32
D1
LED
Y1
D2
LED
D3
LED
D4
LED
SCG9832
32768
R1
1M
C1
C2
SCORE CONCEPT SEMICONDUCTOR LIMITED
Title
SCG9832 application circuit
Size
A
Date:
Score Concept Semiconductor Ltd.
27
Document Number
SCG9832
Thursday, September 14, 2000
Rev
1
Sheet
1
of
1
Sept 2000