AK5340-VS (1/3) IL08 C-MOS 18-BIT 2 CHANNEL A/D CONVERTER —TOP VIEW— 1 AINL + IN 1 28 AINR + IN 2 28 AINL _ IN 2 27 AINR _ IN 27 3 V REF IN 3 26 V REF OUT 9 10 4 AVDD NC 25 20 12 5 AGND DVDD 24 13 NC 23 11 8 6 NC 21 7 NC TST1 IN/OUT 8 SEL18 IN 9 22 TST4 IN 21 TST3 IN/OUT 20 CLK IN PD IN 10 DGND 19 TST2 IN 11 DVDD 18 CMODE IN 12 17 FSYNC IN/OUT SMODE IN 13 16 SDATA OUT L/R IN/OUT 14 15 SCLK IN/OUT AVDD, AGND : FOR ANALOG BLOCK DVDD, DGND : FOR DIGITAL BLOCK 22 AINL + AINL _ AINR + AINR _ V REF IN SEL18 V REF SDATA 26 16 PD CLK SCLK CMODE FSYNC SMODE L/R TST1 TST2 TST3 TST4 15 17 14 AK5340-VS (2/3) INPUT AINL + AINL _ AINR + AINR _ CLK CMODE PD SEL 18 SMODE ; ; ; ; ; L-CH ANALOG POSITIVE INPUT L-CH ANALOG NEGATIVE INPUT R-CH ANALOG POSITIVE INPUT R-CH ANALOG NEGATIVE INPUT MASTER CLOCK (CMODE = H : 384 fs) (CMODE = L : 256 fs) ; MASTER CLOCK SELECT (L : CLK = 256 fs, 12.288 MHz @fs = 48 kHz) (H : CLK = 384 fs, 18.432 MHz @fs = 48 kHz) ; POWER DOWN FOR DIGITAL SECTION ; 18/16 BIT SELECT (L : 16-BIT, H : 18-BIT) ; INTERFACE CLOCK SELECT (L : SUB MODE) (H : MASTER MODE) TST 2, 4 V REF IN ; TEST ; REFERENCE VOLTAGE OUTPUT SDATA V REF ; SERIAL DATA ; REFERENCE VOLTAGE (_2.5V) INPUT/OUTPUT ; FRAME SYNC CLOCK FSYNC (SUB MODE : FSYNC INPUT) (MASTER MODE : FSYNC OUTPUT) ; INPUT CHANNEL SELECT L/R (SUB MODE : fs CLK INPUT) (MASTER MODE : fs CLK OUTPUT) SCLK ; SERIAL DATA CLOCK (SUB MODE : SCLK INPUT) (MASTER MODE : SCLK OUTPUT) TST 1, 3 ; TEST AK5340-VS (3/3) ANALOG BLOCK 26 VOLTAGE REFERENCE 3 DIGITAL BLOCK DAC AINL+ AINL_ 1 2 + _ _ + LOW PASS FILTER + _ DECIMATION FILTER VREF IN VREF DAC AINR_ 28 27 + _ _ + LOW PASS FILTER + _ SEL 18 PD CLK TST 1 TST 2 TST 3 TST 4 CMODE SMODE 9 10 CONTROLLER 20 8 11 21 22 12 13 14 SERIAL OUTPUT I/F DECIMATION FILTER AINR+ 15 CALIBRATION S-RAM 17 16 SCLK L/R FSYNC SDATA