PCI-SCI Bridge Chips
for System Area Networks
Dolphin´s PCI-SCI Bridge (PSB) Chip provides a
reliable, very high bandwidth and low-latency
connection between PCI buses, making it ideally
suited for server clustering and high performance
system area network applications.
The PSB-64 chip is designed to meet the requirements
for high availability clustering and remote I/O
applications. In a unique architecture combining both
direct memory access (DMA) and remote memory
access (RMA), high performance message passing
protocols and transparent bus bridging operations are
supported. The PSB chip is based on the ANSI/IEEE
Features and Benefits
• PCI 2.1 compliant, 64 bits, 33 MHz PCI bus
• ANSI/IEEE 1596-1992 Scalable Coherent
Interface (SCI) standard compliant
Scalable Coherent Interface (SCI) standard.
By use of the DMA controller chunks of memory can
be copied directly between PCI buses in a single copy
operation with no need for intermediate buffering in
adapter cards or buffer memories. This feature greatly
• ANSI/IEEE 1159.1 (JTAG) support
reduces latency and lowers overhead of data
transfers. The DMA controller supports both read and
• Compatible with Dolphin Link Controllers
• Chaining (Read/Write) DMA Engine
• Up to 4096 map entries in offchip SRAM
write operations.
The remote memory access (RMA) feature of the PSB
enables ultra-low latency messaging and low
overhead and transparent I/O
• 4 - 512 KBytes page size
• Hostbridge capability (PCI arbiter, Event
• Read prefetching/write gathering
transfers. In RMA
mode, PCI bus memory transactions are converted
into corresponding SCI bus memory transactions
allowing two physically separate PCI buses to appear
as one. This feature allows applications to send data
between system memories without the use of
operating system services, thus greatly reducing
• B-Link™ Compliant
latency and overhead.
The PSB has built-in address translation, error
detection and protection mechanisms to support
highly reliable connections.
Block Diagram
PCI 2.1 64-bits/33MHz
2 x Req
8 x Read
8 x Write
BLink Interface Unit
BLink 66 MHz
Technical Specifications
PCI Specification
Packaging and Power
PCI Specification 2.1
313 Ball Grid Array
33 MHz
64 bits, 33 MHz operation
3 Watts
140 MBytes/sec RMA
3.3V/5V PCI bus operation
3.3V or 5V I/O
107 MBytes/sec DMA
B-Link Specification
Operating Temperature
Product Code
64 bits, 50 MHz operation
Operating Temperature: 4˚C–32˚C
PSB-64 (D667)
500 Mbytes/sec bandwidth
Relative Humidity: 5%–95% non-condensing
SCI Specification
ANSI/IEEE 1596-1992 Scalable Coherent
Interface (SCI) compliant
Dolphin Interconnect Solutions Offices:
Dolphin Headquarters USA:
3609 East Thousand Oaks Blvd, Suite 209
Westlake Village, CA 91362-3624
Dolphin USA:
111 Speen Street
Framingham, MA 01701-2090
Dolphin Europe:
Olaf Helsets vei 6
0621 Oslo, Norway
Internet Information:
E-mail: [email protected]
World Wide Web:
(805) 371-9493
(805) 371-9785
(508) 875-3030
(508) 875-1517
+ 47 23 16 70 00
+ 47 23 16 71 80
© 1999 by Dolphin Interconnect Solutions, Inc. All rights reserved.
Specifications subject to change without notice. LinkController is a trademark of Dolphin Interconnect Solutions. All other brand or product names
are trademarks or registered trademarks of their respective holders.