SY10422-3/4/5/7 SY100422-3/4/5/7 SY10422-3/4/5/7 SY101422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 256 x 4 ECL RAM SYNERGY SEMICONDUCTOR FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION Address access time, tAA: 3/4/5/7ns max. Block select access time, tAB: 2ns max. Write pulse width, tWW: 3ns min. Edge rate, tr/tf: 500ps typ. Write recovery times under 5ns Power supply current, IEE: –250mA, –200mA for –5/7ns Superior immunity against alpha particles provides virtually no soft error sensitivity Built with advanced ASSET™ technology Fully compatible with industry standard 10K/100K ECL I/O levels Noise margins improved with on-chip voltage and temperature compensation Open emitter output for easy memory expansion Includes popular Block Select function allowing individual read/write control over blocks ESD protection of 2000V Available in 24-pin flatpack and 28-pin PLCC and MLCC packages The Synergy SY10/100/101422 are 1024-bit Random Access Memories (RAMs), designed with advanced Emitter Coupled Logic (ECL) circuitry. The devices are organized as 256-words-by-4-bits and meet the standard 10K/100K family signal levels. The SY100422 is also supply voltagecompatible with 100K ECL, while the SY101422 operates from 10K ECL supply voltage (–5.2V). All feature on-chip voltage and temperature compensation for improved noise margin. The SY10/100/101422 employ proprietary circuit design techniques and Synergy’s proprietary ASSET advanced bipolar technology to achieve extremely fast access, write pulse width and write recovery times. ASSET uses proprietary technology concepts to achieve significant reduction in parasitic capacitance while improving device packing density. Synergy’s circuit design techniques, coupled with ASSET, result not only in ultra-fast performance, but also allow device operation at reduced power levels with virtually no soft error sensitivity and with outstanding device reliability in volume production. BLOCK DIAGRAM A5 A0 A6 A7 A1 A2 A3 X-Decoder/ Driver Y-Decoder/Driver Memory Cell Array A4 WE SA/WA* DI0 BS0 DO0 * © 1999 Micrel-Synergy SA/WA DI1 SA/WA DI2 BS1 DO1 BS2 DO2 SA/WA DI3 BS3 DO3 SA = Sense Amplifier WA = Write Amplifier Rev.: E 1 Amendment: /0 Issue Date: August,1999 SY10422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 SYNERGY SEMICONDUCTOR 5 WE DI1 DI0 BS1 BS1 6 DI0 7 NC 8 DI1 9 DO1 WE 10 A5 11 PIN NAMES BS3 VCCA NC DO3 DO0 2 VCC BS0 3 1 28 27 26 Top View MLCC (M28-1) or PLCC (J28-1) 25 DO2 24 BS2 23 DI3 22 NC 21 DI2 A1 NC A0 A7 VEE 20 19 12 13 14 15 16 17 18 A4 A3 A2 DO1 4 A6 VEE A7 A0 A6 A5 BS0 BS3 DO2 DO0 BS2 2 3 4 5 6 VCC VCCA DI2 DI3 1 24 23 22 21 20 19 18 17 Top View 16 Flatpack 15 F24-1 14 13 7 8 9 10 11 12 DO3 A3 A4 A1 A2 PIN CONFIGURATIONS TRUTH TABLE Label Function A0 - A7 Address Inputs BS0 - BS3 Input BS WE DIN Output Mode Block Select (BS) H X X L Disabled WE Write Enable L L H L Write “H” DI0 - DI3 Data Input (DIN) L L L L Write “L” DO0 - DO3 Data Output (DOUT) L H X DOUT VCC GND (0V) VCCA Output GND (0V) VEE Supply Voltage NOTE: H = High Voltage Level L = Low Voltage Level X = Don’t Care 2 Read SY10422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 SYNERGY SEMICONDUCTOR FUNCTIONAL DESCRIPTION The Synergy SY10/100/101422 are 1024-bit RAMs organized as four 256-by-1-bit blocks with each block having its own Block Select (BS) control signal that functions essentially like a unique chip select for the Block. The four blocks and Block Selects together make the device a 256 x 4-bit RAM. Memory cell selection is achieved by using the 8 address bits designated as A0 through A7. Each of the 28 possible input address combinations corresponds to a unique word location in memory. The active low Block Select (BS) control signals are provided for memory expansion and for independent control of each of the four 256 x 1-bit blocks of memory. The active low Write Enable (WE) controls the read and write operation on the selected block or blocks. Data resident on the DIN inputs (DI0 through DI3) is written into the addressed location only when WE and the Block Select (BS) associated with each of the DIN bits is held LOW. This allows control of the Write operation to any one, two, three or all four of the input data bits. In order to perform a read operation, WE is held high, the Block Select (BS) associated with each of the four output blocks is held low, and the non-inverted output data at the addressed location is transferred to DOUT (DO0 through DO3) to be read out. This allows control of the Read operation to any one, two, three or all four of the output blocks. Open emitter outputs are provided for maximum flexibility and memory expansion by allowing output wire-OR connections. External termination of 50Ω to –2.0V or an equivalent circuit must be used to provide the specified output levels. All outputs are forced to a logic LOW level when the RAM is being written into (WE = LOW). The output (or outputs) associated with a block (or blocks) of memory can be forced to a logic LOW low level by deselecting that block (or blocks) with its respective Block Select input (BS0 – BS3 = HIGH). ABSOLUTE MAXIMUM RATINGS(1) Symbol Rating GUARANTEED OPERATING CONDITIONS Value Unit Parameter Voltage(1) VEE VEE Pin Potential to VCC Pin +0.5 to –7.0 V VIN Input Voltage +0.5 to VEE V IOUT DC Output Current (Output High) –30 mA TC Temperature Under Bias –55 to +125 °C Tstore Storage Temperature –65 to +150 °C Supply Symbol Min. Supply Voltage(1) Supply –5.2 –4.94 V VEE TC 0 — 75 °C 100K VEE –4.8 –4.5 –4.2 V TC 0 — 85 °C VEE –5.46 –5.2 –4.94 V TC 0 — 85 °C Case Temperature Voltage(1) Max. Unit 10K Case Temperature 101K Case Temperature –5.46 Typ. NOTE: 1. Referenced to VCC. NOTE: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. RISE AND FALL TIME Parameter CAPACITANCE Code(1) Symbol Min. Typ. Max. Unit Parameter Symbol Min. Typ. Max. Unit Output Rise Time F S tr — 500 1500 — ps Input Pin Capacitance CIN — 4 — pF Output Fall Time F S tf — 500 1500 — ps Output Pin Capacitance COUT — 5 — pF NOTE: 1. F = Fast Edge Rate S = Standard Edge Rate 3 SY10422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 SYNERGY SEMICONDUCTOR 10K DC ELECTRICAL CHARACTERISTICS VCC = 0V; TC = 0°C to +75°C; VEE = –5.2V; Airflow > 2.5m/s; Output Load = 50Ω to –2.0V Symbol TC Min. Max. Unit VOH Output High Voltage Parameter 0°C +25°C +75°C –1000 –960 –900 –840 –810 –720 mV VIN = VIH Max. or VIL Min. VOL Output Low Voltage 0°C +25°C +75°C –1870 –1850 –1830 –1665 –1650 –1625 mV VIN = VIH Max. or VIL Min. VOHC Output High Voltage 0°C +25°C +75°C –1020 –980 –920 — — — mV VIN = VIH Min. or VIL Max. VOLC Output Low Voltage 0°C +25°C +75°C — — — –1645 –1630 –1605 mV VIN = VIH Min. or VIL Max. VIH Input High Voltage 0°C +25°C +75°C –1145 –1105 –1045 –840 –810 –720 mV Guaranteed Input Voltage High for All Inputs VIL Input Low Voltage 0°C +25°C +75°C –1870 –1850 –1830 –1490 –1475 –1450 mV Guaranteed Input Voltage Low for All Inputs IIH Input High Current 0°C to+ 75°C 0.0 20 µA VIN = VIH Max. IIL Input Low Current 0°C to +75°C –2 2 µA VIN = VIL Min. IIL BS Input Low Current 0°C to +75°C 30 170 µA VIN = VIL Min. IIH BS Input High Current 0°C to +75°C 40 220 µA VIN = VIH Max. IIL WE Input Low Current 0°C to +75°C –2 35 µA VIN = VIL Min. IIH WE Input High Current 0°C to +75°C 0.0 60 µA VIN = VIH Max. IEE Power Supply Current –250 –200 — — mA All Inputs and Outputs Open -3ns, -4ns -5ns, -7ns 0°C to +75°C Condition 100K/101K DC ELECTRICAL CHARACTERISTICS VCCA = 0V VCC = 0V Symbol VEE = –4.5V (100K) VEE = –5.2V (101K) Parameter TC = 0°C to +85°C Min. Max. Airflow > 2.5m/s Output Load = 50Ω to –2.0V Unit Condition VOH Output High Voltage –1025 –880 mV VIN = VIH Max. or VIL Min. VOL Output Low Voltage –1810 –1620 mV VIN = VIH Max. or VIL Min. VOHC Output High Voltage –1035 — mV VIN = VIH Min. or VIL Max. VOLC Output Low Voltage — –1610 mV VIN = VIH Min. or VIL Max. VIH Input High Voltage –1165 –880 mV Guaranteed Input Voltage High for All Inputs VIL Input Low Voltage –1810 –1475 mV Guaranteed Input Voltage Low for All Inputs IIH Input High Current 0.0 20 µA VIN = VIH Max. IIL Input Low Current –2 2 µA VIN = VIL Min. IIL BS Input Low Current 30 170 µA VIN = VIL Min. IIH BS Input High Current 40 220 µA VIN = VIH Max. IIL WE Input Low Current –2 35 µA VIN = VIL Min. IIH WE Input High Current 60 µA VIN = VIH Max. IEE Power Supply Current — — mA All Inputs and Outputs Open -3ns, -4ns -5ns, -7ns 0.0 –250 –200 4 SY10422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 SYNERGY SEMICONDUCTOR AC ELECTRICAL CHARACTERISTICS AC TEST CONDITIONS VCC = VCCA = 0V VEE = –5.2V ± 5%(10K) VEE = –4.5V ± 0.3V(100K) VEE = –5.2V ± 5%(101K) Output Load = 50Ω to –2.0V TC = 0°C to +75°C (10K) TC = 0°C to +85°C (100K/101K) Airflow > 2.5m/s Loading Condition TC VIH VIL 10K 0°C +25°C +75°C –0.933V –0.90V –0.863V –1.733V –1.70V –1.663V 100/101K 0°C to +85°C –0.90V –1.70V GND Input Pulse VIH 80% VCCA VCC 20% OUT VEE VIL RL tr CL tf tr = tf = 1.0ns typ. OUTPUT LOAD: RL = 50Ω CL = 5pF* (typ.) * (Modeled as 50Ω transmission line terminated to –2V.) 0.01µF VEE –2.0V NOTE: All timing measurements referenced to 50% input levels. READ CYCLE SY10422-3 SY100422-3 SY101422-3 Symbol Parameter SY10422-4 SY100422-4 SY101422-4 SY10422-5 SY100422-5 SY101422-5 SY10422-7 SY100422-7 SY101422-7 Min. Max. Min. Max. Min. Max. Min. Max. Unit tAA TAVQV Address Access Time — 3 — 4 — 5 — 7 ns tAB TBSLQV Block Select Access Time — 2 — 2 — 3 — 3 ns tRB TBSHQL Block Select Recovery Time — 2 — 2 — 3 — 3 ns READ CYCLE TIMING DIAGRAM BS Address 50% tAB tAA tRB 80% 50% 20% DOUT tr 50% DOUT tf 5 50% SY10422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 SYNERGY SEMICONDUCTOR READ CYCLE SY10422-3 SY100422-3 SY101422-3 Symbol Parameter SY10422-4 SY100422-4 SY101422-4 SY10422-5 SY100422-5 SY101422-5 SY10422-7 SY100422-7 SY101422-7 Min. Max. Min. Max. Min. Max. Min. Max. Unit tWW TWLWH Write Pulse Width 3 — 4 — 5 — 5 — ns tWS TWLQL Write Disable Time — 3 — 4 — 4 — 4 ns tWR TWHQV Write Recovery Time — 3 — 4 — 4 — 4 ns tSA TAVWL Address Set-Up Time 1 — 1 — 1 — 1 — ns tSB TBSLWL Block Select Set-Up Time 0 — 0 — 1 — 1 — ns tSD TDVWL Data Set-Up Time 0 — 0 — 1 — 1 — ns tHA TWHAX Address Hold Time 1 — 1 — 1 — 1 — ns tHB TWHBSX Block Select Hold Time 1 — 1 — 1 — 1 — ns tHD TWHDX Data Hold Time 1 — 1 — 1 — 1 — ns WRITE CYCLE TIMING DIAGRAM BS Address DIN tSD tHD WE tSA tWW tHB 50% DOUT tSB tWS tWR 6 SY10422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 SYNERGY SEMICONDUCTOR PRODUCT ORDERING CODE Speed (ns) Ordering Code Edge Rate Package Type Operating Range 3 SY10/100/101422-3FCF SY10/100/101422-3MCF Fast Fast F24-1 M28-1 Commercial Commercial 4 SY10/100/101422-4FCF SY10/100/101422-4MCF Fast Fast F24-1 M28-1 Commercial Commercial 5 SY10/100/101422-5FCS SY10/100/101422-5JCS Standard Standard F24-1 J28-1 Commercial Commercial 7 SY10/100/101422-7FCS SY10/100/101422-7JCS Standard Standard F24-1 J28-1 Commercial Commercial 7 SY10422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 SYNERGY SEMICONDUCTOR 24 LEAD CERPACK (F24-1) 8 SY10422-3/4/5/7 SY100422-3/4/5/7 SY101422-3/4/5/7 SYNERGY SEMICONDUCTOR 28 LEAD PLASTIC LEADED CHIP CARRIER (J28-1) 9 WWW.ALLDATASHEET.COM Copyright © Each Manufacturing Company. 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